From: Stylon Wang <stylon.wang@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: stylon.wang@amd.com, Charlene Liu <charlene.liu@amd.com>,
Muhammad Ahmed <ahmed.ahmed@amd.com>,
Sunpeng.Li@amd.com, Harry.Wentland@amd.com,
qingqing.zhuo@amd.com, Rodrigo.Siqueira@amd.com,
roman.li@amd.com, solomon.chiu@amd.com, Aurabindo.Pillai@amd.com,
wayne.lin@amd.com, Bhawanpreet.Lakha@amd.com,
agustin.gutierrez@amd.com, pavle.kotarac@amd.com
Subject: [PATCH 02/15] drm/amd/display: disable clock gating logic reversed bug fix
Date: Wed, 9 Aug 2023 23:04:52 +0800 [thread overview]
Message-ID: <20230809150620.1071566-3-stylon.wang@amd.com> (raw)
In-Reply-To: <20230809150620.1071566-1-stylon.wang@amd.com>
From: Muhammad Ahmed <ahmed.ahmed@amd.com>
[Why]
disable clock gating logic reversed bug fix
Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Stylon Wang <stylon.wang@amd.com>
Signed-off-by: Muhammad Ahmed <ahmed.ahmed@amd.com>
---
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hubbub.c | 4 ++--
drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubbub.c | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hubbub.c b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hubbub.c
index 7445ed27852a..1f4e0b6261ad 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hubbub.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hubbub.c
@@ -1018,8 +1018,8 @@ void hubbub31_init(struct hubbub *hubbub)
/*done in hwseq*/
/*REG_UPDATE(DCFCLK_CNTL, DCFCLK_GATE_DIS, 0);*/
REG_UPDATE_2(DCHUBBUB_CLOCK_CNTL,
- DISPCLK_R_DCHUBBUB_GATE_DIS, 0,
- DCFCLK_R_DCHUBBUB_GATE_DIS, 0);
+ DISPCLK_R_DCHUBBUB_GATE_DIS, 1,
+ DCFCLK_R_DCHUBBUB_GATE_DIS, 1);
}
/*
diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubbub.c b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubbub.c
index a18b9c0c5709..8bfef6d095b2 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubbub.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubbub.c
@@ -955,8 +955,8 @@ void hubbub32_init(struct hubbub *hubbub)
/*REG_UPDATE(DCFCLK_CNTL, DCFCLK_GATE_DIS, 0);*/
REG_UPDATE_2(DCHUBBUB_CLOCK_CNTL,
- DISPCLK_R_DCHUBBUB_GATE_DIS, 0,
- DCFCLK_R_DCHUBBUB_GATE_DIS, 0);
+ DISPCLK_R_DCHUBBUB_GATE_DIS, 1,
+ DCFCLK_R_DCHUBBUB_GATE_DIS, 1);
}
/*
ignore the "df_pre_cstate_req" from the SDP port control.
--
2.41.0
next prev parent reply other threads:[~2023-08-09 15:07 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-09 15:04 [PATCH 00/15] DC Patches August 11, 2023 Stylon Wang
2023-08-09 15:04 ` [PATCH 01/15] drm/amd/display: Support Compliance Test Pattern Generation with DP2 Retimer Stylon Wang
2023-08-09 15:04 ` Stylon Wang [this message]
2023-08-09 15:04 ` [PATCH 03/15] drm/amd/display: Enable 8k60hz mode on single display Stylon Wang
2023-08-09 15:04 ` [PATCH 04/15] drm/amd/display: Gamut remap only changes missed Stylon Wang
2023-08-09 15:04 ` [PATCH 05/15] drm/amd/display: Enable subvp high refresh up to 175hz Stylon Wang
2023-08-09 15:04 ` [PATCH 06/15] drm/amd/display: PMFW to wait for DMCUB ack for FPO cases Stylon Wang
2023-08-09 15:04 ` [PATCH 07/15] drm/amd/display: fix incorrect stream_res allocation for older ASIC Stylon Wang
2023-08-09 15:04 ` [PATCH 08/15] drm/amd/display: Adjust the resume flow Stylon Wang
2023-08-09 15:04 ` [PATCH 09/15] drm/amd/display: avoid crash and add z8_marks related in dml Stylon Wang
2023-08-09 15:05 ` [PATCH 10/15] drm/amd/display: implement pipe type definition and adding accessors Stylon Wang
2023-08-09 15:05 ` [PATCH 11/15] drm/amd/display: Add some missing register definitions Stylon Wang
2023-08-09 15:05 ` [PATCH 12/15] drm/amd/display: enable low power mode for VGA memory Stylon Wang
2023-08-09 15:05 ` [PATCH 13/15] drm/amd/display: Remove freesync video mode amdgpu parameter Stylon Wang
2023-08-09 17:28 ` Pillai, Aurabindo
2023-08-09 15:05 ` [PATCH 14/15] drm/amd/display: [FW Promotion] Release 0.0.179.0 Stylon Wang
2023-08-09 15:05 ` [PATCH 15/15] drm/amd/display: Promote DAL to 3.2.247 Stylon Wang
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