From: Wayne Lin <Wayne.Lin@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: stylon.wang@amd.com, Anthony Koo <anthony.koo@amd.com>,
Sunpeng.Li@amd.com, Harry.Wentland@amd.com,
qingqing.zhuo@amd.com, Rodrigo.Siqueira@amd.com,
roman.li@amd.com, solomon.chiu@amd.com,
SungHuai Wang <danny.wang@amd.com>,
Aurabindo.Pillai@amd.com, wayne.lin@amd.com,
Bhawanpreet.Lakha@amd.com, agustin.gutierrez@amd.com,
pavle.kotarac@amd.com
Subject: [PATCH 11/16] drm/amd/display: fix static screen detection setting
Date: Wed, 16 Aug 2023 14:06:53 +0800 [thread overview]
Message-ID: <20230816060658.2141009-12-Wayne.Lin@amd.com> (raw)
In-Reply-To: <20230816060658.2141009-1-Wayne.Lin@amd.com>
From: SungHuai Wang <danny.wang@amd.com>
[WHY]
OTG_STATIC_SCREEN_EVENT_MASK is changed in DCN3,
but we still follow DCN2 to apply setting for
OTG_STATIC_SCREEN_EVENT_MASK.
[How]
Add new function to apply correct settings for DCN3 series.
Reviewed-by: Anthony Koo <anthony.koo@amd.com>
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: SungHuai Wang <danny.wang@amd.com>
---
.../gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c | 17 +++++++++++++++++
.../gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.h | 2 ++
.../gpu/drm/amd/display/dc/dcn30/dcn30_init.c | 2 +-
.../gpu/drm/amd/display/dc/dcn31/dcn31_init.c | 2 +-
.../gpu/drm/amd/display/dc/dcn314/dcn314_init.c | 2 +-
.../gpu/drm/amd/display/dc/dcn32/dcn32_init.c | 2 +-
6 files changed, 23 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c
index 6cef62d7a2e5..255713ec29bb 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c
@@ -987,3 +987,20 @@ void dcn30_prepare_bandwidth(struct dc *dc,
}
}
+void dcn30_set_static_screen_control(struct pipe_ctx **pipe_ctx,
+ int num_pipes, const struct dc_static_screen_params *params)
+{
+ unsigned int i;
+ unsigned int triggers = 0;
+
+ if (params->triggers.surface_update)
+ triggers |= 0x100;
+ if (params->triggers.cursor_update)
+ triggers |= 0x8;
+ if (params->triggers.force_trigger)
+ triggers |= 0x1;
+
+ for (i = 0; i < num_pipes; i++)
+ pipe_ctx[i]->stream_res.tg->funcs->set_static_screen_control(pipe_ctx[i]->stream_res.tg,
+ triggers, params->num_frames);
+}
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.h b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.h
index a24a8e33a3d2..ce19c54097f8 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.h
@@ -87,5 +87,7 @@ void dcn30_set_hubp_blank(const struct dc *dc,
void dcn30_prepare_bandwidth(struct dc *dc,
struct dc_state *context);
+void dcn30_set_static_screen_control(struct pipe_ctx **pipe_ctx,
+ int num_pipes, const struct dc_static_screen_params *params);
#endif /* __DC_HWSS_DCN30_H__ */
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_init.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_init.c
index 3d19acaa12f3..0de8b2783cf6 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_init.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_init.c
@@ -64,7 +64,7 @@ static const struct hw_sequencer_funcs dcn30_funcs = {
.update_bandwidth = dcn20_update_bandwidth,
.set_drr = dcn10_set_drr,
.get_position = dcn10_get_position,
- .set_static_screen_control = dcn10_set_static_screen_control,
+ .set_static_screen_control = dcn30_set_static_screen_control,
.setup_stereo = dcn10_setup_stereo,
.set_avmute = dcn30_set_avmute,
.log_hw_state = dcn10_log_hw_state,
diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c
index fc25cc300a17..1d7bc1e39afe 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c
@@ -67,7 +67,7 @@ static const struct hw_sequencer_funcs dcn31_funcs = {
.update_bandwidth = dcn20_update_bandwidth,
.set_drr = dcn10_set_drr,
.get_position = dcn10_get_position,
- .set_static_screen_control = dcn10_set_static_screen_control,
+ .set_static_screen_control = dcn30_set_static_screen_control,
.setup_stereo = dcn10_setup_stereo,
.set_avmute = dcn30_set_avmute,
.log_hw_state = dcn10_log_hw_state,
diff --git a/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_init.c b/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_init.c
index ca8fe55c33b8..4ef85c3a0688 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_init.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_init.c
@@ -69,7 +69,7 @@ static const struct hw_sequencer_funcs dcn314_funcs = {
.update_bandwidth = dcn20_update_bandwidth,
.set_drr = dcn10_set_drr,
.get_position = dcn10_get_position,
- .set_static_screen_control = dcn10_set_static_screen_control,
+ .set_static_screen_control = dcn30_set_static_screen_control,
.setup_stereo = dcn10_setup_stereo,
.set_avmute = dcn30_set_avmute,
.log_hw_state = dcn10_log_hw_state,
diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_init.c b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_init.c
index 279f312f7407..eb4227926006 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_init.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_init.c
@@ -65,7 +65,7 @@ static const struct hw_sequencer_funcs dcn32_funcs = {
.update_bandwidth = dcn20_update_bandwidth,
.set_drr = dcn10_set_drr,
.get_position = dcn10_get_position,
- .set_static_screen_control = dcn10_set_static_screen_control,
+ .set_static_screen_control = dcn30_set_static_screen_control,
.setup_stereo = dcn10_setup_stereo,
.set_avmute = dcn30_set_avmute,
.log_hw_state = dcn10_log_hw_state,
--
2.37.3
next prev parent reply other threads:[~2023-08-16 6:08 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-16 6:06 [PATCH 00/16] DC Patches August 18, 2023 Wayne Lin
2023-08-16 6:06 ` [PATCH 01/16] drm/amd/display: Expose mall capability Wayne Lin
2023-08-16 6:06 ` [PATCH 02/16] drm/amd/display: Blank phantom OTG before enabling Wayne Lin
2023-08-16 6:06 ` [PATCH 03/16] drm/amd/display: PQ tail accuracy Wayne Lin
2023-08-16 6:06 ` [PATCH 04/16] drm/amd/display: PQ regamma end point Wayne Lin
2023-08-16 6:06 ` [PATCH 05/16] drm/amd/display: Refactor edp power control Wayne Lin
2023-08-16 6:06 ` [PATCH 06/16] drm/amd/display: Enable runtime register offset init for DCN32 DMUB Wayne Lin
2023-08-16 6:06 ` [PATCH 07/16] drm/amd/display: Roll back unit correction Wayne Lin
2023-08-16 6:06 ` [PATCH 08/16] drm/amd/display: Correct unit conversion for vstartup Wayne Lin
2023-08-16 6:06 ` [PATCH 09/16] drm/amd/display: set minimum of VBlank_nom Wayne Lin
2023-08-16 6:06 ` [PATCH 10/16] drm/amd/display: Write flip addr to scratch reg for subvp Wayne Lin
2023-08-16 6:06 ` Wayne Lin [this message]
2023-08-16 6:06 ` [PATCH 12/16] drm/amd/display: Save addr update in scratch before flip Wayne Lin
2023-08-16 6:06 ` [PATCH 13/16] drm/amd/display: add check for PMFW hard min request complete Wayne Lin
2023-08-16 6:06 ` [PATCH 14/16] drm/amd/display: ensure FS is enabled before sending request to DMUB for FS changes Wayne Lin
2023-08-16 6:06 ` [PATCH 15/16] drm/amd/display: [FW Promotion] Release 0.0.180.0 Wayne Lin
2023-08-16 6:06 ` [PATCH 16/16] drm/amd/display: 3.2.248 Wayne Lin
2023-08-21 13:28 ` [PATCH 00/16] DC Patches August 18, 2023 Wheeler, Daniel
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