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From: Wayne Lin <Wayne.Lin@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: stylon.wang@amd.com, Reza Amini <reza.amini@amd.com>,
	Sunpeng.Li@amd.com, Harry.Wentland@amd.com,
	qingqing.zhuo@amd.com, Rodrigo.Siqueira@amd.com,
	roman.li@amd.com, solomon.chiu@amd.com, Aurabindo.Pillai@amd.com,
	Ovidiu Bunea <ovidiu.bunea@amd.com>,
	wayne.lin@amd.com, Bhawanpreet.Lakha@amd.com,
	agustin.gutierrez@amd.com, pavle.kotarac@amd.com
Subject: [PATCH 07/16] drm/amd/display: Roll back unit correction
Date: Wed, 16 Aug 2023 14:06:49 +0800	[thread overview]
Message-ID: <20230816060658.2141009-8-Wayne.Lin@amd.com> (raw)
In-Reply-To: <20230816060658.2141009-1-Wayne.Lin@amd.com>

From: Ovidiu Bunea <ovidiu.bunea@amd.com>

[why]
This Unit correction exposes a Replay corruption.

[how]
This reverts commit:
commit 7d3cedf18068 ("drm/amd/display: Correct unit conversion for vstartup")

Roll back unit conversion until Replay can fix their corruption.

Fixes: 7d3cedf18068 ("drm/amd/display: Correct unit conversion for vstartup")
Reviewed-by: Reza Amini <reza.amini@amd.com>
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Ovidiu Bunea <ovidiu.bunea@amd.com>
---
 .../amd/display/dc/dml/dcn314/dcn314_fpu.c    | 25 +------------------
 1 file changed, 1 insertion(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c
index 07adb614366e..ed8ddb75b333 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c
@@ -31,7 +31,6 @@
 #include "dml/dcn20/dcn20_fpu.h"
 #include "dml/dcn31/dcn31_fpu.h"
 #include "dml/display_mode_vba.h"
-#include "dml/dml_inline_defs.h"
 
 struct _vcs_dpi_ip_params_st dcn3_14_ip = {
 	.VBlankNomDefaultUS = 668,
@@ -274,25 +273,6 @@ static bool is_dual_plane(enum surface_pixel_format format)
 	return format >= SURFACE_PIXEL_FORMAT_VIDEO_BEGIN || format == SURFACE_PIXEL_FORMAT_GRPH_RGBE_ALPHA;
 }
 
-/*
- * micro_sec_to_vert_lines () - converts time to number of vertical lines for a given timing
- *
- * @param: num_us: number of microseconds
- * @return: number of vertical lines. If exact number of vertical lines is not found then
- *          it will round up to next number of lines to guarantee num_us
- */
-static unsigned int micro_sec_to_vert_lines(unsigned int num_us, struct dc_crtc_timing *timing)
-{
-	unsigned int num_lines = 0;
-	unsigned int lines_time_in_ns = 1000.0 *
-			(((float)timing->h_total * 1000.0) /
-			 ((float)timing->pix_clk_100hz / 10.0));
-
-	num_lines = dml_ceil(1000.0 * num_us / lines_time_in_ns, 1.0);
-
-	return num_lines;
-}
-
 int dcn314_populate_dml_pipes_from_context_fpu(struct dc *dc, struct dc_state *context,
 					       display_e2e_pipe_params_st *pipes,
 					       bool fast_validate)
@@ -309,22 +289,19 @@ int dcn314_populate_dml_pipes_from_context_fpu(struct dc *dc, struct dc_state *c
 
 	for (i = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) {
 		struct dc_crtc_timing *timing;
-		unsigned int num_lines = 0;
 
 		if (!res_ctx->pipe_ctx[i].stream)
 			continue;
 		pipe = &res_ctx->pipe_ctx[i];
 		timing = &pipe->stream->timing;
 
-		num_lines = micro_sec_to_vert_lines(dcn3_14_ip.VBlankNomDefaultUS, timing);
-
 		if (pipe->stream->adjust.v_total_min != 0)
 			pipes[pipe_cnt].pipe.dest.vtotal = pipe->stream->adjust.v_total_min;
 		else
 			pipes[pipe_cnt].pipe.dest.vtotal = timing->v_total;
 
 		pipes[pipe_cnt].pipe.dest.vblank_nom = timing->v_total - pipes[pipe_cnt].pipe.dest.vactive;
-		pipes[pipe_cnt].pipe.dest.vblank_nom = min(pipes[pipe_cnt].pipe.dest.vblank_nom, num_lines);
+		pipes[pipe_cnt].pipe.dest.vblank_nom = min(pipes[pipe_cnt].pipe.dest.vblank_nom, dcn3_14_ip.VBlankNomDefaultUS);
 		pipes[pipe_cnt].pipe.dest.vblank_nom = max(pipes[pipe_cnt].pipe.dest.vblank_nom, timing->v_sync_width);
 		pipes[pipe_cnt].pipe.dest.vblank_nom = min(pipes[pipe_cnt].pipe.dest.vblank_nom, max_allowed_vblank_nom);
 
-- 
2.37.3


  parent reply	other threads:[~2023-08-16  6:08 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-16  6:06 [PATCH 00/16] DC Patches August 18, 2023 Wayne Lin
2023-08-16  6:06 ` [PATCH 01/16] drm/amd/display: Expose mall capability Wayne Lin
2023-08-16  6:06 ` [PATCH 02/16] drm/amd/display: Blank phantom OTG before enabling Wayne Lin
2023-08-16  6:06 ` [PATCH 03/16] drm/amd/display: PQ tail accuracy Wayne Lin
2023-08-16  6:06 ` [PATCH 04/16] drm/amd/display: PQ regamma end point Wayne Lin
2023-08-16  6:06 ` [PATCH 05/16] drm/amd/display: Refactor edp power control Wayne Lin
2023-08-16  6:06 ` [PATCH 06/16] drm/amd/display: Enable runtime register offset init for DCN32 DMUB Wayne Lin
2023-08-16  6:06 ` Wayne Lin [this message]
2023-08-16  6:06 ` [PATCH 08/16] drm/amd/display: Correct unit conversion for vstartup Wayne Lin
2023-08-16  6:06 ` [PATCH 09/16] drm/amd/display: set minimum of VBlank_nom Wayne Lin
2023-08-16  6:06 ` [PATCH 10/16] drm/amd/display: Write flip addr to scratch reg for subvp Wayne Lin
2023-08-16  6:06 ` [PATCH 11/16] drm/amd/display: fix static screen detection setting Wayne Lin
2023-08-16  6:06 ` [PATCH 12/16] drm/amd/display: Save addr update in scratch before flip Wayne Lin
2023-08-16  6:06 ` [PATCH 13/16] drm/amd/display: add check for PMFW hard min request complete Wayne Lin
2023-08-16  6:06 ` [PATCH 14/16] drm/amd/display: ensure FS is enabled before sending request to DMUB for FS changes Wayne Lin
2023-08-16  6:06 ` [PATCH 15/16] drm/amd/display: [FW Promotion] Release 0.0.180.0 Wayne Lin
2023-08-16  6:06 ` [PATCH 16/16] drm/amd/display: 3.2.248 Wayne Lin
2023-08-21 13:28 ` [PATCH 00/16] DC Patches August 18, 2023 Wheeler, Daniel

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