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From: <Roman.Li@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: Daniel Wheeler <daniel.wheeler@amd.com>, <Harry.Wentland@amd.com>,
	<Sunpeng.Li@amd.com>, <Rodrigo.Siqueira@amd.com>,
	<Aurabindo.Pillai@amd.com>,  <roman.li@amd.com>,
	<wayne.lin@amd.com>, <solomon.chiu@amd.com>,
	<agustin.gutierrez@amd.com>, <hamza.mahfooz@amd.com>
Subject: [PATCH 40/43] drm/amd/display: Add code comments clock and encode code
Date: Thu, 28 Mar 2024 15:50:44 -0400	[thread overview]
Message-ID: <20240328195047.2843715-41-Roman.Li@amd.com> (raw)
In-Reply-To: <20240328195047.2843715-1-Roman.Li@amd.com>

From: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>

This commit adds some comments to make easier to understand the clock
update for DCN 201, the encode function, and other minor comments.

Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
---
 .../amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c    | 11 +++++++++++
 drivers/gpu/drm/amd/display/dc/dcn201/dcn201_hubbub.c |  2 +-
 .../display/dc/dcn31/dcn31_hpo_dp_stream_encoder.c    |  4 ++++
 drivers/gpu/drm/amd/display/dc/resource/Makefile      |  6 ------
 4 files changed, 16 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c
index 9c90090e7351..f77840dd051e 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c
@@ -100,7 +100,15 @@ static void dcn201_update_clocks(struct clk_mgr *clk_mgr_base,
 
 	if (clk_mgr_base->clks.dispclk_khz == 0 ||
 	    dc->debug.force_clock_mode & 0x1) {
+		/* this is from resume or boot up, if forced_clock cfg option
+		 * used, we bypass program dispclk and DPPCLK, but need set them
+		 * for S3.
+		 */
+
 		force_reset = true;
+		/* force_clock_mode 0x1:  force reset the clock even it is the
+		 * same clock as long as it is in Passive level.
+		 */
 
 		dcn2_read_clocks_from_hw_dentist(clk_mgr_base);
 	}
@@ -150,11 +158,14 @@ static void dcn201_update_clocks(struct clk_mgr *clk_mgr_base,
 
 	if (dc->config.forced_clocks == false || (force_reset && safe_to_lower)) {
 		if (dpp_clock_lowered) {
+			// if clock is being lowered, increase DTO before lowering refclk
 			dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower);
 			dcn20_update_clocks_update_dentist(clk_mgr, context);
 		} else {
+			// if clock is being raised, increase refclk before lowering DTO
 			if (update_dppclk || update_dispclk)
 				dcn20_update_clocks_update_dentist(clk_mgr, context);
+			// always update dtos unless clock is lowered and not safe to lower
 			dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower);
 		}
 	}
diff --git a/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_hubbub.c b/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_hubbub.c
index 09ea65acb2c4..63798132ed95 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_hubbub.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_hubbub.c
@@ -103,5 +103,5 @@ void hubbub201_construct(struct dcn20_hubbub *hubbub,
 	hubbub->masks = hubbub_mask;
 
 	hubbub->debug_test_index_pstate = 0xB;
-	hubbub->detile_buf_size = 164 * 1024;
+	hubbub->detile_buf_size = 164 * 1024; /* 164KB for DCN2.0 */
 }
diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hpo_dp_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hpo_dp_stream_encoder.c
index 45143459eedd..678db949cfe3 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hpo_dp_stream_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hpo_dp_stream_encoder.c
@@ -474,6 +474,10 @@ static void dcn31_hpo_dp_stream_enc_update_dp_info_packets(
 				&info_frame->hdrsmd,
 				true);
 
+	/* packetIndex 4 is used for send immediate sdp message, and please
+	 * use other packetIndex (such as 5,6) for other info packet
+	 */
+
 	if (info_frame->adaptive_sync.valid)
 		enc->vpg->funcs->update_generic_info_packet(
 				enc->vpg,
diff --git a/drivers/gpu/drm/amd/display/dc/resource/Makefile b/drivers/gpu/drm/amd/display/dc/resource/Makefile
index 184b1f23aa77..db9048974d74 100644
--- a/drivers/gpu/drm/amd/display/dc/resource/Makefile
+++ b/drivers/gpu/drm/amd/display/dc/resource/Makefile
@@ -102,10 +102,6 @@ AMD_DISPLAY_FILES += $(AMD_DAL_RESOURCE_DCN21)
 
 ###############################################################################
 
-###############################################################################
-
-###############################################################################
-
 RESOURCE_DCN30 = dcn30_resource.o
 
 AMD_DAL_RESOURCE_DCN30 = $(addprefix $(AMDDALPATH)/dc/resource/dcn30/,$(RESOURCE_DCN30))
@@ -202,6 +198,4 @@ AMD_DISPLAY_FILES += $(AMD_DAL_RESOURCE_DCN351)
 
 ###############################################################################
 
-###############################################################################
-
 endif
-- 
2.34.1


  parent reply	other threads:[~2024-03-28 19:52 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-28 19:50 [PATCH 00/43] DC Patches Apr 1, 2024 Roman.Li
2024-03-28 19:50 ` [PATCH 01/43] drm/amd/display: Fix compiler redefinition warnings for certain configs Roman.Li
2024-04-01 13:07   ` Wheeler, Daniel
2024-03-28 19:50 ` [PATCH 02/43] drm/amd/display: Add timing pixel encoding for mst mode validation Roman.Li
2024-03-28 19:50 ` [PATCH 03/43] drm/amd/display: fix underflow in some two display subvp/non-subvp configs Roman.Li
2024-03-28 19:50 ` [PATCH 04/43] drm/amd/display: optimize dml2 pipe resource allocation order Roman.Li
2024-03-28 19:50 ` [PATCH 05/43] drm/amd/display: Toggle additional RCO options in DCN35 Roman.Li
2024-03-28 19:50 ` [PATCH 06/43] drm/amd/display: Decouple dcn35 and dcn351 dmub firmware Roman.Li
2024-03-28 19:50 ` [PATCH 07/43] drm/amd/display: Expand supported Replay residency mode Roman.Li
2024-03-28 19:50 ` [PATCH 08/43] drm/amd/display: FEC overhead should be checked once for mst slot nums Roman.Li
2024-07-18  7:09   ` Jiri Slaby
2024-07-30  6:00     ` Lin, Wayne
2024-07-31  6:47       ` Jiri Slaby
2024-03-28 19:50 ` [PATCH 09/43] drm/amd/display: handle invalid connector indices Roman.Li
2024-03-28 19:50 ` [PATCH 10/43] drm/amd/display: Add dmub additional interface support for FAMS Roman.Li
2024-03-28 19:50 ` [PATCH 11/43] drm/amd/display: update pipe topology log to support subvp Roman.Li
2024-03-28 19:50 ` [PATCH 12/43] drm/amd/display: Enable DTBCLK DTO earlier in the sequence Roman.Li
2024-03-28 19:50 ` [PATCH 13/43] drm/amd/display: Add dummy interface for tracing DCN32 SMU messages Roman.Li
2024-03-28 19:50 ` [PATCH 14/43] drm/amd/display: Enable RCO for HDMISTREAMCLK in DCN35 Roman.Li
2024-03-28 19:50 ` [PATCH 15/43] drm/amd/display: Allow HPO PG for DCN35 Roman.Li
2024-03-28 19:50 ` [PATCH 16/43] drm/amd/display: Skip on writeback when it's not applicable Roman.Li
2024-03-28 19:50 ` [PATCH 17/43] drm/amd/display: Add OTG check for set AV mute Roman.Li
2024-03-28 19:50 ` [PATCH 18/43] drm/amd/display: Add extra logging for HUBP and OTG Roman.Li
2024-03-28 19:50 ` [PATCH 19/43] drm/amd/display: Disable Z8 minimum stutter period check for DCN35 Roman.Li
2024-03-28 19:50 ` [PATCH 20/43] drm/amd/display: add root clock control function pointer to fix display corruption Roman.Li
2024-03-28 19:50 ` [PATCH 21/43] drm/amd/display: Add extra DMUB logging to track message timeout Roman.Li
2024-03-28 19:50 ` [PATCH 22/43] drm/amd/display: remove context->dml2 dependency from DML21 wrapper Roman.Li
2024-03-28 19:50 ` [PATCH 23/43] drm/amd/display: Add handling for DC power mode Roman.Li
2024-03-28 19:50 ` [PATCH 24/43] drm/amd/display: move build test pattern params as part of pipe resource update for odm Roman.Li
2024-03-28 19:50 ` [PATCH 25/43] drm/amd/display: Fix compiler warnings on high compiler warning levels Roman.Li
2024-03-28 19:50 ` [PATCH 26/43] drm/amd/display: Allow RCG for Static Screen + LVP for DCN35 Roman.Li
2024-03-28 19:50 ` [PATCH 27/43] drm/amd/display: 3.2.279 Roman.Li
2024-03-28 19:50 ` [PATCH 28/43] drm/amd/display: Initialize DP ref clk with the correct clock Roman.Li
2024-03-28 19:50 ` [PATCH 29/43] drm/amd/display: Set alpha enable to 0 for some specific formats Roman.Li
2024-03-28 19:50 ` [PATCH 30/43] drm/amd/display: Enable cur_rom_en even if cursor degamma is not enabled Roman.Li
2024-04-01 13:40   ` Melissa Wen
2024-04-01 13:52     ` Harry Wentland
2024-03-28 19:50 ` [PATCH 31/43] drm/amd/display: Add some missing debug registers Roman.Li
2024-03-28 19:50 ` [PATCH 32/43] drm/amd/display: Update DSC compute parameter calculation Roman.Li
2024-03-28 19:50 ` [PATCH 33/43] drm/amd/display: Drop legacy code Roman.Li
2024-03-28 19:50 ` [PATCH 34/43] drm/amd/display: Add missing registers Roman.Li
2024-03-28 19:50 ` [PATCH 35/43] drm/amd/display: Remove redundant RESERVE0 and RESERVE1 Roman.Li
2024-03-28 19:50 ` [PATCH 36/43] drm/amd/display: Add missing SFB and OPP_SF Roman.Li
2024-03-28 19:50 ` [PATCH 37/43] drm/amd/display: Initialize debug variable data Roman.Li
2024-03-28 19:50 ` [PATCH 38/43] drm/amd/display: Fix MPCC DTN logging Roman.Li
2024-04-01 13:30   ` Melissa Wen
2024-03-28 19:50 ` [PATCH 39/43] drm/amd/display: Add WBSCL ram coefficient for writeback Roman.Li
2024-03-28 19:50 ` Roman.Li [this message]
2024-03-28 19:50 ` [PATCH 41/43] drm/amd/display: Includes adjustments Roman.Li
2024-03-28 19:50 ` [PATCH 42/43] drm/amd/display: Add color logs for dcn20 Roman.Li
2024-03-28 19:50 ` [PATCH 43/43] drm/amd/display: Enable FGCG for DCN351 Roman.Li
2024-04-01 13:21 ` [PATCH 00/43] DC Patches Apr 1, 2024 Wheeler, Daniel

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