From: <boyuan.zhang@amd.com>
To: <amd-gfx@lists.freedesktop.org>, <leo.liu@amd.com>,
<christian.koenig@amd.com>, <alexander.deucher@amd.com>,
<sunil.khatri@amd.com>
Cc: Boyuan Zhang <boyuan.zhang@amd.com>
Subject: [PATCH 31/32] drm/amdgpu: is_idle for each vcn instance
Date: Tue, 8 Oct 2024 17:15:52 -0400 [thread overview]
Message-ID: <20241008211553.36264-32-boyuan.zhang@amd.com> (raw)
In-Reply-To: <20241008211553.36264-1-boyuan.zhang@amd.com>
From: Boyuan Zhang <boyuan.zhang@amd.com>
Perform is_idle only for the instance of the current vcn IP block,
instead of perform it for all vcn instances.
Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
---
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 11 +++++------
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 11 +++++------
drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c | 11 +++++------
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c | 9 ++++-----
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c | 11 +++++------
drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c | 11 +++++------
6 files changed, 29 insertions(+), 35 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
index 936d37b8fd3c..0b62729fca89 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
@@ -1762,14 +1762,13 @@ static void vcn_v2_5_set_enc_ring_funcs(struct amdgpu_device *adev, int inst)
static bool vcn_v2_5_is_idle(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_device *adev = ip_block->adev;
- int i, ret = 1;
+ int inst = ip_block->instance;
+ int ret = 1;
- for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
- if (adev->vcn.harvest_config & (1 << i))
- continue;
+ if (adev->vcn.harvest_config & (1 << inst))
+ return ret;
- ret &= (RREG32_SOC15(VCN, i, mmUVD_STATUS) == UVD_STATUS__IDLE);
- }
+ ret &= (RREG32_SOC15(VCN, inst, mmUVD_STATUS) == UVD_STATUS__IDLE);
return ret;
}
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
index d1074490fdc9..5b11062b873d 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
@@ -2090,14 +2090,13 @@ static void vcn_v3_0_set_enc_ring_funcs(struct amdgpu_device *adev, int inst)
static bool vcn_v3_0_is_idle(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_device *adev = ip_block->adev;
- int i, ret = 1;
+ int inst = ip_block->instance;
+ int ret = 1;
- for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
- if (adev->vcn.harvest_config & (1 << i))
- continue;
+ if (adev->vcn.harvest_config & (1 << inst))
+ return ret;
- ret &= (RREG32_SOC15(VCN, i, mmUVD_STATUS) == UVD_STATUS__IDLE);
- }
+ ret &= (RREG32_SOC15(VCN, inst, mmUVD_STATUS) == UVD_STATUS__IDLE);
return ret;
}
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
index a6d3425b499b..69fff5df1c68 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
@@ -1946,14 +1946,13 @@ static void vcn_v4_0_set_unified_ring_funcs(struct amdgpu_device *adev, int inst
static bool vcn_v4_0_is_idle(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_device *adev = ip_block->adev;
- int i, ret = 1;
+ int inst = ip_block->instance;
+ int ret = 1;
- for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
- if (adev->vcn.harvest_config & (1 << i))
- continue;
+ if (adev->vcn.harvest_config & (1 << inst))
+ return ret;
- ret &= (RREG32_SOC15(VCN, i, regUVD_STATUS) == UVD_STATUS__IDLE);
- }
+ ret &= (RREG32_SOC15(VCN, inst, regUVD_STATUS) == UVD_STATUS__IDLE);
return ret;
}
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
index 258c14fdfd23..cb30d5e5bc70 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
@@ -1546,12 +1546,11 @@ static void vcn_v4_0_3_set_unified_ring_funcs(struct amdgpu_device *adev, int in
static bool vcn_v4_0_3_is_idle(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_device *adev = ip_block->adev;
- int i, ret = 1;
+ int inst = ip_block->instance;
+ int ret = 1;
- for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
- ret &= (RREG32_SOC15(VCN, GET_INST(VCN, i), regUVD_STATUS) ==
- UVD_STATUS__IDLE);
- }
+ ret &= (RREG32_SOC15(VCN, GET_INST(VCN, inst), regUVD_STATUS) ==
+ UVD_STATUS__IDLE);
return ret;
}
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c
index 90a39a461e86..68397bea5a18 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c
@@ -1443,14 +1443,13 @@ static void vcn_v4_0_5_set_unified_ring_funcs(struct amdgpu_device *adev, int in
static bool vcn_v4_0_5_is_idle(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_device *adev = ip_block->adev;
- int i, ret = 1;
+ int inst = ip_block->instance;
+ int ret = 1;
- for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
- if (adev->vcn.harvest_config & (1 << i))
- continue;
+ if (adev->vcn.harvest_config & (1 << inst))
+ return ret;
- ret &= (RREG32_SOC15(VCN, i, regUVD_STATUS) == UVD_STATUS__IDLE);
- }
+ ret &= (RREG32_SOC15(VCN, inst, regUVD_STATUS) == UVD_STATUS__IDLE);
return ret;
}
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c
index 456951bf304f..fd78472b906a 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c
@@ -1170,14 +1170,13 @@ static void vcn_v5_0_0_set_unified_ring_funcs(struct amdgpu_device *adev, int in
static bool vcn_v5_0_0_is_idle(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_device *adev = ip_block->adev;
- int i, ret = 1;
+ int inst = ip_block->instance;
+ int ret = 1;
- for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
- if (adev->vcn.harvest_config & (1 << i))
- continue;
+ if (adev->vcn.harvest_config & (1 << inst))
+ return ret;
- ret &= (RREG32_SOC15(VCN, i, regUVD_STATUS) == UVD_STATUS__IDLE);
- }
+ ret &= (RREG32_SOC15(VCN, inst, regUVD_STATUS) == UVD_STATUS__IDLE);
return ret;
}
--
2.34.1
next prev parent reply other threads:[~2024-10-08 21:16 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-08 21:15 [PATCH 00/32] Separating vcn power management by instance boyuan.zhang
2024-10-08 21:15 ` [PATCH 01/32] drm/amd/pm: add inst to dpm_set_vcn_enable boyuan.zhang
2024-10-08 21:15 ` [PATCH 02/32] drm/amd/pm: power up or down vcn by instance boyuan.zhang
2024-10-09 11:37 ` Christian König
2024-10-08 21:15 ` [PATCH 03/32] drm/amd/pm: add inst to smu_dpm_set_vcn_enable boyuan.zhang
2024-10-08 21:15 ` [PATCH 04/32] drm/amd/pm: add inst to set_powergating_by_smu boyuan.zhang
2024-10-08 21:15 ` [PATCH 05/32] drm/amd/pm: add inst to dpm_set_powergating_by_smu boyuan.zhang
2024-10-08 21:15 ` [PATCH 06/32] add inst to amdgpu_dpm_enable_vcn boyuan.zhang
2024-10-08 21:15 ` [PATCH 07/32] drm/amdgpu: pass ip_block in set_powergating_state boyuan.zhang
2024-10-08 21:15 ` [PATCH 08/32] drm/amdgpu: pass ip_block in set_clockgating_state boyuan.zhang
2024-10-08 21:15 ` [PATCH 09/32] drm/amdgpu: track instances of the same IP block boyuan.zhang
2024-10-08 21:15 ` [PATCH 10/32] drm/amdgpu: move per inst variables to amdgpu_vcn_inst boyuan.zhang
2024-10-08 21:15 ` [PATCH 11/32] drm/amdgpu/vcn: separate gating state by instance boyuan.zhang
2024-10-08 21:15 ` [PATCH 12/32] drm/amdgpu: power vcn 2_5 " boyuan.zhang
2024-10-08 21:15 ` [PATCH 13/32] drm/amdgpu: power vcn 3_0 " boyuan.zhang
2024-10-08 21:15 ` [PATCH 14/32] drm/amdgpu: power vcn 4_0 " boyuan.zhang
2024-10-08 21:15 ` [PATCH 15/32] drm/amdgpu: power vcn 4_0_3 " boyuan.zhang
2024-10-08 21:15 ` [PATCH 16/32] drm/amdgpu: power vcn 4_0_5 " boyuan.zhang
2024-10-08 21:15 ` [PATCH 17/32] drm/amdgpu: power vcn 5_0_0 " boyuan.zhang
2024-10-08 21:15 ` [PATCH 18/32] drm/amdgpu/vcn: separate idle work " boyuan.zhang
2024-10-08 21:15 ` [PATCH 19/32] drm/amdgpu: set powergating state by vcn instance boyuan.zhang
2024-10-08 21:15 ` [PATCH 20/32] drm/amdgpu: early_init for each " boyuan.zhang
2024-10-08 21:15 ` [PATCH 21/32] drm/amdgpu: sw_init " boyuan.zhang
2024-10-08 21:15 ` [PATCH 22/32] drm/amdgpu: sw_fini " boyuan.zhang
2024-10-08 21:15 ` [PATCH 23/32] drm/amdgpu: hw_init " boyuan.zhang
2024-10-08 21:15 ` [PATCH 24/32] drm/amdgpu: suspend " boyuan.zhang
2024-10-08 21:15 ` [PATCH 25/32] drm/amdgpu: resume " boyuan.zhang
2024-10-08 21:15 ` [PATCH 26/32] drm/amdgpu: setup_ucode " boyuan.zhang
2024-10-08 21:15 ` [PATCH 27/32] drm/amdgpu: set funcs " boyuan.zhang
2024-10-08 21:15 ` [PATCH 28/32] drm/amdgpu: print_ip_state " boyuan.zhang
2024-10-08 21:15 ` [PATCH 29/32] drm/amdgpu: dump_ip_state " boyuan.zhang
2024-10-08 21:15 ` [PATCH 30/32] drm/amdgpu: wait_for_idle " boyuan.zhang
2024-10-08 21:15 ` boyuan.zhang [this message]
2024-10-08 21:15 ` [PATCH 32/32] drm/amdgpu: set_powergating " boyuan.zhang
-- strict thread matches above, loose matches on Subject: below --
2024-10-17 13:20 [PATCH 00/32] Separating vcn power management by instance boyuan.zhang
2024-10-17 13:20 ` [PATCH 31/32] drm/amdgpu: is_idle for each vcn instance boyuan.zhang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20241008211553.36264-32-boyuan.zhang@amd.com \
--to=boyuan.zhang@amd.com \
--cc=alexander.deucher@amd.com \
--cc=amd-gfx@lists.freedesktop.org \
--cc=christian.koenig@amd.com \
--cc=leo.liu@amd.com \
--cc=sunil.khatri@amd.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox