[PATCH 1/2] drm/amdgpu: add UAPI to query if user queues are supported

[PATCH 1/2] drm/amdgpu: add UAPI to query if user queues are supported

[Alex Deucher]

Add an INFO query to check if user queues are supported.

v2: switch to a mask of IPs (Marek)
v3: move to drm_amdgpu_info_device (Marek)

Cc: marek.olsak@amd.com
Cc: prike.liang@amd.com
Cc: sunil.khatri@amd.com
Cc: yogesh.mohanmarimuthu@amd.com
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 7 +++++++
 include/uapi/drm/amdgpu_drm.h           | 3 +++
 2 files changed, 10 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 3b7dfd56ccd0e..0ba3ef1e4a068 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -1009,6 +1009,13 @@ int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
 			}
 		}
 
+		if (adev->userq_funcs[AMDGPU_HW_IP_GFX])
+			dev_info->userq_ip_mask |= (1 << AMDGPU_HW_IP_GFX);
+		if (adev->userq_funcs[AMDGPU_HW_IP_COMPUTE])
+			dev_info->userq_ip_mask |= (1 << AMDGPU_HW_IP_COMPUTE);
+		if (adev->userq_funcs[AMDGPU_HW_IP_DMA])
+			dev_info->userq_ip_mask |= (1 << AMDGPU_HW_IP_DMA);
+
 		ret = copy_to_user(out, dev_info,
 				   min((size_t)size, sizeof(*dev_info))) ? -EFAULT : 0;
 		kfree(dev_info);
diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
index 5dbd9037afe75..ef97c0d78b8a0 100644
--- a/include/uapi/drm/amdgpu_drm.h
+++ b/include/uapi/drm/amdgpu_drm.h
@@ -1453,6 +1453,9 @@ struct drm_amdgpu_info_device {
 	__u32 csa_size;
 	/* context save area base virtual alignment for gfx11 */
 	__u32 csa_alignment;
+	/* Userq IP mask (1 << AMDGPU_HW_IP_*) */
+	__u32 userq_ip_mask;
+	__u32 pad;
 };
 
 struct drm_amdgpu_info_hw_ip {
-- 
2.49.0

[PATCH 2/2] drm/amdgpu: bump version for user queue IP support query

[Alex Deucher]

Add the user queue IP support query to the drm_amdgpu_info_device
query.

Cc: marek.olsak@amd.com
Cc: prike.liang@amd.com
Cc: sunil.khatri@amd.com
Cc: yogesh.mohanmarimuthu@amd.com
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index b96d8c45312e6..4df11afe91252 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -125,9 +125,10 @@
  * - 3.61.0 - Contains fix for RV/PCO compute queues
  * - 3.62.0 - Add AMDGPU_IDS_FLAGS_MODE_PF, AMDGPU_IDS_FLAGS_MODE_VF & AMDGPU_IDS_FLAGS_MODE_PT
  * - 3.63.0 - GFX12 display DCC supports 256B max compressed block size
+ * - 3.64.0 - Userq IP support query
  */
 #define KMS_DRIVER_MAJOR	3
-#define KMS_DRIVER_MINOR	63
+#define KMS_DRIVER_MINOR	64
 #define KMS_DRIVER_PATCHLEVEL	0
 
 /*
-- 
2.49.0

Re: [PATCH 2/2] drm/amdgpu: bump version for user queue IP support query

[Khatri, Sunil]

Reviewed-by: Sunil Khatri <sunil.khatri@amd.com>

On 3/25/2025 2:03 AM, Alex Deucher wrote:
> Add the user queue IP support query to the drm_amdgpu_info_device
> query.
>
> Cc: marek.olsak@amd.com
> Cc: prike.liang@amd.com
> Cc: sunil.khatri@amd.com
> Cc: yogesh.mohanmarimuthu@amd.com
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> index b96d8c45312e6..4df11afe91252 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> @@ -125,9 +125,10 @@
>    * - 3.61.0 - Contains fix for RV/PCO compute queues
>    * - 3.62.0 - Add AMDGPU_IDS_FLAGS_MODE_PF, AMDGPU_IDS_FLAGS_MODE_VF & AMDGPU_IDS_FLAGS_MODE_PT
>    * - 3.63.0 - GFX12 display DCC supports 256B max compressed block size
> + * - 3.64.0 - Userq IP support query
>    */
>   #define KMS_DRIVER_MAJOR	3
> -#define KMS_DRIVER_MINOR	63
> +#define KMS_DRIVER_MINOR	64
>   #define KMS_DRIVER_PATCHLEVEL	0
>   
>   /*

Re: [PATCH 1/2] drm/amdgpu: add UAPI to query if user queues are supported

[Marek Olšák]

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Reviewed-by: Marek Olšák <marek.olsak@amd.com>

For both patches.

Marek

On Mon, Mar 24, 2025 at 4:34 PM Alex Deucher <alexander.deucher@amd.com>
wrote:

> Add an INFO query to check if user queues are supported.
>
> v2: switch to a mask of IPs (Marek)
> v3: move to drm_amdgpu_info_device (Marek)
>
> Cc: marek.olsak@amd.com
> Cc: prike.liang@amd.com
> Cc: sunil.khatri@amd.com
> Cc: yogesh.mohanmarimuthu@amd.com
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 7 +++++++
>  include/uapi/drm/amdgpu_drm.h           | 3 +++
>  2 files changed, 10 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> index 3b7dfd56ccd0e..0ba3ef1e4a068 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> @@ -1009,6 +1009,13 @@ int amdgpu_info_ioctl(struct drm_device *dev, void
> *data, struct drm_file *filp)
>                         }
>                 }
>
> +               if (adev->userq_funcs[AMDGPU_HW_IP_GFX])
> +                       dev_info->userq_ip_mask |= (1 << AMDGPU_HW_IP_GFX);
> +               if (adev->userq_funcs[AMDGPU_HW_IP_COMPUTE])
> +                       dev_info->userq_ip_mask |= (1 <<
> AMDGPU_HW_IP_COMPUTE);
> +               if (adev->userq_funcs[AMDGPU_HW_IP_DMA])
> +                       dev_info->userq_ip_mask |= (1 << AMDGPU_HW_IP_DMA);
> +
>                 ret = copy_to_user(out, dev_info,
>                                    min((size_t)size, sizeof(*dev_info))) ?
> -EFAULT : 0;
>                 kfree(dev_info);
> diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
> index 5dbd9037afe75..ef97c0d78b8a0 100644
> --- a/include/uapi/drm/amdgpu_drm.h
> +++ b/include/uapi/drm/amdgpu_drm.h
> @@ -1453,6 +1453,9 @@ struct drm_amdgpu_info_device {
>         __u32 csa_size;
>         /* context save area base virtual alignment for gfx11 */
>         __u32 csa_alignment;
> +       /* Userq IP mask (1 << AMDGPU_HW_IP_*) */
> +       __u32 userq_ip_mask;
> +       __u32 pad;
>  };
>
>  struct drm_amdgpu_info_hw_ip {
> --
> 2.49.0
>
>

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RE: [PATCH 1/2] drm/amdgpu: add UAPI to query if user queues are supported

[Liang, Prike]

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[AMD Official Use Only - AMD Internal Distribution Only]

It may be better to use the following alignment attribute rather than manually adding the padding.

__attribute__((packed, aligned()))

Anyway, the patch set is

Reviewed-by: Prike Liang <Prike.Liang@amd.com<mailto:Prike.Liang@amd.com>>

Regards,
      Prike

From: Marek Olšák <maraeo@gmail.com>
Sent: Monday, April 7, 2025 1:40 PM
To: Deucher, Alexander <Alexander.Deucher@amd.com>
Cc: amd-gfx@lists.freedesktop.org; Olsak, Marek <Marek.Olsak@amd.com>; Liang, Prike <Prike.Liang@amd.com>; Khatri, Sunil <Sunil.Khatri@amd.com>; Mohan Marimuthu, Yogesh <Yogesh.Mohanmarimuthu@amd.com>
Subject: Re: [PATCH 1/2] drm/amdgpu: add UAPI to query if user queues are supported

Reviewed-by: Marek Olšák <marek.olsak@amd.com<mailto:marek.olsak@amd.com>>

For both patches.

Marek

On Mon, Mar 24, 2025 at 4:34 PM Alex Deucher <alexander.deucher@amd.com<mailto:alexander.deucher@amd.com>> wrote:
Add an INFO query to check if user queues are supported.

v2: switch to a mask of IPs (Marek)
v3: move to drm_amdgpu_info_device (Marek)

Cc: marek.olsak@amd.com<mailto:marek.olsak@amd.com>
Cc: prike.liang@amd.com<mailto:prike.liang@amd.com>
Cc: sunil.khatri@amd.com<mailto:sunil.khatri@amd.com>
Cc: yogesh.mohanmarimuthu@amd.com<mailto:yogesh.mohanmarimuthu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com<mailto:alexander.deucher@amd.com>>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 7 +++++++
 include/uapi/drm/amdgpu_drm.h           | 3 +++
 2 files changed, 10 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 3b7dfd56ccd0e..0ba3ef1e4a068 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -1009,6 +1009,13 @@ int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
                        }
                }

+               if (adev->userq_funcs[AMDGPU_HW_IP_GFX])
+                       dev_info->userq_ip_mask |= (1 << AMDGPU_HW_IP_GFX);
+               if (adev->userq_funcs[AMDGPU_HW_IP_COMPUTE])
+                       dev_info->userq_ip_mask |= (1 << AMDGPU_HW_IP_COMPUTE);
+               if (adev->userq_funcs[AMDGPU_HW_IP_DMA])
+                       dev_info->userq_ip_mask |= (1 << AMDGPU_HW_IP_DMA);
+
                ret = copy_to_user(out, dev_info,
                                   min((size_t)size, sizeof(*dev_info))) ? -EFAULT : 0;
                kfree(dev_info);
diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
index 5dbd9037afe75..ef97c0d78b8a0 100644
--- a/include/uapi/drm/amdgpu_drm.h
+++ b/include/uapi/drm/amdgpu_drm.h
@@ -1453,6 +1453,9 @@ struct drm_amdgpu_info_device {
        __u32 csa_size;
        /* context save area base virtual alignment for gfx11 */
        __u32 csa_alignment;
+       /* Userq IP mask (1 << AMDGPU_HW_IP_*) */
+       __u32 userq_ip_mask;
+       __u32 pad;
 };

 struct drm_amdgpu_info_hw_ip {
--
2.49.0

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Re: [PATCH 1/2] drm/amdgpu: add UAPI to query if user queues are supported

[Khatri, Sunil]

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Reviewed-by: Sunil Khatri <sunil.khatri@amd.com>

On 3/25/2025 2:03 AM, Alex Deucher wrote:
> Add an INFO query to check if user queues are supported.
>
> v2: switch to a mask of IPs (Marek)
> v3: move to drm_amdgpu_info_device (Marek)
>
> Cc:marek.olsak@amd.com
> Cc:prike.liang@amd.com
> Cc:sunil.khatri@amd.com
> Cc:yogesh.mohanmarimuthu@amd.com
> Signed-off-by: Alex Deucher<alexander.deucher@amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 7 +++++++
>   include/uapi/drm/amdgpu_drm.h           | 3 +++
>   2 files changed, 10 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> index 3b7dfd56ccd0e..0ba3ef1e4a068 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> @@ -1009,6 +1009,13 @@ int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
>   			}
>   		}
>   
> +		if (adev->userq_funcs[AMDGPU_HW_IP_GFX])
> +			dev_info->userq_ip_mask |= (1 << AMDGPU_HW_IP_GFX);
> +		if (adev->userq_funcs[AMDGPU_HW_IP_COMPUTE])
> +			dev_info->userq_ip_mask |= (1 << AMDGPU_HW_IP_COMPUTE);
> +		if (adev->userq_funcs[AMDGPU_HW_IP_DMA])
> +			dev_info->userq_ip_mask |= (1 << AMDGPU_HW_IP_DMA);
> +
>   		ret = copy_to_user(out, dev_info,
>   				   min((size_t)size, sizeof(*dev_info))) ? -EFAULT : 0;
>   		kfree(dev_info);
> diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
> index 5dbd9037afe75..ef97c0d78b8a0 100644
> --- a/include/uapi/drm/amdgpu_drm.h
> +++ b/include/uapi/drm/amdgpu_drm.h
> @@ -1453,6 +1453,9 @@ struct drm_amdgpu_info_device {
>   	__u32 csa_size;
>   	/* context save area base virtual alignment for gfx11 */
>   	__u32 csa_alignment;
> +	/* Userq IP mask (1 << AMDGPU_HW_IP_*) */
> +	__u32 userq_ip_mask;
> +	__u32 pad;
>   };
>   
>   struct drm_amdgpu_info_hw_ip {

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