From: Sasha Levin <sashal@kernel.org>
To: patches@lists.linux.dev, stable@vger.kernel.org
Cc: Alex Deucher <alexander.deucher@amd.com>,
Rodrigo Siqueira <siqueira@igalia.com>,
Sasha Levin <sashal@kernel.org>,
christian.koenig@amd.com, airlied@gmail.com, simona@ffwll.ch,
sunil.khatri@amd.com, vitaly.prosyak@amd.com,
shashank.sharma@amd.com, srinivasan.shanmugam@amd.com,
tim.huang@amd.com, Prike.Liang@amd.com, Jesse.zhang@amd.com,
amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
linux-kernel@vger.kernel.org
Subject: [PATCH AUTOSEL 6.15 021/110] drm/amdgpu/gfx11: fix CSIB handling
Date: Sun, 1 Jun 2025 19:23:03 -0400 [thread overview]
Message-ID: <20250601232435.3507697-21-sashal@kernel.org> (raw)
In-Reply-To: <20250601232435.3507697-1-sashal@kernel.org>
From: Alex Deucher <alexander.deucher@amd.com>
[ Upstream commit a9a8bccaa3ba64d509cf7df387cf0b5e1cd06499 ]
We shouldn't return after the last section.
We need to update the rest of the CSIB.
Reviewed-by: Rodrigo Siqueira <siqueira@igalia.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
**YES** This commit should be backported to stable kernel trees. ##
Analysis ### Code Change Analysis The commit fixes a **critical bug in
CSIB (Clear State Init Buffer) handling** in the GFX11 AMD GPU driver.
The problematic code in `gfx_v11_0_get_csb_buffer()` at line 861
contained: ```c } else { return; // This was the bug! } ``` This early
return statement prevented the function from completing the CSIB setup
when encountering non-SECT_CONTEXT sections. The fix removes this
premature return, allowing the function to continue and properly
complete the buffer initialization with: 1.
**PA_SC_TILE_STEERING_OVERRIDE register setup** (lines 866-870) 2.
**PACKET3_PREAMBLE_END_CLEAR_STATE** (lines 872-873) 3.
**PACKET3_CLEAR_STATE** (lines 875-876) ### Why This Qualifies for
Backporting 1. **Fixes Important Hardware Initialization Bug**: CSIB is
critical for GPU state management. Incomplete initialization can cause
GPU hangs, rendering artifacts, or system instability. 2. **Small,
Contained Fix**: The change removes only 2 lines (`} else { return; }`)
- minimal and low-risk. 3. **No Architectural Changes**: This is a pure
bugfix with no new features or major code restructuring. 4. **Critical
Subsystem**: Graphics drivers are essential for system functionality,
and GPU state corruption can cause severe user-visible issues. 5.
**Pattern Consistency**: Looking at similar sections across different
GFX versions (v10, v9, etc.), they all handle non-SECT_CONTEXT sections
by continuing rather than returning early, confirming this was indeed a
bug. ### Historical Context Support From examining the codebase, this
pattern is consistent across all GFX generations: - **gfx_v10_0.c:4227**
and **gfx_v10_0.c:4266**: Handle SECT_CONTEXT but continue for other
sections - **gfx_v9_0.c:1609** and **gfx_v9_0.c:1645**: Same pattern -
**gfx_v8_0.c**, **gfx_v7_0.c**, **gfx_v6_0.c**: All follow the same
approach The previous GFX10 CSIB fix (commit 4905880b4515) shows AMD's
commitment to ensuring proper CSIB initialization across GPU
generations, reinforcing the importance of this subsystem. ### Risk
Assessment - **Regression Risk**: Extremely low - only removes incorrect
early termination - **Testing Surface**: Affects GFX11 GPU
initialization, easily testable - **Side Effects**: None - only allows
completion of intended initialization sequence This is a textbook
example of a stable-worthy fix: important bug, minimal change, no
regression risk, and affects critical hardware functionality.
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index 2a5c2a1ae3c74..914c18f48e8e1 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
@@ -859,8 +859,6 @@ static void gfx_v11_0_get_csb_buffer(struct amdgpu_device *adev,
PACKET3_SET_CONTEXT_REG_START);
for (i = 0; i < ext->reg_count; i++)
buffer[count++] = cpu_to_le32(ext->extent[i]);
- } else {
- return;
}
}
}
--
2.39.5
next prev parent reply other threads:[~2025-06-01 23:25 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-01 23:22 [PATCH AUTOSEL 6.15 001/110] drm/amd/display: disable DPP RCG before DPP CLK enable Sasha Levin
2025-06-01 23:22 ` [PATCH AUTOSEL 6.15 003/110] drm/amdgpu/gfx6: fix CSIB handling Sasha Levin
2025-06-01 23:22 ` [PATCH AUTOSEL 6.15 008/110] drm/amdgpu: Fix API status offset for MES queue reset Sasha Levin
2025-06-01 23:22 ` [PATCH AUTOSEL 6.15 009/110] drm/amd/display: DCN32 null data check Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 020/110] drm/amdkfd: Drop workaround for GC v9.4.3 revID 0 Sasha Levin
2025-06-01 23:23 ` Sasha Levin [this message]
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 025/110] drm/amd/display: Avoid divide by zero by initializing dummy pitch to 1 Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 029/110] drm/amd/display: Add NULL pointer checks in dm_force_atomic_commit() Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 031/110] drm/amd/display: Skip to enable dsc if it has been off Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 032/110] drm/amdgpu: Add basic validation for RAS header Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 035/110] drm/amd/display: Do Not Consider DSC if Valid Config Not Found Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 037/110] drm/amdgpu/gfx10: fix CSIB handling Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 041/110] drm/amd/display: fix zero value for APU watermark_c Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 043/110] drm/amdgpu/gfx7: fix CSIB handling Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 049/110] drm/amd/display: Update IPS sequential_ono requirement checks Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 050/110] drm/amd/display: Correct SSC enable detection for DCN351 Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 051/110] drm/amd/display: Fix Vertical Interrupt definitions for dcn32, dcn401 Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 055/110] drm/amdgpu: fix MES GFX mask Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 056/110] drm/amdgpu: Disallow partition query during reset Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 059/110] drm/amdgpu/gfx8: fix CSIB handling Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 060/110] drm/amd/display: disable EASF narrow filter sharpening Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 061/110] drm/amdgpu/gfx9: fix CSIB handling Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 062/110] drm/amd/display: Fix VUpdate offset calculations for dcn401 Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 064/110] drm/amd/pm: Reset SMU v13.0.x custom settings Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 065/110] drm/amd/display: Correct prefetch calculation Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 066/110] drm/amd/display: Restructure DMI quirks Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 069/110] drm/amdkfd: Set SDMA_RLCx_IB_CNTL/SWITCH_INSIDE_IB Sasha Levin
2025-06-01 23:23 ` [PATCH AUTOSEL 6.15 076/110] drm/amdgpu: Add indirect L1_TLB_CNTL reg programming for VFs Sasha Levin
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