From: "Timur Kristóf" <timur.kristof@gmail.com>
To: amd-gfx@lists.freedesktop.org
Cc: alexander.deucher@amd.com, alex.hung@amd.com,
harry.wentland@amd.com, siqueira@igalia.com,
christian.koenig@amd.com,
"Timur Kristóf" <timur.kristof@gmail.com>
Subject: [PATCH 13/23] drm/amd/display: Support DAC in dce110_hwseq
Date: Fri, 26 Sep 2025 20:01:53 +0200 [thread overview]
Message-ID: <20250926180203.16690-14-timur.kristof@gmail.com> (raw)
In-Reply-To: <20250926180203.16690-1-timur.kristof@gmail.com>
The dce110_hwseq is used by all DCE hardware,
so add the DAC support here.
When enabling/disabling a stream for a RGB signal,
this will call the VBIOS to enable/disable the DAC.
Additionally, when applying the controller context,
call SelectCRTC_Source from VBIOS in order to
direct the CRTC output to the DAC.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
---
.../amd/display/dc/hwss/dce110/dce110_hwseq.c | 75 ++++++++++++++++++-
1 file changed, 73 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
index 24184b4eb352..975913375d05 100644
--- a/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
@@ -659,6 +659,20 @@ void dce110_update_info_frame(struct pipe_ctx *pipe_ctx)
}
}
+static void
+dce110_dac_encoder_control(struct pipe_ctx *pipe_ctx, bool enable)
+{
+ struct dc_link *link = pipe_ctx->stream->link;
+ struct dc_bios *bios = link->ctx->dc_bios;
+ struct bp_encoder_control encoder_control = {0};
+
+ encoder_control.action = enable ? ENCODER_CONTROL_ENABLE : ENCODER_CONTROL_DISABLE;
+ encoder_control.engine_id = link->link_enc->analog_engine;
+ encoder_control.pixel_clock = pipe_ctx->stream->timing.pix_clk_100hz / 10;
+
+ bios->funcs->encoder_control(bios, &encoder_control);
+}
+
void dce110_enable_stream(struct pipe_ctx *pipe_ctx)
{
enum dc_lane_count lane_count =
@@ -689,6 +703,9 @@ void dce110_enable_stream(struct pipe_ctx *pipe_ctx)
early_control = lane_count;
tg->funcs->set_early_control(tg, early_control);
+
+ if (dc_is_rgb_signal(pipe_ctx->stream->signal))
+ dce110_dac_encoder_control(pipe_ctx, true);
}
static enum bp_result link_transmitter_control(
@@ -1176,7 +1193,8 @@ void dce110_disable_stream(struct pipe_ctx *pipe_ctx)
pipe_ctx->stream_res.stream_enc->funcs->stop_dp_info_packets(
pipe_ctx->stream_res.stream_enc);
- dc->hwss.disable_audio_stream(pipe_ctx);
+ if (!dc_is_rgb_signal(pipe_ctx->stream->signal))
+ dc->hwss.disable_audio_stream(pipe_ctx);
link_hwss->reset_stream_encoder(pipe_ctx);
@@ -1196,6 +1214,9 @@ void dce110_disable_stream(struct pipe_ctx *pipe_ctx)
dccg->funcs->disable_symclk_se(dccg, stream_enc->stream_enc_inst,
link_enc->transmitter - TRANSMITTER_UNIPHY_A);
}
+
+ if (dc_is_rgb_signal(pipe_ctx->stream->signal))
+ dce110_dac_encoder_control(pipe_ctx, false);
}
void dce110_unblank_stream(struct pipe_ctx *pipe_ctx,
@@ -1581,6 +1602,51 @@ static enum dc_status dce110_enable_stream_timing(
return DC_OK;
}
+static void
+dce110_select_crtc_source(struct pipe_ctx *pipe_ctx)
+{
+ struct dc_link *link = pipe_ctx->stream->link;
+ struct dc_bios *bios = link->ctx->dc_bios;
+ struct bp_crtc_source_select crtc_source_select = {0};
+ enum engine_id engine_id = link->link_enc->preferred_engine;
+ uint8_t bit_depth;
+
+ if (dc_is_rgb_signal(pipe_ctx->stream->signal))
+ engine_id = link->link_enc->analog_engine;
+
+ switch (pipe_ctx->stream->timing.display_color_depth) {
+ case COLOR_DEPTH_UNDEFINED:
+ bit_depth = 0;
+ break;
+ case COLOR_DEPTH_666:
+ bit_depth = 6;
+ break;
+ default:
+ case COLOR_DEPTH_888:
+ bit_depth = 8;
+ break;
+ case COLOR_DEPTH_101010:
+ bit_depth = 10;
+ break;
+ case COLOR_DEPTH_121212:
+ bit_depth = 12;
+ break;
+ case COLOR_DEPTH_141414:
+ bit_depth = 14;
+ break;
+ case COLOR_DEPTH_161616:
+ bit_depth = 16;
+ break;
+ }
+
+ crtc_source_select.controller_id = CONTROLLER_ID_D0 + pipe_ctx->stream_res.tg->inst;
+ crtc_source_select.bit_depth = bit_depth;
+ crtc_source_select.engine_id = engine_id;
+ crtc_source_select.sink_signal = pipe_ctx->stream->signal;
+
+ bios->funcs->select_crtc_source(bios, &crtc_source_select);
+}
+
enum dc_status dce110_apply_single_controller_ctx_to_hw(
struct pipe_ctx *pipe_ctx,
struct dc_state *context,
@@ -1600,6 +1666,10 @@ enum dc_status dce110_apply_single_controller_ctx_to_hw(
hws->funcs.disable_stream_gating(dc, pipe_ctx);
}
+ if (pipe_ctx->stream->signal == SIGNAL_TYPE_RGB) {
+ dce110_select_crtc_source(pipe_ctx);
+ }
+
if (pipe_ctx->stream_res.audio != NULL) {
struct audio_output audio_output = {0};
@@ -1679,7 +1749,8 @@ enum dc_status dce110_apply_single_controller_ctx_to_hw(
pipe_ctx->stream_res.tg->funcs->set_static_screen_control(
pipe_ctx->stream_res.tg, event_triggers, 2);
- if (!dc_is_virtual_signal(pipe_ctx->stream->signal))
+ if (!dc_is_virtual_signal(pipe_ctx->stream->signal) &&
+ !dc_is_rgb_signal(pipe_ctx->stream->signal))
pipe_ctx->stream_res.stream_enc->funcs->dig_connect_to_otg(
pipe_ctx->stream_res.stream_enc,
pipe_ctx->stream_res.tg->inst);
--
2.51.0
next prev parent reply other threads:[~2025-09-26 18:03 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-26 18:01 [PATCH 00/23] Analog connector support in DC (v2) Timur Kristóf
2025-09-26 18:01 ` [PATCH 01/23] drm/amd/display: Determine DVI-I connector type (v2) Timur Kristóf
2025-09-26 18:01 ` [PATCH 02/23] drm/amd/display: Add analog bit to edid_caps (v2) Timur Kristóf
2025-09-26 18:01 ` [PATCH 03/23] drm/amd/display: Introduce MAX_LINK_ENCODERS (v2) Timur Kristóf
2025-09-26 18:01 ` [PATCH 04/23] drm/amd/display: Hook up DAC to bios_parser_encoder_control Timur Kristóf
2025-09-26 18:01 ` [PATCH 05/23] drm/amd/display: Add SelectCRTC_Source to BIOS parser Timur Kristóf
2025-09-26 18:01 ` [PATCH 06/23] drm/amd/display: Get maximum pixel clock from VBIOS Timur Kristóf
2025-09-26 18:01 ` [PATCH 07/23] drm/amd/display: Don't use stereo sync and audio on RGB signals (v2) Timur Kristóf
2025-09-26 18:01 ` [PATCH 08/23] drm/amd/display: Don't try to enable/disable HPD when unavailable Timur Kristóf
2025-09-26 18:01 ` [PATCH 09/23] drm/amd/display: Determine early if a link has supported encoders (v2) Timur Kristóf
2025-09-26 18:01 ` [PATCH 10/23] drm/amd/display: Add concept of analog " Timur Kristóf
2025-09-26 18:01 ` [PATCH 11/23] drm/amd/display: Implement DCE analog stream encoders Timur Kristóf
2025-09-26 18:01 ` [PATCH 12/23] drm/amd/display: Implement DCE analog link encoders (v2) Timur Kristóf
2025-09-26 18:01 ` Timur Kristóf [this message]
2025-10-08 21:01 ` [PATCH 13/23] drm/amd/display: Support DAC in dce110_hwseq Harry Wentland
2025-09-26 18:01 ` [PATCH 14/23] drm/amd/display: Add analog link detection (v2) Timur Kristóf
2025-09-26 18:01 ` [PATCH 15/23] drm/amd/display: Refactor amdgpu_dm_connector_detect (v2) Timur Kristóf
2025-09-26 18:01 ` [PATCH 16/23] drm/amd/display: Poll analog connectors (v2) Timur Kristóf
2025-09-26 18:01 ` [PATCH 17/23] drm/amd/display: Add DCE BIOS_SCRATCH_0 register Timur Kristóf
2025-09-26 18:01 ` [PATCH 18/23] drm/amd/display: Make get_support_mask_for_device_id reusable Timur Kristóf
2025-09-26 18:01 ` [PATCH 19/23] drm/amd/display: Add DAC_LoadDetection to BIOS parser (v2) Timur Kristóf
2025-09-26 18:02 ` [PATCH 20/23] drm/amd/display: Use DAC load detection on analog connectors (v2) Timur Kristóf
2025-09-26 18:02 ` [PATCH 21/23] drm/amd/display: Add common modes to analog displays without EDID Timur Kristóf
2025-09-26 18:02 ` [PATCH 22/23] drm/amd/display: Don't add freesync modes to analog displays (v2) Timur Kristóf
2025-09-26 18:02 ` [PATCH 23/23] drm/amdgpu: Use DC by default for Bonaire Timur Kristóf
2025-10-08 21:11 ` [PATCH 00/23] Analog connector support in DC (v2) Harry Wentland
2025-10-09 17:26 ` Harry Wentland
2025-10-09 17:49 ` Wheeler, Daniel
2025-10-09 18:27 ` Harry Wentland
2025-10-21 16:15 ` Timur Kristóf
2025-10-21 16:44 ` Alex Deucher
2025-10-21 17:32 ` Wheeler, Daniel
2025-10-24 19:07 ` timur.kristof
2025-10-24 21:28 ` Wheeler, Daniel
2025-10-31 8:19 ` Timur Kristóf
2025-10-31 13:07 ` Wheeler, Daniel
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