From: "Timur Kristóf" <timur.kristof@gmail.com>
To: amd-gfx@lists.freedesktop.org
Cc: alexander.deucher@amd.com, alex.hung@amd.com,
harry.wentland@amd.com, siqueira@igalia.com,
christian.koenig@amd.com,
"Timur Kristóf" <timur.kristof@gmail.com>
Subject: [PATCH 17/23] drm/amd/display: Add DCE BIOS_SCRATCH_0 register
Date: Fri, 26 Sep 2025 20:01:57 +0200 [thread overview]
Message-ID: <20250926180203.16690-18-timur.kristof@gmail.com> (raw)
In-Reply-To: <20250926180203.16690-1-timur.kristof@gmail.com>
The BIOS uses this register to write the results of the
DAC_LoadDetection command, so we'll need to read this
in order to make DAC load detection work.
As a reference, I used the mmBIOS_SCRATCH_0 definition from
the amdgpu legacy display code.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
---
drivers/gpu/drm/amd/display/dc/dc_bios_types.h | 1 +
.../gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c | 2 ++
.../gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c | 2 ++
.../gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c | 2 ++
.../gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c | 1 +
drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c | 2 ++
drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c | 2 ++
7 files changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dc_bios_types.h b/drivers/gpu/drm/amd/display/dc/dc_bios_types.h
index 545ce1e15eae..50c8906b74c5 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_bios_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_bios_types.h
@@ -168,6 +168,7 @@ struct dc_vbios_funcs {
};
struct bios_registers {
+ uint32_t BIOS_SCRATCH_0;
uint32_t BIOS_SCRATCH_3;
uint32_t BIOS_SCRATCH_6;
};
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c
index 075815e4041a..891416e0423f 100644
--- a/drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c
@@ -78,6 +78,7 @@
#endif
#ifndef mmBIOS_SCRATCH_2
+ #define mmBIOS_SCRATCH_0 0x05C9
#define mmBIOS_SCRATCH_2 0x05CB
#define mmBIOS_SCRATCH_3 0x05CC
#define mmBIOS_SCRATCH_6 0x05CF
@@ -369,6 +370,7 @@ static const struct dce_abm_mask abm_mask = {
#define DCFE_MEM_PWR_CTRL_REG_BASE 0x1b03
static const struct bios_registers bios_regs = {
+ .BIOS_SCRATCH_0 = mmBIOS_SCRATCH_0,
.BIOS_SCRATCH_3 = mmBIOS_SCRATCH_3,
.BIOS_SCRATCH_6 = mmBIOS_SCRATCH_6
};
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c
index cccde5a6f3cd..42b0068b1c05 100644
--- a/drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c
@@ -82,6 +82,7 @@
#endif
#ifndef mmBIOS_SCRATCH_2
+ #define mmBIOS_SCRATCH_0 0x05C9
#define mmBIOS_SCRATCH_2 0x05CB
#define mmBIOS_SCRATCH_3 0x05CC
#define mmBIOS_SCRATCH_6 0x05CF
@@ -377,6 +378,7 @@ static const struct dce110_clk_src_mask cs_mask = {
};
static const struct bios_registers bios_regs = {
+ .BIOS_SCRATCH_0 = mmBIOS_SCRATCH_0,
.BIOS_SCRATCH_3 = mmBIOS_SCRATCH_3,
.BIOS_SCRATCH_6 = mmBIOS_SCRATCH_6
};
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c
index 869a8e515fc0..328d784ac4c8 100644
--- a/drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c
@@ -76,6 +76,7 @@
#endif
#ifndef mmBIOS_SCRATCH_2
+ #define mmBIOS_SCRATCH_0 0x05C9
#define mmBIOS_SCRATCH_2 0x05CB
#define mmBIOS_SCRATCH_3 0x05CC
#define mmBIOS_SCRATCH_6 0x05CF
@@ -385,6 +386,7 @@ static const struct dce110_clk_src_mask cs_mask = {
};
static const struct bios_registers bios_regs = {
+ .BIOS_SCRATCH_0 = mmBIOS_SCRATCH_0,
.BIOS_SCRATCH_3 = mmBIOS_SCRATCH_3,
.BIOS_SCRATCH_6 = mmBIOS_SCRATCH_6
};
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c
index 540e04ec1e2d..efc92381c98d 100644
--- a/drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c
@@ -491,6 +491,7 @@ static struct dce_i2c_hw *dce120_i2c_hw_create(
return dce_i2c_hw;
}
static const struct bios_registers bios_regs = {
+ .BIOS_SCRATCH_0 = mmBIOS_SCRATCH_0 + NBIO_BASE(mmBIOS_SCRATCH_0_BASE_IDX),
.BIOS_SCRATCH_3 = mmBIOS_SCRATCH_3 + NBIO_BASE(mmBIOS_SCRATCH_3_BASE_IDX),
.BIOS_SCRATCH_6 = mmBIOS_SCRATCH_6 + NBIO_BASE(mmBIOS_SCRATCH_6_BASE_IDX)
};
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c
index 5fa84c622282..1077c59cad39 100644
--- a/drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c
@@ -80,6 +80,7 @@
#ifndef mmBIOS_SCRATCH_2
+ #define mmBIOS_SCRATCH_0 0x05C9
#define mmBIOS_SCRATCH_2 0x05CB
#define mmBIOS_SCRATCH_3 0x05CC
#define mmBIOS_SCRATCH_6 0x05CF
@@ -368,6 +369,7 @@ static const struct dce110_clk_src_mask cs_mask = {
};
static const struct bios_registers bios_regs = {
+ .BIOS_SCRATCH_0 = mmBIOS_SCRATCH_0,
.BIOS_SCRATCH_3 = mmBIOS_SCRATCH_3,
.BIOS_SCRATCH_6 = mmBIOS_SCRATCH_6
};
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c
index 902209a17fe4..e10e70360d0a 100644
--- a/drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c
@@ -78,6 +78,7 @@
#ifndef mmBIOS_SCRATCH_2
+ #define mmBIOS_SCRATCH_0 0x05C9
#define mmBIOS_SCRATCH_2 0x05CB
#define mmBIOS_SCRATCH_3 0x05CC
#define mmBIOS_SCRATCH_6 0x05CF
@@ -369,6 +370,7 @@ static const struct dce110_clk_src_mask cs_mask = {
};
static const struct bios_registers bios_regs = {
+ .BIOS_SCRATCH_0 = mmBIOS_SCRATCH_0,
.BIOS_SCRATCH_3 = mmBIOS_SCRATCH_3,
.BIOS_SCRATCH_6 = mmBIOS_SCRATCH_6
};
--
2.51.0
next prev parent reply other threads:[~2025-09-26 18:03 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-26 18:01 [PATCH 00/23] Analog connector support in DC (v2) Timur Kristóf
2025-09-26 18:01 ` [PATCH 01/23] drm/amd/display: Determine DVI-I connector type (v2) Timur Kristóf
2025-09-26 18:01 ` [PATCH 02/23] drm/amd/display: Add analog bit to edid_caps (v2) Timur Kristóf
2025-09-26 18:01 ` [PATCH 03/23] drm/amd/display: Introduce MAX_LINK_ENCODERS (v2) Timur Kristóf
2025-09-26 18:01 ` [PATCH 04/23] drm/amd/display: Hook up DAC to bios_parser_encoder_control Timur Kristóf
2025-09-26 18:01 ` [PATCH 05/23] drm/amd/display: Add SelectCRTC_Source to BIOS parser Timur Kristóf
2025-09-26 18:01 ` [PATCH 06/23] drm/amd/display: Get maximum pixel clock from VBIOS Timur Kristóf
2025-09-26 18:01 ` [PATCH 07/23] drm/amd/display: Don't use stereo sync and audio on RGB signals (v2) Timur Kristóf
2025-09-26 18:01 ` [PATCH 08/23] drm/amd/display: Don't try to enable/disable HPD when unavailable Timur Kristóf
2025-09-26 18:01 ` [PATCH 09/23] drm/amd/display: Determine early if a link has supported encoders (v2) Timur Kristóf
2025-09-26 18:01 ` [PATCH 10/23] drm/amd/display: Add concept of analog " Timur Kristóf
2025-09-26 18:01 ` [PATCH 11/23] drm/amd/display: Implement DCE analog stream encoders Timur Kristóf
2025-09-26 18:01 ` [PATCH 12/23] drm/amd/display: Implement DCE analog link encoders (v2) Timur Kristóf
2025-09-26 18:01 ` [PATCH 13/23] drm/amd/display: Support DAC in dce110_hwseq Timur Kristóf
2025-10-08 21:01 ` Harry Wentland
2025-09-26 18:01 ` [PATCH 14/23] drm/amd/display: Add analog link detection (v2) Timur Kristóf
2025-09-26 18:01 ` [PATCH 15/23] drm/amd/display: Refactor amdgpu_dm_connector_detect (v2) Timur Kristóf
2025-09-26 18:01 ` [PATCH 16/23] drm/amd/display: Poll analog connectors (v2) Timur Kristóf
2025-09-26 18:01 ` Timur Kristóf [this message]
2025-09-26 18:01 ` [PATCH 18/23] drm/amd/display: Make get_support_mask_for_device_id reusable Timur Kristóf
2025-09-26 18:01 ` [PATCH 19/23] drm/amd/display: Add DAC_LoadDetection to BIOS parser (v2) Timur Kristóf
2025-09-26 18:02 ` [PATCH 20/23] drm/amd/display: Use DAC load detection on analog connectors (v2) Timur Kristóf
2025-09-26 18:02 ` [PATCH 21/23] drm/amd/display: Add common modes to analog displays without EDID Timur Kristóf
2025-09-26 18:02 ` [PATCH 22/23] drm/amd/display: Don't add freesync modes to analog displays (v2) Timur Kristóf
2025-09-26 18:02 ` [PATCH 23/23] drm/amdgpu: Use DC by default for Bonaire Timur Kristóf
2025-10-08 21:11 ` [PATCH 00/23] Analog connector support in DC (v2) Harry Wentland
2025-10-09 17:26 ` Harry Wentland
2025-10-09 17:49 ` Wheeler, Daniel
2025-10-09 18:27 ` Harry Wentland
2025-10-21 16:15 ` Timur Kristóf
2025-10-21 16:44 ` Alex Deucher
2025-10-21 17:32 ` Wheeler, Daniel
2025-10-24 19:07 ` timur.kristof
2025-10-24 21:28 ` Wheeler, Daniel
2025-10-31 8:19 ` Timur Kristóf
2025-10-31 13:07 ` Wheeler, Daniel
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250926180203.16690-18-timur.kristof@gmail.com \
--to=timur.kristof@gmail.com \
--cc=alex.hung@amd.com \
--cc=alexander.deucher@amd.com \
--cc=amd-gfx@lists.freedesktop.org \
--cc=christian.koenig@amd.com \
--cc=harry.wentland@amd.com \
--cc=siqueira@igalia.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox