From: YiPeng Chai <YiPeng.Chai@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: <Hawking.Zhang@amd.com>, <Tao.Zhou1@amd.com>,
<Candice.Li@amd.com>, <Stanley.Yang@amd.com>,
<Jinzhou.Su@amd.com>, YiPeng Chai <YiPeng.Chai@amd.com>,
Tao Zhou <tao.zhou1@amd.com>
Subject: [PATCH 1/5] drm/amd/ras: Update ras command context structure name
Date: Fri, 17 Oct 2025 15:51:27 +0800 [thread overview]
Message-ID: <20251017075131.23939-1-YiPeng.Chai@amd.com> (raw)
According to the actual usage of this structure,
it is more appropriate to call it context, the
structure name with ioctl is easy to cause
misunderstanding.
V2:
Update commit message content.
Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
---
.../gpu/drm/amd/ras/ras_mgr/amdgpu_ras_cmd.c | 14 ++++++-------
.../gpu/drm/amd/ras/ras_mgr/amdgpu_ras_cmd.h | 2 +-
drivers/gpu/drm/amd/ras/rascore/ras_cmd.c | 20 +++++++++----------
drivers/gpu/drm/amd/ras/rascore/ras_cmd.h | 8 ++++----
4 files changed, 22 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_cmd.c b/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_cmd.c
index 4706e737969a..6a281ad8e255 100644
--- a/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_cmd.c
+++ b/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_cmd.c
@@ -37,7 +37,7 @@
#define AMDGPU_RAS_TYPE_VF 0x3
static int amdgpu_ras_query_interface_info(struct ras_core_context *ras_core,
- struct ras_cmd_ioctl *cmd)
+ struct ras_cmd_ctx *cmd)
{
struct amdgpu_device *adev = (struct amdgpu_device *)ras_core->dev;
struct ras_query_interface_info_rsp *output_data =
@@ -77,7 +77,7 @@ static struct ras_core_context *ras_cmd_get_ras_core(uint64_t dev_handle)
}
static int amdgpu_ras_get_devices_info(struct ras_core_context *ras_core,
- struct ras_cmd_ioctl *cmd)
+ struct ras_cmd_ctx *cmd)
{
struct amdgpu_device *adev = (struct amdgpu_device *)ras_core->dev;
struct ras_cmd_devices_info_rsp *output_data =
@@ -146,7 +146,7 @@ static uint64_t local_addr_to_xgmi_global_addr(struct ras_core_context *ras_core
}
static int amdgpu_ras_inject_error(struct ras_core_context *ras_core,
- struct ras_cmd_ioctl *cmd, void *data)
+ struct ras_cmd_ctx *cmd, void *data)
{
struct amdgpu_device *adev = (struct amdgpu_device *)ras_core->dev;
struct ras_cmd_inject_error_req *req =
@@ -189,7 +189,7 @@ static int amdgpu_ras_inject_error(struct ras_core_context *ras_core,
}
static int amdgpu_ras_get_ras_safe_fb_addr_ranges(struct ras_core_context *ras_core,
- struct ras_cmd_ioctl *cmd, void *data)
+ struct ras_cmd_ctx *cmd, void *data)
{
struct amdgpu_device *adev = (struct amdgpu_device *)ras_core->dev;
struct ras_cmd_dev_handle *input_data =
@@ -259,7 +259,7 @@ static int ras_translate_fb_address(struct ras_core_context *ras_core,
}
static int amdgpu_ras_translate_fb_address(struct ras_core_context *ras_core,
- struct ras_cmd_ioctl *cmd, void *data)
+ struct ras_cmd_ctx *cmd, void *data)
{
struct ras_cmd_translate_fb_address_req *req_buff =
(struct ras_cmd_translate_fb_address_req *)cmd->input_buff_raw;
@@ -291,7 +291,7 @@ static struct ras_cmd_func_map amdgpu_ras_cmd_maps[] = {
{RAS_CMD__TRANSLATE_FB_ADDRESS, amdgpu_ras_translate_fb_address},
};
-int amdgpu_ras_handle_cmd(struct ras_core_context *ras_core, struct ras_cmd_ioctl *cmd, void *data)
+int amdgpu_ras_handle_cmd(struct ras_core_context *ras_core, struct ras_cmd_ctx *cmd, void *data)
{
struct ras_cmd_func_map *ras_cmd = NULL;
int i, res;
@@ -314,7 +314,7 @@ int amdgpu_ras_handle_cmd(struct ras_core_context *ras_core, struct ras_cmd_ioct
int amdgpu_ras_cmd_ioctl_handler(struct ras_core_context *ras_core,
uint8_t *cmd_buf, uint32_t buf_size)
{
- struct ras_cmd_ioctl *cmd = (struct ras_cmd_ioctl *)cmd_buf;
+ struct ras_cmd_ctx *cmd = (struct ras_cmd_ctx *)cmd_buf;
struct ras_core_context *cmd_core = NULL;
struct ras_cmd_dev_handle *cmd_handle = NULL;
int timeout = 60;
diff --git a/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_cmd.h b/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_cmd.h
index 7017198f1bac..73832c28cb55 100644
--- a/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_cmd.h
+++ b/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_cmd.h
@@ -48,7 +48,7 @@ struct ras_cmd_translate_memory_fd_rsp {
};
int amdgpu_ras_handle_cmd(struct ras_core_context *ras_core,
- struct ras_cmd_ioctl *cmd, void *data);
+ struct ras_cmd_ctx *cmd, void *data);
int amdgpu_ras_cmd_ioctl_handler(struct ras_core_context *ras_core,
uint8_t *cmd_buf, uint32_t buf_size);
diff --git a/drivers/gpu/drm/amd/ras/rascore/ras_cmd.c b/drivers/gpu/drm/amd/ras/rascore/ras_cmd.c
index 6fe3b115986c..94e6d7420d94 100644
--- a/drivers/gpu/drm/amd/ras/rascore/ras_cmd.c
+++ b/drivers/gpu/drm/amd/ras/rascore/ras_cmd.c
@@ -43,7 +43,7 @@ static int ras_cmd_remove_device(struct ras_core_context *ras_core)
}
static int ras_get_block_ecc_info(struct ras_core_context *ras_core,
- struct ras_cmd_ioctl *cmd, void *data)
+ struct ras_cmd_ctx *cmd, void *data)
{
struct ras_cmd_block_ecc_info_req *input_data =
(struct ras_cmd_block_ecc_info_req *)cmd->input_buff_raw;
@@ -119,7 +119,7 @@ static int ras_cmd_get_group_bad_pages(struct ras_core_context *ras_core,
}
static int ras_cmd_get_bad_pages(struct ras_core_context *ras_core,
- struct ras_cmd_ioctl *cmd, void *data)
+ struct ras_cmd_ctx *cmd, void *data)
{
struct ras_cmd_bad_pages_info_req *input_data =
(struct ras_cmd_bad_pages_info_req *)cmd->input_buff_raw;
@@ -141,7 +141,7 @@ static int ras_cmd_get_bad_pages(struct ras_core_context *ras_core,
}
static int ras_cmd_clear_bad_page_info(struct ras_core_context *ras_core,
- struct ras_cmd_ioctl *cmd, void *data)
+ struct ras_cmd_ctx *cmd, void *data)
{
if (cmd->input_size != sizeof(struct ras_cmd_dev_handle))
return RAS_CMD__ERROR_INVALID_INPUT_SIZE;
@@ -156,7 +156,7 @@ static int ras_cmd_clear_bad_page_info(struct ras_core_context *ras_core,
}
static int ras_cmd_reset_all_error_counts(struct ras_core_context *ras_core,
- struct ras_cmd_ioctl *cmd, void *data)
+ struct ras_cmd_ctx *cmd, void *data)
{
if (cmd->input_size != sizeof(struct ras_cmd_dev_handle))
return RAS_CMD__ERROR_INVALID_INPUT_SIZE;
@@ -171,7 +171,7 @@ static int ras_cmd_reset_all_error_counts(struct ras_core_context *ras_core,
}
static int ras_cmd_get_cper_snapshot(struct ras_core_context *ras_core,
- struct ras_cmd_ioctl *cmd, void *data)
+ struct ras_cmd_ctx *cmd, void *data)
{
struct ras_cmd_cper_snapshot_rsp *output_data =
(struct ras_cmd_cper_snapshot_rsp *)cmd->output_buff_raw;
@@ -193,7 +193,7 @@ static int ras_cmd_get_cper_snapshot(struct ras_core_context *ras_core,
}
static int ras_cmd_get_cper_records(struct ras_core_context *ras_core,
- struct ras_cmd_ioctl *cmd, void *data)
+ struct ras_cmd_ctx *cmd, void *data)
{
struct ras_cmd_cper_record_req *req =
(struct ras_cmd_cper_record_req *)cmd->input_buff_raw;
@@ -253,7 +253,7 @@ static int ras_cmd_get_cper_records(struct ras_core_context *ras_core,
}
static int ras_cmd_get_batch_trace_snapshot(struct ras_core_context *ras_core,
- struct ras_cmd_ioctl *cmd, void *data)
+ struct ras_cmd_ctx *cmd, void *data)
{
struct ras_cmd_batch_trace_snapshot_rsp *rsp =
(struct ras_cmd_batch_trace_snapshot_rsp *)cmd->output_buff_raw;
@@ -275,7 +275,7 @@ static int ras_cmd_get_batch_trace_snapshot(struct ras_core_context *ras_core,
}
static int ras_cmd_get_batch_trace_records(struct ras_core_context *ras_core,
- struct ras_cmd_ioctl *cmd, void *data)
+ struct ras_cmd_ctx *cmd, void *data)
{
struct ras_cmd_batch_trace_record_req *input_data =
(struct ras_cmd_batch_trace_record_req *)cmd->input_buff_raw;
@@ -400,7 +400,7 @@ static enum ras_ta_error_type __get_ras_ta_err_type(enum ras_ecc_err_type error)
}
static int ras_cmd_inject_error(struct ras_core_context *ras_core,
- struct ras_cmd_ioctl *cmd, void *data)
+ struct ras_cmd_ctx *cmd, void *data)
{
struct ras_cmd_inject_error_req *req =
(struct ras_cmd_inject_error_req *)cmd->input_buff_raw;
@@ -441,7 +441,7 @@ static struct ras_cmd_func_map ras_cmd_maps[] = {
};
int rascore_handle_cmd(struct ras_core_context *ras_core,
- struct ras_cmd_ioctl *cmd, void *data)
+ struct ras_cmd_ctx *cmd, void *data)
{
struct ras_cmd_func_map *ras_cmd = NULL;
int i;
diff --git a/drivers/gpu/drm/amd/ras/rascore/ras_cmd.h b/drivers/gpu/drm/amd/ras/rascore/ras_cmd.h
index 6df8c70f5ad8..751ed50b9584 100644
--- a/drivers/gpu/drm/amd/ras/rascore/ras_cmd.h
+++ b/drivers/gpu/drm/amd/ras/rascore/ras_cmd.h
@@ -101,7 +101,7 @@ enum ras_error_type {
};
struct ras_core_context;
-struct ras_cmd_ioctl;
+struct ras_cmd_ctx;
struct ras_cmd_mgr {
struct list_head head;
@@ -112,7 +112,7 @@ struct ras_cmd_mgr {
struct ras_cmd_func_map {
uint32_t cmd_id;
int (*func)(struct ras_core_context *ras_core,
- struct ras_cmd_ioctl *cmd, void *data);
+ struct ras_cmd_ctx *cmd, void *data);
};
struct ras_device_bdf {
@@ -133,7 +133,7 @@ struct ras_cmd_param {
};
#pragma pack(push, 8)
-struct ras_cmd_ioctl {
+struct ras_cmd_ctx {
uint32_t magic;
union {
struct {
@@ -414,7 +414,7 @@ struct ras_cmd_batch_trace_record_rsp {
int ras_cmd_init(struct ras_core_context *ras_core);
int ras_cmd_fini(struct ras_core_context *ras_core);
-int rascore_handle_cmd(struct ras_core_context *ras_core, struct ras_cmd_ioctl *cmd, void *data);
+int rascore_handle_cmd(struct ras_core_context *ras_core, struct ras_cmd_ctx *cmd, void *data);
uint64_t ras_cmd_get_dev_handle(struct ras_core_context *ras_core);
int ras_cmd_query_interface_info(struct ras_core_context *ras_core,
struct ras_query_interface_info_rsp *rsp);
--
2.34.1
next reply other threads:[~2025-10-17 7:52 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-17 7:51 YiPeng Chai [this message]
2025-10-17 7:51 ` [PATCH 2/5] drm/amd/ras: Update function and remove redundant code YiPeng Chai
2025-10-17 7:51 ` [PATCH 3/5] drm/amdgpu: ras module supports error injection YiPeng Chai
2025-10-17 7:51 ` [PATCH 4/5] drm/amdgpu: query bad page info of ras module YiPeng Chai
2025-10-17 7:51 ` [PATCH 5/5] drm/amdgpu: query block error count " YiPeng Chai
2025-10-20 2:38 ` Zhang, Hawking
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