From: YiPeng Chai <YiPeng.Chai@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: <Hawking.Zhang@amd.com>, <Tao.Zhou1@amd.com>,
<Candice.Li@amd.com>, <Stanley.Yang@amd.com>,
<Jinzhou.Su@amd.com>, YiPeng Chai <YiPeng.Chai@amd.com>,
Tao Zhou <tao.zhou1@amd.com>
Subject: [PATCH 5/5] drm/amdgpu: query block error count of ras module
Date: Fri, 17 Oct 2025 15:51:31 +0800 [thread overview]
Message-ID: <20251017075131.23939-5-YiPeng.Chai@amd.com> (raw)
In-Reply-To: <20251017075131.23939-1-YiPeng.Chai@amd.com>
Query block error count of ras module.
Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 29 ++++++++++++++++++++++++-
1 file changed, 28 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index 5d5e1c0154b2..3150d736a4e3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
@@ -1543,9 +1543,36 @@ static int amdgpu_ras_query_error_status_with_event(struct amdgpu_device *adev,
return ret;
}
+static int amdgpu_uniras_query_block_ecc(struct amdgpu_device *adev,
+ struct ras_query_if *info)
+{
+ struct ras_cmd_block_ecc_info_req req = {0};
+ struct ras_cmd_block_ecc_info_rsp rsp = {0};
+ int ret;
+
+ if (!info)
+ return -EINVAL;
+
+ req.block_id = info->head.block;
+ req.subblock_id = info->head.sub_block_index;
+
+ ret = amdgpu_ras_mgr_handle_ras_cmd(adev, RAS_CMD__GET_BLOCK_ECC_STATUS,
+ &req, sizeof(req), &rsp, sizeof(rsp));
+ if (!ret) {
+ info->ce_count = rsp.ce_count;
+ info->ue_count = rsp.ue_count;
+ info->de_count = rsp.de_count;
+ }
+
+ return ret;
+}
+
int amdgpu_ras_query_error_status(struct amdgpu_device *adev, struct ras_query_if *info)
{
- return amdgpu_ras_query_error_status_with_event(adev, info, RAS_EVENT_TYPE_INVALID);
+ if (amdgpu_uniras_enabled(adev))
+ return amdgpu_uniras_query_block_ecc(adev, info);
+ else
+ return amdgpu_ras_query_error_status_with_event(adev, info, RAS_EVENT_TYPE_INVALID);
}
int amdgpu_ras_reset_error_count(struct amdgpu_device *adev,
--
2.34.1
next prev parent reply other threads:[~2025-10-17 7:52 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-17 7:51 [PATCH 1/5] drm/amd/ras: Update ras command context structure name YiPeng Chai
2025-10-17 7:51 ` [PATCH 2/5] drm/amd/ras: Update function and remove redundant code YiPeng Chai
2025-10-17 7:51 ` [PATCH 3/5] drm/amdgpu: ras module supports error injection YiPeng Chai
2025-10-17 7:51 ` [PATCH 4/5] drm/amdgpu: query bad page info of ras module YiPeng Chai
2025-10-17 7:51 ` YiPeng Chai [this message]
2025-10-20 2:38 ` [PATCH 5/5] drm/amdgpu: query block error count " Zhang, Hawking
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