AMD-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Lijo Lazar <lijo.lazar@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: <Hawking.Zhang@amd.com>, <Alexander.Deucher@amd.com>,
	<Asad.Kamal@amd.com>, <kevinyang.wang@amd.com>
Subject: [PATCH v2 1/7] drm/amd/pm: Add smu feature bits data struct
Date: Tue, 20 Jan 2026 11:42:18 +0530	[thread overview]
Message-ID: <20260120061402.1287680-2-lijo.lazar@amd.com> (raw)
In-Reply-To: <20260120061402.1287680-1-lijo.lazar@amd.com>

Add a bitmap struct to represent smu feature bits and functions to set/clear features.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
---
 drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 81 +++++++++++++++++++
 1 file changed, 81 insertions(+)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
index 1def04826f10..017df903a7bd 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
@@ -472,6 +472,11 @@ struct smu_power_context {
 };
 
 #define SMU_FEATURE_MAX	(64)
+
+struct smu_feature_bits {
+	DECLARE_BITMAP(bits, SMU_FEATURE_MAX);
+};
+
 struct smu_feature {
 	uint32_t feature_num;
 	DECLARE_BITMAP(supported, SMU_FEATURE_MAX);
@@ -1974,4 +1979,80 @@ int amdgpu_smu_ras_send_msg(struct amdgpu_device *adev, enum smu_message_type ms
 
 void smu_feature_cap_set(struct smu_context *smu, enum smu_feature_cap_id fea_id);
 bool smu_feature_cap_test(struct smu_context *smu, enum smu_feature_cap_id fea_id);
+
+static inline bool smu_feature_bits_is_set(const struct smu_feature_bits *bits,
+					   unsigned int bit)
+{
+	if (bit >= SMU_FEATURE_MAX)
+		return false;
+
+	return test_bit(bit, bits->bits);
+}
+
+static inline void smu_feature_bits_set_bit(struct smu_feature_bits *bits,
+					    unsigned int bit)
+{
+	if (bit < SMU_FEATURE_MAX)
+		__set_bit(bit, bits->bits);
+}
+
+static inline void smu_feature_bits_clear_bit(struct smu_feature_bits *bits,
+					      unsigned int bit)
+{
+	if (bit < SMU_FEATURE_MAX)
+		__clear_bit(bit, bits->bits);
+}
+
+static inline void smu_feature_bits_clearall(struct smu_feature_bits *bits)
+{
+	bitmap_zero(bits->bits, SMU_FEATURE_MAX);
+}
+
+static inline void smu_feature_bits_fill(struct smu_feature_bits *bits)
+{
+	bitmap_fill(bits->bits, SMU_FEATURE_MAX);
+}
+
+static inline bool
+smu_feature_bits_test_mask(const struct smu_feature_bits *bits,
+			   const unsigned long *mask)
+{
+	return bitmap_intersects(bits->bits, mask, SMU_FEATURE_MAX);
+}
+
+static inline void smu_feature_bits_from_arr32(struct smu_feature_bits *bits,
+					       const uint32_t *arr,
+					       unsigned int nbits)
+{
+	bitmap_from_arr32(bits->bits, arr, nbits);
+}
+
+static inline void
+smu_feature_bits_to_arr32(const struct smu_feature_bits *bits, uint32_t *arr,
+			  unsigned int nbits)
+{
+	bitmap_to_arr32(arr, bits->bits, nbits);
+}
+
+static inline bool smu_feature_bits_empty(const struct smu_feature_bits *bits,
+					  unsigned int nbits)
+{
+	return bitmap_empty(bits->bits, nbits);
+}
+
+static inline void smu_feature_bits_copy(struct smu_feature_bits *dst,
+					 const unsigned long *src,
+					 unsigned int nbits)
+{
+	bitmap_copy(dst->bits, src, nbits);
+}
+
+static inline void smu_feature_bits_or(struct smu_feature_bits *dst,
+				       const struct smu_feature_bits *src1,
+				       const unsigned long *src2,
+				       unsigned int nbits)
+{
+	bitmap_or(dst->bits, src1->bits, src2, nbits);
+}
+
 #endif
-- 
2.49.0


  reply	other threads:[~2026-01-20  6:14 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-20  6:12 [PATCH v2 0/7] Refactor smu feature bit implementation Lijo Lazar
2026-01-20  6:12 ` Lijo Lazar [this message]
2026-01-20  6:12 ` [PATCH v2 2/7] drm/amd/pm: Add smu feature interface functions Lijo Lazar
2026-01-20  6:12 ` [PATCH v2 3/7] drm/amd/pm: Remove unused logic in SMUv14.0.2 Lijo Lazar
2026-01-20  6:12 ` [PATCH v2 4/7] drm/amd/pm: Initialize allowed feature list Lijo Lazar
2026-01-20  6:12 ` [PATCH v2 5/7] drm/amd/pm: Use feature bits data structure Lijo Lazar
2026-01-20  6:12 ` [PATCH v2 6/7] drm/amd/pm: Change get_enabled_mask signature Lijo Lazar
2026-01-20  6:12 ` [PATCH v2 7/7] drm/amd/pm: Add default feature number definition Lijo Lazar
2026-01-22 10:44 ` [PATCH v2 0/7] Refactor smu feature bit implementation Lazar, Lijo
2026-01-23  6:06   ` Kamal, Asad

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20260120061402.1287680-2-lijo.lazar@amd.com \
    --to=lijo.lazar@amd.com \
    --cc=Alexander.Deucher@amd.com \
    --cc=Asad.Kamal@amd.com \
    --cc=Hawking.Zhang@amd.com \
    --cc=amd-gfx@lists.freedesktop.org \
    --cc=kevinyang.wang@amd.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox