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From: Jesse.Zhang <Jesse.Zhang@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: <Alexander.Deucher@amd.com>,
	Christian Koenig <christian.koenig@amd.com>,
	 Jesse.Zhang <Jesse.Zhang@amd.com>,
	Jesse.Zhang <Jesse.zhang@amd.com>
Subject: [PATCH 3/3] drm/amdgpu/sdma_v5_0: Update per-queue reset fw version checks for 5.0.x ASICs
Date: Tue, 3 Feb 2026 16:56:12 +0800	[thread overview]
Message-ID: <20260203085706.450079-3-Jesse.Zhang@amd.com> (raw)
In-Reply-To: <20260203085706.450079-1-Jesse.Zhang@amd.com>

Tune SDMA 5.0.x per-queue reset firmware version thresholds for specific ASICs:
5.0.0: Require fw >=24
5.0.2: Adjust fw threshold to >=30 
5.0.1: Add new check with fw >=38

Signed-off-by: Jesse.Zhang <Jesse.zhang@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 23 +++++++++++++++++++----
 1 file changed, 19 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
index d72bd3adfccf..72492692f680 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
@@ -1432,17 +1432,32 @@ static int sdma_v5_0_sw_init(struct amdgpu_ip_block *ip_block)
 		amdgpu_get_soft_full_reset_mask(&adev->sdma.instance[0].ring);
 	switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) {
 	case IP_VERSION(5, 0, 0):
+		if ((adev->sdma.instance[0].fw_version >= 24) &&
+		     !amdgpu_sriov_vf(adev) &&
+	             !adev->debug_disable_gpu_ring_reset)
+			adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
+			break;
+	case IP_VERSION(5, 0, 1):
+		if ((adev->sdma.instance[0].fw_version >= 38) &&
+		     !amdgpu_sriov_vf(adev) &&
+	             !adev->debug_disable_gpu_ring_reset)
+			adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
+			break;
 	case IP_VERSION(5, 0, 2):
+		if ((adev->sdma.instance[0].fw_version >= 30) &&
+	             !amdgpu_sriov_vf(adev) &&
+	             !adev->debug_disable_gpu_ring_reset)
+			adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
+			break;
 	case IP_VERSION(5, 0, 5):
 		if ((adev->sdma.instance[0].fw_version >= 35) &&
-		    !amdgpu_sriov_vf(adev) &&
-		    !adev->debug_disable_gpu_ring_reset)
+		     !amdgpu_sriov_vf(adev) &&
+	             !adev->debug_disable_gpu_ring_reset)
 			adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
-		break;
+			break;
 	default:
 		break;
 	}
-
 	/* Allocate memory for SDMA IP Dump buffer */
 	ptr = kcalloc(adev->sdma.num_instances * reg_count, sizeof(uint32_t), GFP_KERNEL);
 	if (ptr)
-- 
2.49.0


  parent reply	other threads:[~2026-02-03  8:57 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-03  8:56 [PATCH 1/3] drm/amdgpu/sdma_v5_2: update fw version check for per-queue reset on various ASICs Jesse.Zhang
2026-02-03  8:56 ` [PATCH 2/3] drm/amdgpu: extend per-queue reset fw check for 5.2.1/5.2.6/5.2.7 Jesse.Zhang
2026-02-03  8:56 ` Jesse.Zhang [this message]
2026-02-03 13:43   ` [PATCH 3/3] drm/amdgpu/sdma_v5_0: Update per-queue reset fw version checks for 5.0.x ASICs Alex Deucher
2026-02-03 14:09     ` Alex Deucher

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