* [PATCH 1/3] drm/amdgpu/sdma_v5_2: update fw version check for per-queue reset on various ASICs
@ 2026-02-03 8:56 Jesse.Zhang
2026-02-03 8:56 ` [PATCH 2/3] drm/amdgpu: extend per-queue reset fw check for 5.2.1/5.2.6/5.2.7 Jesse.Zhang
2026-02-03 8:56 ` [PATCH 3/3] drm/amdgpu/sdma_v5_0: Update per-queue reset fw version checks for 5.0.x ASICs Jesse.Zhang
0 siblings, 2 replies; 5+ messages in thread
From: Jesse.Zhang @ 2026-02-03 8:56 UTC (permalink / raw)
To: amd-gfx; +Cc: Alexander.Deucher, Christian Koenig, Jesse.Zhang, Jesse.Zhang
Adjust SDMA 5.2 per-queue reset firmware version thresholds to match the correct requirements for different ASICs:
5.2.0: Require fw >=34
5.2.2: Require fw >=41
5.2.3: Require fw >=9
5.2.4: Require fw >=33 (from 76)
5.2.5: Require fw >=1 (from 34)
Signed-off-by: Jesse.Zhang <Jesse.zhang@amd.com>
---
drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 19 +++++++++++++++++--
1 file changed, 17 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
index 5aa500fe554b..78dda51cd9e0 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
@@ -1350,16 +1350,31 @@ static int sdma_v5_2_sw_init(struct amdgpu_ip_block *ip_block)
amdgpu_get_soft_full_reset_mask(&adev->sdma.instance[0].ring);
switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) {
case IP_VERSION(5, 2, 0):
+ if ((adev->sdma.instance[0].fw_version >= 34) &&
+ !amdgpu_sriov_vf(adev) &&
+ !adev->debug_disable_gpu_ring_reset)
+ adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
+ break;
case IP_VERSION(5, 2, 2):
+ if ((adev->sdma.instance[0].fw_version >= 41) &&
+ !amdgpu_sriov_vf(adev) &&
+ !adev->debug_disable_gpu_ring_reset)
+ adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
+ break;
case IP_VERSION(5, 2, 3):
+ if ((adev->sdma.instance[0].fw_version >= 9) &&
+ !amdgpu_sriov_vf(adev) &&
+ !adev->debug_disable_gpu_ring_reset)
+ adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
+ break;
case IP_VERSION(5, 2, 4):
- if ((adev->sdma.instance[0].fw_version >= 76) &&
+ if ((adev->sdma.instance[0].fw_version >= 33) &&
!amdgpu_sriov_vf(adev) &&
!adev->debug_disable_gpu_ring_reset)
adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
break;
case IP_VERSION(5, 2, 5):
- if ((adev->sdma.instance[0].fw_version >= 34) &&
+ if ((adev->sdma.instance[0].fw_version >= 1) &&
!amdgpu_sriov_vf(adev) &&
!adev->debug_disable_gpu_ring_reset)
adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
--
2.49.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 2/3] drm/amdgpu: extend per-queue reset fw check for 5.2.1/5.2.6/5.2.7
2026-02-03 8:56 [PATCH 1/3] drm/amdgpu/sdma_v5_2: update fw version check for per-queue reset on various ASICs Jesse.Zhang
@ 2026-02-03 8:56 ` Jesse.Zhang
2026-02-03 8:56 ` [PATCH 3/3] drm/amdgpu/sdma_v5_0: Update per-queue reset fw version checks for 5.0.x ASICs Jesse.Zhang
1 sibling, 0 replies; 5+ messages in thread
From: Jesse.Zhang @ 2026-02-03 8:56 UTC (permalink / raw)
To: amd-gfx
Cc: Alexander.Deucher, Christian Koenig, Jesse.Zhang, Alex Deucher,
Jesse.Zhang
Add per-queue reset fw version checks for new SDMA 5.2.x variants:
5.2.1: >=41
5.2.6: >=8
5.2.7: >=1
Suggested-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Jesse.Zhang <Jesse.zhang@amd.com>
---
drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
index 78dda51cd9e0..53618d8a2439 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
@@ -1355,6 +1355,12 @@ static int sdma_v5_2_sw_init(struct amdgpu_ip_block *ip_block)
!adev->debug_disable_gpu_ring_reset)
adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
break;
+ case IP_VERSION(5, 2, 1):
+ if ((adev->sdma.instance[0].fw_version >= 41) &&
+ !amdgpu_sriov_vf(adev) &&
+ !adev->debug_disable_gpu_ring_reset)
+ adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
+ break;
case IP_VERSION(5, 2, 2):
if ((adev->sdma.instance[0].fw_version >= 41) &&
!amdgpu_sriov_vf(adev) &&
@@ -1379,6 +1385,18 @@ static int sdma_v5_2_sw_init(struct amdgpu_ip_block *ip_block)
!adev->debug_disable_gpu_ring_reset)
adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
break;
+ case IP_VERSION(5, 2, 6):
+ if ((adev->sdma.instance[0].fw_version >= 8) &&
+ !amdgpu_sriov_vf(adev) &&
+ !adev->debug_disable_gpu_ring_reset)
+ adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
+ break;
+ case IP_VERSION(5, 2, 7):
+ if ((adev->sdma.instance[0].fw_version >= 1) &&
+ !amdgpu_sriov_vf(adev) &&
+ !adev->debug_disable_gpu_ring_reset)
+ adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
+ break;
default:
break;
}
--
2.49.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 3/3] drm/amdgpu/sdma_v5_0: Update per-queue reset fw version checks for 5.0.x ASICs
2026-02-03 8:56 [PATCH 1/3] drm/amdgpu/sdma_v5_2: update fw version check for per-queue reset on various ASICs Jesse.Zhang
2026-02-03 8:56 ` [PATCH 2/3] drm/amdgpu: extend per-queue reset fw check for 5.2.1/5.2.6/5.2.7 Jesse.Zhang
@ 2026-02-03 8:56 ` Jesse.Zhang
2026-02-03 13:43 ` Alex Deucher
1 sibling, 1 reply; 5+ messages in thread
From: Jesse.Zhang @ 2026-02-03 8:56 UTC (permalink / raw)
To: amd-gfx; +Cc: Alexander.Deucher, Christian Koenig, Jesse.Zhang, Jesse.Zhang
Tune SDMA 5.0.x per-queue reset firmware version thresholds for specific ASICs:
5.0.0: Require fw >=24
5.0.2: Adjust fw threshold to >=30
5.0.1: Add new check with fw >=38
Signed-off-by: Jesse.Zhang <Jesse.zhang@amd.com>
---
drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 23 +++++++++++++++++++----
1 file changed, 19 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
index d72bd3adfccf..72492692f680 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
@@ -1432,17 +1432,32 @@ static int sdma_v5_0_sw_init(struct amdgpu_ip_block *ip_block)
amdgpu_get_soft_full_reset_mask(&adev->sdma.instance[0].ring);
switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) {
case IP_VERSION(5, 0, 0):
+ if ((adev->sdma.instance[0].fw_version >= 24) &&
+ !amdgpu_sriov_vf(adev) &&
+ !adev->debug_disable_gpu_ring_reset)
+ adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
+ break;
+ case IP_VERSION(5, 0, 1):
+ if ((adev->sdma.instance[0].fw_version >= 38) &&
+ !amdgpu_sriov_vf(adev) &&
+ !adev->debug_disable_gpu_ring_reset)
+ adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
+ break;
case IP_VERSION(5, 0, 2):
+ if ((adev->sdma.instance[0].fw_version >= 30) &&
+ !amdgpu_sriov_vf(adev) &&
+ !adev->debug_disable_gpu_ring_reset)
+ adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
+ break;
case IP_VERSION(5, 0, 5):
if ((adev->sdma.instance[0].fw_version >= 35) &&
- !amdgpu_sriov_vf(adev) &&
- !adev->debug_disable_gpu_ring_reset)
+ !amdgpu_sriov_vf(adev) &&
+ !adev->debug_disable_gpu_ring_reset)
adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
- break;
+ break;
default:
break;
}
-
/* Allocate memory for SDMA IP Dump buffer */
ptr = kcalloc(adev->sdma.num_instances * reg_count, sizeof(uint32_t), GFP_KERNEL);
if (ptr)
--
2.49.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH 3/3] drm/amdgpu/sdma_v5_0: Update per-queue reset fw version checks for 5.0.x ASICs
2026-02-03 8:56 ` [PATCH 3/3] drm/amdgpu/sdma_v5_0: Update per-queue reset fw version checks for 5.0.x ASICs Jesse.Zhang
@ 2026-02-03 13:43 ` Alex Deucher
2026-02-03 14:09 ` Alex Deucher
0 siblings, 1 reply; 5+ messages in thread
From: Alex Deucher @ 2026-02-03 13:43 UTC (permalink / raw)
To: Jesse.Zhang; +Cc: amd-gfx, Alexander.Deucher, Christian Koenig
Series is:
Acked-by: Alex Deucher <alexander.deucher@amd.com>
On Tue, Feb 3, 2026 at 5:07 AM Jesse.Zhang <Jesse.Zhang@amd.com> wrote:
>
> Tune SDMA 5.0.x per-queue reset firmware version thresholds for specific ASICs:
> 5.0.0: Require fw >=24
> 5.0.2: Adjust fw threshold to >=30
> 5.0.1: Add new check with fw >=38
>
> Signed-off-by: Jesse.Zhang <Jesse.zhang@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 23 +++++++++++++++++++----
> 1 file changed, 19 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
> index d72bd3adfccf..72492692f680 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
> @@ -1432,17 +1432,32 @@ static int sdma_v5_0_sw_init(struct amdgpu_ip_block *ip_block)
> amdgpu_get_soft_full_reset_mask(&adev->sdma.instance[0].ring);
> switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) {
> case IP_VERSION(5, 0, 0):
> + if ((adev->sdma.instance[0].fw_version >= 24) &&
> + !amdgpu_sriov_vf(adev) &&
> + !adev->debug_disable_gpu_ring_reset)
> + adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
> + break;
> + case IP_VERSION(5, 0, 1):
> + if ((adev->sdma.instance[0].fw_version >= 38) &&
> + !amdgpu_sriov_vf(adev) &&
> + !adev->debug_disable_gpu_ring_reset)
> + adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
> + break;
> case IP_VERSION(5, 0, 2):
> + if ((adev->sdma.instance[0].fw_version >= 30) &&
> + !amdgpu_sriov_vf(adev) &&
> + !adev->debug_disable_gpu_ring_reset)
> + adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
> + break;
> case IP_VERSION(5, 0, 5):
> if ((adev->sdma.instance[0].fw_version >= 35) &&
> - !amdgpu_sriov_vf(adev) &&
> - !adev->debug_disable_gpu_ring_reset)
> + !amdgpu_sriov_vf(adev) &&
> + !adev->debug_disable_gpu_ring_reset)
> adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
> - break;
> + break;
> default:
> break;
> }
> -
> /* Allocate memory for SDMA IP Dump buffer */
> ptr = kcalloc(adev->sdma.num_instances * reg_count, sizeof(uint32_t), GFP_KERNEL);
> if (ptr)
> --
> 2.49.0
>
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH 3/3] drm/amdgpu/sdma_v5_0: Update per-queue reset fw version checks for 5.0.x ASICs
2026-02-03 13:43 ` Alex Deucher
@ 2026-02-03 14:09 ` Alex Deucher
0 siblings, 0 replies; 5+ messages in thread
From: Alex Deucher @ 2026-02-03 14:09 UTC (permalink / raw)
To: Jesse.Zhang; +Cc: amd-gfx, Alexander.Deucher, Christian Koenig
On Tue, Feb 3, 2026 at 8:43 AM Alex Deucher <alexdeucher@gmail.com> wrote:
>
> Series is:
> Acked-by: Alex Deucher <alexander.deucher@amd.com>
Since the HW team said there is no firmware requirement, I'm also fine
with just dropping the switch statements and just doing something
like:
+ if (!amdgpu_sriov_vf(adev) &&
+ !adev->debug_disable_gpu_ring_reset)
+ adev->sdma.supported_reset |=
AMDGPU_RESET_TYPE_PER_QUEUE;
Alex
>
> On Tue, Feb 3, 2026 at 5:07 AM Jesse.Zhang <Jesse.Zhang@amd.com> wrote:
> >
> > Tune SDMA 5.0.x per-queue reset firmware version thresholds for specific ASICs:
> > 5.0.0: Require fw >=24
> > 5.0.2: Adjust fw threshold to >=30
> > 5.0.1: Add new check with fw >=38
> >
> > Signed-off-by: Jesse.Zhang <Jesse.zhang@amd.com>
> > ---
> > drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 23 +++++++++++++++++++----
> > 1 file changed, 19 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
> > index d72bd3adfccf..72492692f680 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
> > @@ -1432,17 +1432,32 @@ static int sdma_v5_0_sw_init(struct amdgpu_ip_block *ip_block)
> > amdgpu_get_soft_full_reset_mask(&adev->sdma.instance[0].ring);
> > switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) {
> > case IP_VERSION(5, 0, 0):
> > + if ((adev->sdma.instance[0].fw_version >= 24) &&
> > + !amdgpu_sriov_vf(adev) &&
> > + !adev->debug_disable_gpu_ring_reset)
> > + adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
> > + break;
> > + case IP_VERSION(5, 0, 1):
> > + if ((adev->sdma.instance[0].fw_version >= 38) &&
> > + !amdgpu_sriov_vf(adev) &&
> > + !adev->debug_disable_gpu_ring_reset)
> > + adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
> > + break;
> > case IP_VERSION(5, 0, 2):
> > + if ((adev->sdma.instance[0].fw_version >= 30) &&
> > + !amdgpu_sriov_vf(adev) &&
> > + !adev->debug_disable_gpu_ring_reset)
> > + adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
> > + break;
> > case IP_VERSION(5, 0, 5):
> > if ((adev->sdma.instance[0].fw_version >= 35) &&
> > - !amdgpu_sriov_vf(adev) &&
> > - !adev->debug_disable_gpu_ring_reset)
> > + !amdgpu_sriov_vf(adev) &&
> > + !adev->debug_disable_gpu_ring_reset)
> > adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
> > - break;
> > + break;
> > default:
> > break;
> > }
> > -
> > /* Allocate memory for SDMA IP Dump buffer */
> > ptr = kcalloc(adev->sdma.num_instances * reg_count, sizeof(uint32_t), GFP_KERNEL);
> > if (ptr)
> > --
> > 2.49.0
> >
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2026-02-03 14:09 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
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2026-02-03 8:56 [PATCH 1/3] drm/amdgpu/sdma_v5_2: update fw version check for per-queue reset on various ASICs Jesse.Zhang
2026-02-03 8:56 ` [PATCH 2/3] drm/amdgpu: extend per-queue reset fw check for 5.2.1/5.2.6/5.2.7 Jesse.Zhang
2026-02-03 8:56 ` [PATCH 3/3] drm/amdgpu/sdma_v5_0: Update per-queue reset fw version checks for 5.0.x ASICs Jesse.Zhang
2026-02-03 13:43 ` Alex Deucher
2026-02-03 14:09 ` Alex Deucher
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