From: <Roman.Li@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: Alex Deucher <alexander.deucher@amd.com>,
Harry Wentland <harry.wentland@amd.com>,
Pratik Vishwakarma <Pratik.Vishwakarma@amd.com>,
Aurabindo Pillai <aurabindo.pillai@amd.com>,
Ivan Lipski <ivan.lipski@amd.com>, Alex Hung <alex.hung@amd.com>,
Roman Li <Roman.Li@amd.com>
Subject: [PATCH 0/7] Patch set to support dcn42
Date: Wed, 11 Feb 2026 20:09:42 -0500 [thread overview]
Message-ID: <20260212010949.654686-1-Roman.Li@amd.com> (raw)
From: Roman Li <Roman.Li@amd.com>
This series adds initial support for DCN 4.2.
Roman Li (7):
drm/amd/display: Add dcn42 version identifiers
drm/amd/display: Add dcn42 register headers
drm/amd/display: Add dcn42 DC resources
drm/amd/display: Add DMUB support for dcn42
drm/amd/display: Enable dcn42 DMUB
drm/amd/display: Enable dcn42 DC
drm/amd/display: Enable dcn42 in DM
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 41 +-
.../amd/display/amdgpu_dm/amdgpu_dm_plane.c | 3 +-
.../display/dc/bios/command_table_helper2.c | 1 +
.../gpu/drm/amd/display/dc/clk_mgr/Makefile | 11 +-
.../display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c | 1152 +
.../display/dc/clk_mgr/dcn42/dcn42_clk_mgr.h | 79 +
.../amd/display/dc/clk_mgr/dcn42/dcn42_smu.c | 431 +
.../amd/display/dc/clk_mgr/dcn42/dcn42_smu.h | 190 +
.../drm/amd/display/dc/core/dc_hw_sequencer.c | 39 +-
.../gpu/drm/amd/display/dc/core/dc_resource.c | 7 +
drivers/gpu/drm/amd/display/dc/dc.h | 10 +-
drivers/gpu/drm/amd/display/dc/dc_helper.c | 2 +
drivers/gpu/drm/amd/display/dc/dc_hw_types.h | 73 +
drivers/gpu/drm/amd/display/dc/dc_types.h | 6 +-
drivers/gpu/drm/amd/display/dc/dccg/Makefile | 11 +-
.../amd/display/dc/dccg/dcn20/dcn20_dccg.h | 15 +-
.../amd/display/dc/dccg/dcn42/dcn42_dccg.c | 278 +
.../amd/display/dc/dccg/dcn42/dcn42_dccg.h | 263 +
drivers/gpu/drm/amd/display/dc/dce/dce_abm.h | 60 +-
drivers/gpu/drm/amd/display/dc/dio/Makefile | 11 +-
.../dc/dio/dcn10/dcn10_stream_encoder.h | 10 +-
.../dc/dio/dcn42/dcn42_dio_link_encoder.c | 205 +
.../dc/dio/dcn42/dcn42_dio_link_encoder.h | 140 +
.../dc/dio/dcn42/dcn42_dio_stream_encoder.c | 522 +
.../dc/dio/dcn42/dcn42_dio_stream_encoder.h | 206 +
drivers/gpu/drm/amd/display/dc/dpp/Makefile | 10 +-
.../amd/display/dc/dpp/dcn401/dcn401_dpp.h | 5 +-
.../drm/amd/display/dc/dpp/dcn42/dcn42_dpp.c | 338 +
.../drm/amd/display/dc/dpp/dcn42/dcn42_dpp.h | 469 +
drivers/gpu/drm/amd/display/dc/gpio/Makefile | 13 +-
.../display/dc/gpio/dcn42/hw_factory_dcn42.c | 254 +
.../display/dc/gpio/dcn42/hw_factory_dcn42.h | 31 +
.../dc/gpio/dcn42/hw_translate_dcn42.c | 205 +
.../dc/gpio/dcn42/hw_translate_dcn42.h | 36 +
.../gpu/drm/amd/display/dc/gpio/hw_factory.c | 4 +
.../drm/amd/display/dc/gpio/hw_translate.c | 4 +
drivers/gpu/drm/amd/display/dc/hpo/Makefile | 11 +-
.../hpo/dcn31/dcn31_hpo_dp_stream_encoder.h | 10 +-
.../dc/hpo/dcn42/dcn42_hpo_dp_link_encoder.c | 93 +
.../dc/hpo/dcn42/dcn42_hpo_dp_link_encoder.h | 17 +
.../gpu/drm/amd/display/dc/hubbub/Makefile | 10 +-
.../display/dc/hubbub/dcn10/dcn10_hubbub.h | 6 +-
.../display/dc/hubbub/dcn42/dcn42_hubbub.c | 539 +
.../display/dc/hubbub/dcn42/dcn42_hubbub.h | 268 +
drivers/gpu/drm/amd/display/dc/hubp/Makefile | 10 +-
.../amd/display/dc/hubp/dcn20/dcn20_hubp.h | 8 +-
.../amd/display/dc/hubp/dcn42/dcn42_hubp.c | 643 +
.../amd/display/dc/hubp/dcn42/dcn42_hubp.h | 79 +
drivers/gpu/drm/amd/display/dc/hwss/Makefile | 12 +-
.../drm/amd/display/dc/hwss/dce/dce_hwseq.h | 13 +-
.../amd/display/dc/hwss/dcn42/dcn42_hwseq.c | 1476 +
.../amd/display/dc/hwss/dcn42/dcn42_hwseq.h | 53 +
.../amd/display/dc/hwss/dcn42/dcn42_init.c | 167 +
.../amd/display/dc/hwss/dcn42/dcn42_init.h | 11 +
.../drm/amd/display/dc/hwss/hw_sequencer.h | 17 +-
.../display/dc/hwss/hw_sequencer_private.h | 5 +-
.../gpu/drm/amd/display/dc/inc/hw/clk_mgr.h | 24 +-
.../amd/display/dc/inc/hw/clk_mgr_internal.h | 42 +-
drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h | 10 +-
drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h | 20 +-
.../amd/display/dc/inc/hw/timing_generator.h | 4 +-
drivers/gpu/drm/amd/display/dc/irq/Makefile | 9 +
.../display/dc/irq/dcn42/irq_service_dcn42.c | 412 +
.../display/dc/irq/dcn42/irq_service_dcn42.h | 15 +
.../gpu/drm/amd/display/dc/mmhubbub/Makefile | 10 +-
.../dc/mmhubbub/dcn42/dcn42_mmhubbub.c | 25 +
.../dc/mmhubbub/dcn42/dcn42_mmhubbub.h | 13 +
drivers/gpu/drm/amd/display/dc/mpc/Makefile | 10 +-
.../amd/display/dc/mpc/dcn401/dcn401_mpc.c | 13 +-
.../amd/display/dc/mpc/dcn401/dcn401_mpc.h | 10 +-
.../drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c | 1121 +
.../drm/amd/display/dc/mpc/dcn42/dcn42_mpc.h | 1006 +
drivers/gpu/drm/amd/display/dc/optc/Makefile | 10 +-
.../amd/display/dc/optc/dcn10/dcn10_optc.h | 20 +-
.../amd/display/dc/optc/dcn42/dcn42_optc.c | 198 +
.../amd/display/dc/optc/dcn42/dcn42_optc.h | 211 +
drivers/gpu/drm/amd/display/dc/pg/Makefile | 10 +-
.../amd/display/dc/pg/dcn42/dcn42_pg_cntl.c | 648 +
.../amd/display/dc/pg/dcn42/dcn42_pg_cntl.h | 175 +
.../gpu/drm/amd/display/dc/resource/Makefile | 18 +
.../dc/resource/dcn42/dcn42_resource.c | 2337 +
.../dc/resource/dcn42/dcn42_resource.h | 588 +
.../dc/resource/dcn42/dcn42_resource_fpu.c | 47 +
.../dc/resource/dcn42/dcn42_resource_fpu.h | 33 +
drivers/gpu/drm/amd/display/dmub/dmub_srv.h | 5 +-
drivers/gpu/drm/amd/display/dmub/src/Makefile | 3 +-
.../gpu/drm/amd/display/dmub/src/dmub_dcn42.c | 752 +
.../gpu/drm/amd/display/dmub/src/dmub_dcn42.h | 171 +
.../gpu/drm/amd/display/dmub/src/dmub_srv.c | 64 +-
.../gpu/drm/amd/display/include/dal_asic_id.h | 1 +
.../gpu/drm/amd/display/include/dal_types.h | 1 +
.../include/asic_reg/dcn/dcn_4_2_0_offset.h | 17872 ++++
.../include/asic_reg/dcn/dcn_4_2_0_sh_mask.h | 67277 ++++++++++++++++
.../include/asic_reg/dpcs/dpcs_4_0_0_offset.h | 142 +
.../asic_reg/dpcs/dpcs_4_0_0_sh_mask.h | 688 +
95 files changed, 102551 insertions(+), 47 deletions(-)
create mode 100644 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c
create mode 100644 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.h
create mode 100644 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_smu.c
create mode 100644 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_smu.h
create mode 100644 drivers/gpu/drm/amd/display/dc/dccg/dcn42/dcn42_dccg.c
create mode 100644 drivers/gpu/drm/amd/display/dc/dccg/dcn42/dcn42_dccg.h
create mode 100644 drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_link_encoder.c
create mode 100644 drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_link_encoder.h
create mode 100644 drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_stream_encoder.c
create mode 100644 drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_stream_encoder.h
create mode 100644 drivers/gpu/drm/amd/display/dc/dpp/dcn42/dcn42_dpp.c
create mode 100644 drivers/gpu/drm/amd/display/dc/dpp/dcn42/dcn42_dpp.h
create mode 100644 drivers/gpu/drm/amd/display/dc/gpio/dcn42/hw_factory_dcn42.c
create mode 100644 drivers/gpu/drm/amd/display/dc/gpio/dcn42/hw_factory_dcn42.h
create mode 100644 drivers/gpu/drm/amd/display/dc/gpio/dcn42/hw_translate_dcn42.c
create mode 100644 drivers/gpu/drm/amd/display/dc/gpio/dcn42/hw_translate_dcn42.h
create mode 100644 drivers/gpu/drm/amd/display/dc/hpo/dcn42/dcn42_hpo_dp_link_encoder.c
create mode 100644 drivers/gpu/drm/amd/display/dc/hpo/dcn42/dcn42_hpo_dp_link_encoder.h
create mode 100644 drivers/gpu/drm/amd/display/dc/hubbub/dcn42/dcn42_hubbub.c
create mode 100644 drivers/gpu/drm/amd/display/dc/hubbub/dcn42/dcn42_hubbub.h
create mode 100644 drivers/gpu/drm/amd/display/dc/hubp/dcn42/dcn42_hubp.c
create mode 100644 drivers/gpu/drm/amd/display/dc/hubp/dcn42/dcn42_hubp.h
create mode 100644 drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c
create mode 100644 drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.h
create mode 100644 drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_init.c
create mode 100644 drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_init.h
create mode 100644 drivers/gpu/drm/amd/display/dc/irq/dcn42/irq_service_dcn42.c
create mode 100644 drivers/gpu/drm/amd/display/dc/irq/dcn42/irq_service_dcn42.h
create mode 100644 drivers/gpu/drm/amd/display/dc/mmhubbub/dcn42/dcn42_mmhubbub.c
create mode 100644 drivers/gpu/drm/amd/display/dc/mmhubbub/dcn42/dcn42_mmhubbub.h
create mode 100644 drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c
create mode 100644 drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.h
create mode 100644 drivers/gpu/drm/amd/display/dc/optc/dcn42/dcn42_optc.c
create mode 100644 drivers/gpu/drm/amd/display/dc/optc/dcn42/dcn42_optc.h
create mode 100644 drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.c
create mode 100644 drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.h
create mode 100644 drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c
create mode 100644 drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.h
create mode 100644 drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource_fpu.c
create mode 100644 drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource_fpu.h
create mode 100644 drivers/gpu/drm/amd/display/dmub/src/dmub_dcn42.c
create mode 100644 drivers/gpu/drm/amd/display/dmub/src/dmub_dcn42.h
create mode 100644 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_4_2_0_offset.h
create mode 100644 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_4_2_0_sh_mask.h
create mode 100644 drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_4_0_0_offset.h
create mode 100644 drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_4_0_0_sh_mask.h
--
2.34.1
next reply other threads:[~2026-02-12 1:10 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-12 1:09 Roman.Li [this message]
2026-02-12 1:09 ` [PATCH 1/7] drm/amd/display: Add dcn42 version identifiers Roman.Li
2026-02-12 1:09 ` [PATCH 4/7] drm/amd/display: Add DMUB support for dcn42 Roman.Li
2026-02-12 1:09 ` [PATCH 5/7] drm/amd/display: Enable dcn42 DMUB Roman.Li
2026-02-12 1:09 ` [PATCH 6/7] drm/amd/display: Enable dcn42 DC Roman.Li
2026-02-12 1:09 ` [PATCH 7/7] drm/amd/display: Enable dcn42 in DM Roman.Li
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