From: Jesse Zhang <Jesse.Zhang@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: <Alexander.Deucher@amd.com>,
Christian Koenig <christian.koenig@amd.com>,
Jesse Zhang <Jesse.Zhang@amd.com>,
Jesse Zhang <jesse.zhang@amd.com>
Subject: [PATCH v3 3/8] drm/amdgpu/gfx11: Fall back to pipe reset if per-queue reset ring test fails
Date: Tue, 14 Apr 2026 16:58:50 +0800 [thread overview]
Message-ID: <20260414085926.3171086-3-Jesse.Zhang@amd.com> (raw)
In-Reply-To: <20260414085926.3171086-1-Jesse.Zhang@amd.com>
After a per-queue reset via MES, verify that the queue is functional by
performing a ring test. If the test fails, fall back to a full pipe reset
to ensure proper recovery.
This adds a fallback path similar to the one already present when the
initial per-queue reset attempt fails, improving the robustness of KCQ
reset handling on GFX11 hardware.
Signed-off-by: Jesse Zhang <jesse.zhang@amd.com>
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index e29e8e620699..fbef19ed46f9 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
@@ -7075,14 +7075,18 @@ static int gfx_v11_0_reset_kcq(struct amdgpu_ring *ring,
struct amdgpu_fence *timedout_fence)
{
struct amdgpu_device *adev = ring->adev;
+ int reset_mode = AMDGPU_RESET_TYPE_PER_QUEUE;
int r = 0;
amdgpu_ring_reset_helper_begin(ring, timedout_fence);
r = amdgpu_mes_reset_legacy_queue(ring->adev, ring, vmid, true, 0);
+
+pipe_reset:
if (r) {
dev_warn(adev->dev, "fail(%d) to reset kcq and try pipe reset\n", r);
+ reset_mode = AMDGPU_RESET_TYPE_PER_PIPE;
amdgpu_amdkfd_suspend(adev, true);
r = amdgpu_gfx_mec_pipe_reset_run(adev,
ring->xcc_id, ring->me, ring->pipe,
@@ -7105,6 +7109,13 @@ static int gfx_v11_0_reset_kcq(struct amdgpu_ring *ring,
return r;
}
+ if (reset_mode == AMDGPU_RESET_TYPE_PER_QUEUE) {
+ if (amdgpu_ring_reset_helper_end(ring, timedout_fence))
+ goto pipe_reset;
+ else
+ return 0;
+ }
+
return amdgpu_ring_reset_helper_end(ring, timedout_fence);
}
--
2.49.0
next prev parent reply other threads:[~2026-04-14 9:00 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-14 8:58 [PATCH v3 1/8] drm/amdgpu: add coordinated MEC pipe reset for GFX compute queues Jesse Zhang
2026-04-14 8:58 ` [PATCH v3 2/8] drm/amdgpu/gfx11: Refactor compute pipe reset and add HQD cleanup Jesse Zhang
2026-04-14 8:58 ` Jesse Zhang [this message]
2026-04-14 8:58 ` [PATCH v3 4/8] drm/amdgpu/gfx11: enable per-pipe reset support for compute queues Jesse Zhang
2026-04-14 8:58 ` [PATCH v3 5/8] drm/amdgpu/gfx12: Refactor compute pipe reset and add HQD cleanup Jesse Zhang
2026-04-14 8:58 ` [PATCH v3 6/8] drm/amdgpu/gfx12: Fall back to pipe reset if per-queue reset ring test fails Jesse Zhang
2026-04-14 8:58 ` [PATCH v3 7/8] drm/amdgpu/gfx12: enable per-pipe reset support for compute queues Jesse Zhang
2026-04-14 8:58 ` [PATCH v3 8/8] drm/amdgpu/gfx_v12_0: set gfx.rs64_enable from PFP header on GFX12 Jesse Zhang
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