AMD-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: James Lin <PingLei.Lin@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: Harry Wentland <harry.wentland@amd.com>,
	Leo Li <sunpeng.li@amd.com>,
	Aurabindo Pillai <aurabindo.pillai@amd.com>,
	Roman Li <roman.li@amd.com>, Wayne Lin <wayne.lin@amd.com>,
	Tom Chung <chiahsuan.chung@amd.com>,
	"Fangzhi Zuo" <jerry.zuo@amd.com>,
	Dan Wheeler <daniel.wheeler@amd.com>, Ray Wu <Ray.Wu@amd.com>,
	Ivan Lipski <ivan.lipski@amd.com>, Alex Hung <alex.hung@amd.com>,
	James Lin <PingLei.Lin@amd.com>,
	Chenyu Chen <Chen-Yu.Chen@amd.com>,
	Gaghik Khachatrian <gaghik.khachatrian@amd.com>,
	Dillon Varone <dillon.varone@amd.com>,
	James Lin <pinglei.lin@amd.com>
Subject: [PATCH 05/20] drm/amd/display: Fix compiler warnings in dml2
Date: Wed, 6 May 2026 12:31:03 +0800	[thread overview]
Message-ID: <20260506043342.2164710-6-PingLei.Lin@amd.com> (raw)
In-Reply-To: <20260506043342.2164710-1-PingLei.Lin@amd.com>

From: Gaghik Khachatrian <gaghik.khachatrian@amd.com>

[Why & How]
In dml2_translation_helper.c, rename the inner loop index inside
dml2_init_soc_states() for several project cases
to avoid shadowing the outer function-scope index variable.

In display_mode_core.c, replace shift-based power-of-two expressions
used to compute dpte_row_height and dpte_row_height_linear with an
equivalent floating-point power function, consistent with existing
usage elsewhere in the file.

Behavior for valid inputs is preserved in both cases.

Reviewed-by: Dillon Varone <dillon.varone@amd.com>
Signed-off-by: Gaghik Khachatrian <gaghik.khachatrian@amd.com>
Signed-off-by: James Lin <pinglei.lin@amd.com>
---
 drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c b/drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c
index 16514f1e4ed9..241406e9e85a 100644
--- a/drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c
+++ b/drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c
@@ -2626,18 +2626,18 @@ static dml_uint_t CalculateVMAndRowBytes(
 	*PixelPTEBytesPerRow_one_row_per_frame = (dml_uint_t)((dml_float_t) *dpte_row_width_ub_one_row_per_frame / (dml_float_t) *PixelPTEReqWidth * *PTERequestSize);
 
 	if (SurfaceTiling == dml_sw_linear) {
-		*dpte_row_height = (dml_uint_t)(dml_min(128, 1 << (dml_uint_t) dml_floor(dml_log2(PTEBufferSizeInRequests * *PixelPTEReqWidth / Pitch), 1)));
+		*dpte_row_height = (dml_uint_t)(dml_min(128, (dml_uint_t)dml_pow(2.0, (int)dml_floor(dml_log2(PTEBufferSizeInRequests * *PixelPTEReqWidth / Pitch), 1))));
 		dml_print("DML::%s: dpte_row_height term 1 = %u\n", __func__, PTEBufferSizeInRequests * *PixelPTEReqWidth / Pitch);
 		dml_print("DML::%s: dpte_row_height term 2 = %f\n", __func__, dml_log2(PTEBufferSizeInRequests * *PixelPTEReqWidth / Pitch));
 		dml_print("DML::%s: dpte_row_height term 3 = %f\n", __func__, dml_floor(dml_log2(PTEBufferSizeInRequests * *PixelPTEReqWidth / Pitch), 1));
-		dml_print("DML::%s: dpte_row_height term 4 = %u\n", __func__, 1 << (dml_uint_t) dml_floor(dml_log2(PTEBufferSizeInRequests * *PixelPTEReqWidth / Pitch), 1));
+		dml_print("DML::%s: dpte_row_height term 4 = %u\n", __func__, (dml_uint_t)dml_pow(2.0, (int)dml_floor(dml_log2(PTEBufferSizeInRequests * *PixelPTEReqWidth / Pitch), 1)));
 		dml_print("DML::%s: dpte_row_height = %u\n", __func__, *dpte_row_height);
 
 		*dpte_row_width_ub = (dml_uint_t)(dml_ceil(((dml_float_t) Pitch * (dml_float_t) *dpte_row_height - 1), (dml_float_t) *PixelPTEReqWidth) + *PixelPTEReqWidth);
 		*PixelPTEBytesPerRow = (dml_uint_t)((dml_float_t) *dpte_row_width_ub / (dml_float_t) *PixelPTEReqWidth * *PTERequestSize);
 
 		// VBA_DELTA, VBA doesn't have programming value for pte row height linear.
-		*dpte_row_height_linear = 1 << (dml_uint_t) dml_floor(dml_log2(PTEBufferSizeInRequests * PixelPTEReqWidth_linear / Pitch), 1);
+		*dpte_row_height_linear = (dml_uint_t)dml_pow(2.0, (int)dml_floor(dml_log2(PTEBufferSizeInRequests * PixelPTEReqWidth_linear / Pitch), 1));
 		if (*dpte_row_height_linear > 128)
 			*dpte_row_height_linear = 128;
 
-- 
2.43.0


  parent reply	other threads:[~2026-05-06  7:04 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-06  4:30 [PATCH 00/20] DC Patches May 11 2026 James Lin
2026-05-06  4:30 ` [PATCH 01/20] drm/amd/display: Fix refresh rate round up case James Lin
2026-05-06  4:31 ` [PATCH 02/20] drm/amd/display: Fix white screen on boot with OLED panel James Lin
2026-05-06  4:31 ` [PATCH 03/20] drm/amd/display: Fix CRC open failure during active rendering James Lin
2026-05-06  4:31 ` [PATCH 04/20] drm/amd/display: Fix signed/unsigned comparison mismatches James Lin
2026-05-06  4:31 ` James Lin [this message]
2026-05-06  4:31 ` [PATCH 06/20] drm/amd/display: Fix multiple compiler warnings James Lin
2026-05-06  4:31 ` [PATCH 07/20] drm/amd/display: Fix warnings James Lin
2026-05-06  4:31 ` [PATCH 08/20] drm/amd/display: only call pmfw if smu present flags true James Lin
2026-05-06  4:31 ` [PATCH 09/20] drm/amd/display: Refactor dc_link_aux_transfer_raw James Lin
2026-05-06  4:31 ` [PATCH 10/20] drm/amd/display: always-true lower-bound assert James Lin
2026-05-06  4:31 ` [PATCH 11/20] drm/amd/display: Separate ABM functions into dedicated power_abm.c file James Lin
2026-05-06  4:31 ` [PATCH 12/20] drm/amd/display: Add additional IPS entry/exit for PSR/Replay James Lin
2026-05-06  4:31 ` [PATCH 13/20] drm/amd/display: Enable IPS on DCN42 James Lin
2026-05-06  4:31 ` [PATCH 14/20] drm/amd/display: Fix enum decl warnings James Lin
2026-05-06  4:31 ` [PATCH 15/20] drm/amd/display: enable ODM 2:1 on single eDP based on pixel clock James Lin
2026-05-06  4:31 ` [PATCH 16/20] drm/amd/display: Revert "Unify fast update classification paths" James Lin
2026-05-06  4:31 ` [PATCH 17/20] drm/amd/display: Revert "Enable HUBP/OPTC/DPP power gating" James Lin
2026-05-06  4:31 ` [PATCH 18/20] drm/amd/display: Wrap DCN32 phantom-plane allocation in DC_RUN_WITH_PREEMPTION_ENABLED James Lin
2026-05-06  4:31 ` [PATCH 19/20] drm/amd/display: [FW Promotion] Release 0.1.59.0 James Lin
2026-05-06  4:31 ` [PATCH 20/20] drm/amd/display: Promote DC to 3.2.382 James Lin
2026-05-11 13:05 ` [PATCH 00/20] DC Patches May 11 2026 Wheeler, Daniel

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20260506043342.2164710-6-PingLei.Lin@amd.com \
    --to=pinglei.lin@amd.com \
    --cc=Chen-Yu.Chen@amd.com \
    --cc=Ray.Wu@amd.com \
    --cc=alex.hung@amd.com \
    --cc=amd-gfx@lists.freedesktop.org \
    --cc=aurabindo.pillai@amd.com \
    --cc=chiahsuan.chung@amd.com \
    --cc=daniel.wheeler@amd.com \
    --cc=dillon.varone@amd.com \
    --cc=gaghik.khachatrian@amd.com \
    --cc=harry.wentland@amd.com \
    --cc=ivan.lipski@amd.com \
    --cc=jerry.zuo@amd.com \
    --cc=roman.li@amd.com \
    --cc=sunpeng.li@amd.com \
    --cc=wayne.lin@amd.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox