[PATCH 1/2] drm/amdgpu: Fix per queue reset on MES 12.1

[PATCH 1/2] drm/amdgpu: Fix per queue reset on MES 12.1

[Amber Lin]

Different from detect_and_reset, reset_hw_queue performs per queue reset
by sending reset_queue_only=1 and hung queue's doorbell_offset to MES
in RESET packet. enable_compute_pipe_reset=1 also needs to be set in
SET_HW_RESOURCES so when queue reset fails, MES will proceed pipe reset.

This patch also fix a bug in mes_v12_1_reset_hw_queue function. Instead of
using MESAPI__RESET offset for api_status, the existing code uses
MESAPI__REMOVE_QUEUE.

Signed-off-by: Amber Lin <amber.lin@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/mes_v12_1.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v12_1.c b/drivers/gpu/drm/amd/amdgpu/mes_v12_1.c
index f1098118d5c0..9c01dc97d271 100644
--- a/drivers/gpu/drm/amd/amdgpu/mes_v12_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/mes_v12_1.c
@@ -388,7 +388,7 @@ static int mes_v12_1_reset_hw_queue(struct amdgpu_mes *mes,
 
 	mes_reset_queue_pkt.doorbell_offset = input->doorbell_offset;
 	/* mes_reset_queue_pkt.gang_context_addr = input->gang_context_addr; */
-	/*mes_reset_queue_pkt.reset_queue_only = 1;*/
+	mes_reset_queue_pkt.reset_queue_only = 1;
 
 	if (mes->adev->enable_uni_mes)
 		pipe = AMDGPU_MES_KIQ_PIPE;
@@ -398,7 +398,7 @@ static int mes_v12_1_reset_hw_queue(struct amdgpu_mes *mes,
 	return mes_v12_1_submit_pkt_and_poll_completion(mes,
 			input->xcc_id, pipe,
 			&mes_reset_queue_pkt, sizeof(mes_reset_queue_pkt),
-			offsetof(union MESAPI__REMOVE_QUEUE, api_status));
+			offsetof(union MESAPI__RESET, api_status));
 }
 
 static int mes_v12_1_map_legacy_queue(struct amdgpu_mes *mes,
@@ -743,6 +743,8 @@ static int mes_v12_1_set_hw_resources(struct amdgpu_mes *mes,
 	mes_set_hw_res_pkt.use_different_vmid_compute = 1;
 	mes_set_hw_res_pkt.enable_reg_active_poll = 1;
 	mes_set_hw_res_pkt.enable_level_process_quantum_check = 1;
+	/* proceeds pipe reset if queue reset fails */
+	mes_set_hw_res_pkt.enable_compute_pipe_reset = 1;
 
 	/*
 	 * Keep oversubscribe timer for sdma . When we have unmapped doorbell
-- 
2.43.0

[PATCH 2/2] drm/amdgpu: Set queue reset method for GC 12.1

[Amber Lin]

EXplicitely setting use_mmio_for_reset = false in gfx_v12_1_sw_init for
using MES to perform queue/pipe reset

Signed-off-by: Amber Lin <amber.lin@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c b/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
index e49d8a79045c..6635fa9eaae9 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
@@ -1560,6 +1560,9 @@ static int gfx_v12_1_sw_init(struct amdgpu_ip_block *ip_block)
 
 	gfx_v12_1_alloc_ip_dump(adev);
 
+	adev->gfx.me.use_mmio_for_reset = false;
+	adev->gfx.mec.use_mmio_for_reset = false;
+
 	mutex_init(&adev->gfx.mec.reset_mutex);
 
 	return 0;
-- 
2.43.0

[PATCH 1/2] drm/amdgpu: Fix reset_hw_queue on MES 12.1

[Amber Lin]

Different from detect_and_reset, reset_hw_queue performs per queue
reset. Per queue reset setting requires reset_queue_only=1 and hung
queue's doorbell_offset in RESET packet. This packet must be sent to MES
pipe 0(SCHED_PIPE).

We also need to set enable_compute_pipe_reset=1 in SET_HW_RESOURCES so when
queue reset fails, MES will proceed pipe reset.

This patch also fixes a bug in mes_v12_1_reset_hw_queue function. Instead of
using MESAPI__RESET offset for api_status, the existing code uses
MESAPI__REMOVE_QUEUE.

Signed-off-by: Amber Lin <amber.lin@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/mes_v12_1.c | 14 +++++---------
 1 file changed, 5 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v12_1.c b/drivers/gpu/drm/amd/amdgpu/mes_v12_1.c
index f1098118d5c0..8ecd9cc85cd9 100644
--- a/drivers/gpu/drm/amd/amdgpu/mes_v12_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/mes_v12_1.c
@@ -378,7 +378,6 @@ static int mes_v12_1_reset_hw_queue(struct amdgpu_mes *mes,
 				    struct mes_reset_queue_input *input)
 {
 	union MESAPI__RESET mes_reset_queue_pkt;
-	int pipe;
 
 	memset(&mes_reset_queue_pkt, 0, sizeof(mes_reset_queue_pkt));
 
@@ -388,17 +387,12 @@ static int mes_v12_1_reset_hw_queue(struct amdgpu_mes *mes,
 
 	mes_reset_queue_pkt.doorbell_offset = input->doorbell_offset;
 	/* mes_reset_queue_pkt.gang_context_addr = input->gang_context_addr; */
-	/*mes_reset_queue_pkt.reset_queue_only = 1;*/
-
-	if (mes->adev->enable_uni_mes)
-		pipe = AMDGPU_MES_KIQ_PIPE;
-	else
-		pipe = AMDGPU_MES_SCHED_PIPE;
+	mes_reset_queue_pkt.reset_queue_only = 1;
 
 	return mes_v12_1_submit_pkt_and_poll_completion(mes,
-			input->xcc_id, pipe,
+			input->xcc_id, AMDGPU_MES_SCHED_PIPE,
 			&mes_reset_queue_pkt, sizeof(mes_reset_queue_pkt),
-			offsetof(union MESAPI__REMOVE_QUEUE, api_status));
+			offsetof(union MESAPI__RESET, api_status));
 }
 
 static int mes_v12_1_map_legacy_queue(struct amdgpu_mes *mes,
@@ -743,6 +737,8 @@ static int mes_v12_1_set_hw_resources(struct amdgpu_mes *mes,
 	mes_set_hw_res_pkt.use_different_vmid_compute = 1;
 	mes_set_hw_res_pkt.enable_reg_active_poll = 1;
 	mes_set_hw_res_pkt.enable_level_process_quantum_check = 1;
+	/* proceeds pipe reset if queue reset fails */
+	mes_set_hw_res_pkt.enable_compute_pipe_reset = 1;
 
 	/*
 	 * Keep oversubscribe timer for sdma . When we have unmapped doorbell
-- 
2.43.0

[PATCH 2/2] drm/amdgpu: Set queue reset method for GC 12.1

[Amber Lin]

Explicitely set use_mmio_for_reset=false in gfx_v12_1_sw_init for using
MES to perform queue/pipe reset

Signed-off-by: Amber Lin <amber.lin@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c b/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
index 9dd7a3335719..97f4da7b7607 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
@@ -1560,6 +1560,9 @@ static int gfx_v12_1_sw_init(struct amdgpu_ip_block *ip_block)
 
 	gfx_v12_1_alloc_ip_dump(adev);
 
+	adev->gfx.me.use_mmio_for_reset = false;
+	adev->gfx.mec.use_mmio_for_reset = false;
+
 	mutex_init(&adev->gfx.mec.reset_mutex);
 
 	return 0;
-- 
2.43.0

RE: [PATCH 2/2] drm/amdgpu: Set queue reset method for GC 12.1

[Zhang, Jesse(Jie)]

AMD General

> -----Original Message-----
> From: Lin, Amber <Amber.Lin@amd.com>
> Sent: Thursday, August 20, 2026 11:25 PM
> To: amd-gfx@lists.freedesktop.org; Liu, Shaoyun <Shaoyun.Liu@amd.com>;
> Deucher, Alexander <Alexander.Deucher@amd.com>; Zhang, Jesse(Jie)
> <Jesse.Zhang@amd.com>
> Cc: Lin, Amber <Amber.Lin@amd.com>
> Subject: [PATCH 2/2] drm/amdgpu: Set queue reset method for GC 12.1
>
> Explicitely set use_mmio_for_reset=false in gfx_v12_1_sw_init for using MES to
> perform queue/pipe reset
>
> Signed-off-by: Amber Lin <amber.lin@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
> index 9dd7a3335719..97f4da7b7607 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
> @@ -1560,6 +1560,9 @@ static int gfx_v12_1_sw_init(struct amdgpu_ip_block
> *ip_block)
>
>       gfx_v12_1_alloc_ip_dump(adev);
>
> +     adev->gfx.me.use_mmio_for_reset = false;
> +     adev->gfx.mec.use_mmio_for_reset = false;
> +

The MES firmware already supports queue/pipeline reset, right? Do I need to check the MES firmware version before switching to MES?
Apart form that, the series is Review-by:Jesse Zhang <Jesse.Zhang@amd.com>

Thanks
Jesse

>       mutex_init(&adev->gfx.mec.reset_mutex);
>
>       return 0;
> --
> 2.43.0