From: Zhu Lingshan <lingshan.zhu@amd.com>
To: <Alexander.Deucher@amd.com>, <felix.kuehling@amd.com>
Cc: <Ray.Huang@amd.com>, <amd-gfx@lists.freedesktop.org>,
Zhu Lingshan <lingshan.zhu@amd.com>
Subject: [RFC 08/10] drm/amdgpu: GFX12.1: set mqd->perfcount from mqd_prop
Date: Tue, 22 Sep 2026 17:34:34 +0800 [thread overview]
Message-ID: <20260922093436.596947-9-lingshan.zhu@amd.com> (raw)
In-Reply-To: <20260922093436.596947-1-lingshan.zhu@amd.com>
This commit implements amdgpu_mqd->set_mqd_perfcount
for GFX12.1, which helps setting mqd->compute_perfcount_enable
from amdgpu_mqd_prop->perfcount_enable.
Signed-off-by: Zhu Lingshan <lingshan.zhu@amd.com>
---
drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c b/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
index b19a4956c222..ab70a77cfffb 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
@@ -2170,6 +2170,7 @@ static int gfx_v12_1_compute_mqd_init(struct amdgpu_device *adev, void *m,
mqd->header = 0xC0310800;
mqd->compute_pipelinestat_enable = 0x00000001;
+ mqd->compute_perfcount_enable = prop->perfcount_enable;
mqd->compute_static_thread_mgmt_se0 = 0xffffffff;
mqd->compute_static_thread_mgmt_se1 = 0xffffffff;
mqd->compute_static_thread_mgmt_se2 = 0xffffffff;
@@ -2298,6 +2299,14 @@ static int gfx_v12_1_compute_mqd_init(struct amdgpu_device *adev, void *m,
return 0;
}
+static void gfx_v12_1_compute_mqd_set_perfcount(void *m,
+ struct amdgpu_mqd_prop *prop)
+{
+ struct v12_1_compute_mqd *mqd = m;
+
+ mqd->compute_perfcount_enable = prop->perfcount_enable;
+}
+
static int gfx_v12_1_xcc_kiq_init_register(struct amdgpu_ring *ring,
int xcc_id)
{
@@ -4041,6 +4050,8 @@ static void gfx_v12_1_set_mqd_funcs(struct amdgpu_device *adev)
sizeof(struct v12_1_compute_mqd);
adev->mqds[AMDGPU_HW_IP_COMPUTE].init_mqd =
gfx_v12_1_compute_mqd_init;
+ adev->mqds[AMDGPU_HW_IP_COMPUTE].set_mqd_perfcount =
+ gfx_v12_1_compute_mqd_set_perfcount;
}
static void gfx_v12_1_set_user_cu_inactive_bitmap_per_sh(struct amdgpu_device *adev,
--
2.55.0
next prev parent reply other threads:[~2026-09-22 9:34 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-22 9:34 [RFC 00/10] amdgpu: implement Performance Monitor Counter support Zhu Lingshan
2026-09-22 9:34 ` [RFC 01/10] drm/amdgpu: implement PMC ioctl framework Zhu Lingshan
2026-09-23 14:17 ` James Zhu
2026-09-24 3:38 ` Zhu, Lingshan
2026-09-24 15:49 ` James Zhu
2026-10-08 7:59 ` Zhu, Lingshan
2026-09-22 9:34 ` [RFC 02/10] drm/amdgpu: add device-wide PMC config Zhu Lingshan
2026-09-23 14:13 ` James Zhu
2026-09-24 3:23 ` Zhu, Lingshan
2026-09-24 15:40 ` James Zhu
2026-10-08 7:50 ` Zhu, Lingshan
2026-09-22 9:34 ` [RFC 03/10] drm/amdgpu: introduce PMC ioctl handler Zhu Lingshan
2026-09-22 9:34 ` [RFC 04/10] drm/amdgpu: implement reservation mechanism for PMC Zhu Lingshan
2026-09-22 9:34 ` [RFC 05/10] drm/amdgpu: set device-wide PMC enablement indicator Zhu Lingshan
2026-09-22 9:34 ` [RFC 06/10] drm/amdgpu: GFX11: set mqd->perfcount from mqd_prop Zhu Lingshan
2026-09-22 9:34 ` [RFC 07/10] drm/amdgpu: GFX12: " Zhu Lingshan
2026-09-22 9:34 ` Zhu Lingshan [this message]
2026-09-22 9:34 ` [RFC 09/10] drm/amdgpu: implement device PMC handler Zhu Lingshan
2026-09-22 9:34 ` [RFC 10/10] drm/amdgpu: set userq perf state before publish it Zhu Lingshan
2026-09-23 14:02 ` [RFC 00/10] amdgpu: implement Performance Monitor Counter support James Zhu
2026-09-23 15:02 ` Welton, Benjamin
2026-09-23 15:11 ` James Zhu
2026-09-24 3:40 ` Zhu, Lingshan
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