Re: [PATCH 1/3] drm/amdgpu/gfx10: fix wptr reset in KGQ init

["Timur Kristóf" <timur.kristof@gmail.com>]

On Thursday, January 29, 2026 5:34:44 AM Central European Standard Time Alex 
Deucher wrote:
> wptr is a 64 bit value and we need to update the
> full value, not just 32 bits. Align with what we
> already do for KCQs.
> 
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
for the series.

I notice that the code base already does this for gfx9, but is rather 
inconsistent on gfx6-8. If you think that's useful, I could submit some 
patches to do the same on older GPUs. What do you think?

> ---
>  drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c index e9254ec3b6417..ef7d91a4437ec
> 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> @@ -6883,7 +6883,7 @@ static int gfx_v10_0_kgq_init_queue(struct amdgpu_ring
> *ring, bool reset) memcpy_toio(mqd, adev->gfx.me.mqd_backup[mqd_idx],
> sizeof(*mqd)); /* reset the ring */
>  		ring->wptr = 0;
> -		*ring->wptr_cpu_addr = 0;
> +		atomic64_set((atomic64_t *)ring->wptr_cpu_addr, 0);
>  		amdgpu_ring_clear_ring(ring);
>  	}