From: Steven Price <steven.price@arm.com>
To: Boris Brezillon <boris.brezillon@collabora.com>
Cc: dri-devel@lists.freedesktop.org,
"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
"Maxime Ripard" <mripard@kernel.org>,
"Thomas Zimmermann" <tzimmermann@suse.de>,
"David Airlie" <airlied@gmail.com>,
"Simona Vetter" <simona@ffwll.ch>,
"Faith Ekstrand" <faith.ekstrand@collabora.com>,
"Thierry Reding" <thierry.reding@gmail.com>,
"Mikko Perttunen" <mperttunen@nvidia.com>,
"Melissa Wen" <mwen@igalia.com>,
"Maíra Canal" <mcanal@igalia.com>,
"Lucas De Marchi" <lucas.demarchi@intel.com>,
"Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
"Rodrigo Vivi" <rodrigo.vivi@intel.com>,
"Frank Binns" <frank.binns@imgtec.com>,
"Matt Coster" <matt.coster@imgtec.com>,
"Rob Clark" <robin.clark@oss.qualcomm.com>,
"Dmitry Baryshkov" <lumag@kernel.org>,
"Abhinav Kumar" <abhinav.kumar@linux.dev>,
"Jessica Zhang" <jessica.zhang@oss.qualcomm.com>,
"Sean Paul" <sean@poorly.run>,
"Marijn Suijten" <marijn.suijten@somainline.org>,
"Alex Deucher" <alexander.deucher@amd.com>,
"Christian König" <christian.koenig@amd.com>,
amd-gfx@lists.freedesktop.org, kernel@collabora.com
Subject: Re: [PATCH v5 15/16] drm/panfrost: Add flag to map GEM object Write-Back Cacheable
Date: Fri, 14 Nov 2025 16:22:06 +0000 [thread overview]
Message-ID: <468df8dc-0dab-449f-b48a-50470403ca3b@arm.com> (raw)
In-Reply-To: <20251030140525.366636-16-boris.brezillon@collabora.com>
On 30/10/2025 14:05, Boris Brezillon wrote:
> From: Faith Ekstrand <faith.ekstrand@collabora.com>
>
> Will be used by the UMD to optimize CPU accesses to buffers
> that are frequently read by the CPU, or on which the access
> pattern makes non-cacheable mappings inefficient.
>
> Mapping buffers CPU-cached implies taking care of the CPU
> cache maintenance in the UMD, unless the GPU is IO coherent.
>
> v2:
> - Add more to the commit message
>
> v3:
> - No changes
>
> v4:
> - Fix the map_wc test in panfrost_ioctl_query_bo_info()
>
> v5:
> - Drop Steve's R-b (enough has changed to justify a new review)
>
> Signed-off-by: Faith Ekstrand <faith.ekstrand@collabora.com>
> Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Steven Price <steven.price@arm.com>
> ---
> drivers/gpu/drm/panfrost/panfrost_drv.c | 10 ++++++--
> drivers/gpu/drm/panfrost/panfrost_gem.c | 33 +++++++++++++++++++++++++
> drivers/gpu/drm/panfrost/panfrost_gem.h | 5 ++++
> include/uapi/drm/panfrost_drm.h | 5 +++-
> 4 files changed, 50 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panfrost/panfrost_drv.c
> index ba03a4420264..74b7dc75d88b 100644
> --- a/drivers/gpu/drm/panfrost/panfrost_drv.c
> +++ b/drivers/gpu/drm/panfrost/panfrost_drv.c
> @@ -125,6 +125,10 @@ static int panfrost_ioctl_get_param(struct drm_device *ddev, void *data, struct
> return 0;
> }
>
> +#define PANFROST_BO_FLAGS (PANFROST_BO_NOEXEC | \
> + PANFROST_BO_HEAP | \
> + PANFROST_BO_WB_MMAP)
> +
> static int panfrost_ioctl_create_bo(struct drm_device *dev, void *data,
> struct drm_file *file)
> {
> @@ -134,8 +138,7 @@ static int panfrost_ioctl_create_bo(struct drm_device *dev, void *data,
> struct panfrost_gem_mapping *mapping;
> int ret;
>
> - if (!args->size || args->pad ||
> - (args->flags & ~(PANFROST_BO_NOEXEC | PANFROST_BO_HEAP)))
> + if (!args->size || args->pad || (args->flags & ~PANFROST_BO_FLAGS))
> return -EINVAL;
>
> /* Heaps should never be executable */
> @@ -652,6 +655,9 @@ static int panfrost_ioctl_query_bo_info(struct drm_device *dev, void *data,
>
> if (bo->is_heap)
> args->create_flags |= PANFROST_BO_HEAP;
> +
> + if (!bo->base.map_wc)
> + args->create_flags |= PANFROST_BO_WB_MMAP;
> }
>
> drm_gem_object_put(gem_obj);
> diff --git a/drivers/gpu/drm/panfrost/panfrost_gem.c b/drivers/gpu/drm/panfrost/panfrost_gem.c
> index 05d3f8a6fa78..1c600939c17a 100644
> --- a/drivers/gpu/drm/panfrost/panfrost_gem.c
> +++ b/drivers/gpu/drm/panfrost/panfrost_gem.c
> @@ -269,6 +269,7 @@ static const struct drm_gem_object_funcs panfrost_gem_funcs = {
> .vmap = drm_gem_shmem_object_vmap,
> .vunmap = drm_gem_shmem_object_vunmap,
> .mmap = drm_gem_shmem_object_mmap,
> + .export = drm_gem_prime_export,
> .status = panfrost_gem_status,
> .rss = panfrost_gem_rss,
> .vm_ops = &drm_gem_shmem_vm_ops,
> @@ -302,12 +303,42 @@ struct drm_gem_object *panfrost_gem_create_object(struct drm_device *dev, size_t
> return &obj->base.base;
> }
>
> +static bool
> +should_map_wc(struct panfrost_gem_object *bo)
> +{
> + struct panfrost_device *pfdev = to_panfrost_device(bo->base.base.dev);
> +
> + /* We can't do uncached mappings if the device is coherent,
> + * because the zeroing done by the shmem layer at page allocation
> + * time happens on a cached mapping which isn't CPU-flushed (at least
> + * not on Arm64 where the flush is deferred to PTE setup time, and
> + * only done conditionally based on the mapping permissions). We can't
> + * rely on dma_map_sgtable()/dma_sync_sgtable_for_xxx() either to flush
> + * those, because they are NOPed if dma_dev_coherent() returns true.
> + */
> + if (pfdev->coherent)
> + return false;
> +
> + /* Cached mappings are explicitly requested, so no write-combine. */
> + if (bo->wb_mmap)
> + return false;
> +
> + /* The default is write-combine. */
> + return true;
> +}
> +
> struct panfrost_gem_object *
> panfrost_gem_create(struct drm_device *dev, size_t size, u32 flags)
> {
> struct drm_gem_shmem_object *shmem;
> struct panfrost_gem_object *bo;
>
> + /* The heap buffer is not supposed to be CPU-visible, so don't allow
> + * WB_MMAP on those.
> + */
> + if ((flags & PANFROST_BO_HEAP) && (flags & PANFROST_BO_WB_MMAP))
> + return ERR_PTR(-EINVAL);
> +
> /* Round up heap allocations to 2MB to keep fault handling simple */
> if (flags & PANFROST_BO_HEAP)
> size = roundup(size, SZ_2M);
> @@ -319,6 +350,8 @@ panfrost_gem_create(struct drm_device *dev, size_t size, u32 flags)
> bo = to_panfrost_bo(&shmem->base);
> bo->noexec = !!(flags & PANFROST_BO_NOEXEC);
> bo->is_heap = !!(flags & PANFROST_BO_HEAP);
> + bo->wb_mmap = !!(flags & PANFROST_BO_WB_MMAP);
> + bo->base.map_wc = should_map_wc(bo);
>
> return bo;
> }
> diff --git a/drivers/gpu/drm/panfrost/panfrost_gem.h b/drivers/gpu/drm/panfrost/panfrost_gem.h
> index 87b918f30baa..d2d532b3007a 100644
> --- a/drivers/gpu/drm/panfrost/panfrost_gem.h
> +++ b/drivers/gpu/drm/panfrost/panfrost_gem.h
> @@ -98,6 +98,11 @@ struct panfrost_gem_object {
> bool noexec :1;
> bool is_heap :1;
>
> + /* On coherent devices, this reflects the creation flags, not the true
> + * cacheability attribute of the mapping.
> + */
> + bool wb_mmap :1;
> +
> #ifdef CONFIG_DEBUG_FS
> struct panfrost_gem_debugfs debugfs;
> #endif
> diff --git a/include/uapi/drm/panfrost_drm.h b/include/uapi/drm/panfrost_drm.h
> index 743c79a38f1b..82f4e69bafb4 100644
> --- a/include/uapi/drm/panfrost_drm.h
> +++ b/include/uapi/drm/panfrost_drm.h
> @@ -101,9 +101,12 @@ struct drm_panfrost_wait_bo {
> __s64 timeout_ns; /* absolute */
> };
>
> -/* Valid flags to pass to drm_panfrost_create_bo */
> +/* Valid flags to pass to drm_panfrost_create_bo.
> + * PANFROST_BO_WB_MMAP can't be set if PANFROST_BO_HEAP is.
> + */
> #define PANFROST_BO_NOEXEC 1
> #define PANFROST_BO_HEAP 2
> +#define PANFROST_BO_WB_MMAP 4
>
> /**
> * struct drm_panfrost_create_bo - ioctl argument for creating Panfrost BOs.
next prev parent reply other threads:[~2025-11-14 16:22 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-30 14:05 [PATCH v5 00/16] drm/panfrost, panthor: Cached maps and explicit flushing Boris Brezillon
2025-10-30 14:05 ` [PATCH v5 01/16] drm/prime: Simplify life of drivers needing custom dma_buf_ops Boris Brezillon
2025-10-30 14:25 ` Christian König
2025-10-30 14:35 ` Boris Brezillon
2025-10-30 14:05 ` [PATCH v5 02/16] drm/shmem: Provide a generic {begin, end}_cpu_access() implementation Boris Brezillon
2025-10-30 14:31 ` [PATCH v5 02/16] drm/shmem: Provide a generic {begin,end}_cpu_access() implementation Christian König
2025-11-04 8:08 ` Boris Brezillon
2025-11-03 20:34 ` [PATCH v5 02/16] drm/shmem: Provide a generic {begin, end}_cpu_access() implementation Akash Goel
2025-11-04 7:42 ` Boris Brezillon
2025-10-30 14:05 ` [PATCH v5 03/16] drm/shmem: Add a drm_gem_shmem_sync() helper Boris Brezillon
2025-11-14 15:02 ` Steven Price
2025-10-30 14:05 ` [PATCH v5 04/16] drm/panthor: Provide a custom dma_buf implementation Boris Brezillon
2025-11-14 15:02 ` Steven Price
2025-10-30 14:05 ` [PATCH v5 05/16] drm/panthor: Fix panthor_gpu_coherency_set() Boris Brezillon
2025-10-30 14:05 ` [PATCH v5 06/16] drm/panthor: Expose the selected coherency protocol to the UMD Boris Brezillon
2025-10-30 14:05 ` [PATCH v5 07/16] drm/panthor: Add a PANTHOR_BO_SYNC ioctl Boris Brezillon
2025-10-31 7:25 ` Marcin Ślusarz
2025-11-03 20:42 ` Akash Goel
2025-11-04 7:41 ` Boris Brezillon
2025-10-30 14:05 ` [PATCH v5 08/16] drm/panthor: Add an ioctl to query BO flags Boris Brezillon
2025-10-30 14:05 ` [PATCH v5 09/16] drm/panthor: Add flag to map GEM object Write-Back Cacheable Boris Brezillon
2025-11-03 16:43 ` Akash Goel
2025-11-03 17:13 ` Boris Brezillon
2025-10-30 14:05 ` [PATCH v5 10/16] drm/panthor: Bump the driver version to 1.6 Boris Brezillon
2025-10-30 14:05 ` [PATCH v5 11/16] drm/panfrost: Provide a custom dma_buf implementation Boris Brezillon
2025-11-14 16:17 ` Steven Price
2025-10-30 14:05 ` [PATCH v5 12/16] drm/panfrost: Expose the selected coherency protocol to the UMD Boris Brezillon
2025-11-14 16:19 ` Steven Price
2025-10-30 14:05 ` [PATCH v5 13/16] drm/panfrost: Add a PANFROST_SYNC_BO ioctl Boris Brezillon
2025-10-31 7:08 ` Marcin Ślusarz
2025-10-31 8:49 ` Boris Brezillon
2025-10-30 14:05 ` [PATCH v5 14/16] drm/panfrost: Add an ioctl to query BO flags Boris Brezillon
2025-10-30 14:05 ` [PATCH v5 15/16] drm/panfrost: Add flag to map GEM object Write-Back Cacheable Boris Brezillon
2025-11-14 16:22 ` Steven Price [this message]
2025-10-30 14:05 ` [PATCH v5 16/16] drm/panfrost: Bump the driver version to 1.6 Boris Brezillon
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