Re: [PATCH 1/4] drm/amdgpu: add stride to calculate oss ring offsets

["Christian König" <ckoenig.leichtzumerken@gmail.com>]

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Am 20.03.20 um 15:20 schrieb Felix Kuehling:
> On 2020-03-20 10:06, Deucher, Alexander wrote:
>>
>> [AMD Public Use]
>>
>>
>> This seems kind of complicated and error prone.  I didn't realize the 
>> extent to the changes required.  I think it would be better to either 
>> add arcturus specific versions of these functions or just go with 
>> your original approach and add a new arcturus_ih.c.  If you go with 
>> the second route however, no need to show all your intermediate 
>> steps, just add the new files in one commit.
>
> Hi Alex,
>
>
> I suggested the approach in this patch series since to minimize code 
> duplication and maintain readability of the code. I don't think it's 
> very error prone. I believe this is more maintainable than a separate 
> arcturus_ih.c. I'll have some more specific comments on Alejandro's 
> patches.
>

Question is rather if Arcturus has really the same OSS block than Vega10 
or if the registers are just the same and at a different offset?

If the later (which I suspect) than that should really be the same file.

Regards,
Christian.

>
> Regards,
>   Felix
>
>
>>
>> Alex
>>
>> ------------------------------------------------------------------------
>> *From:* amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of 
>> Alex Sierra <alex.sierra@amd.com>
>> *Sent:* Thursday, March 19, 2020 8:22 PM
>> *To:* amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>
>> *Cc:* Sierra Guiza, Alejandro (Alex) <Alex.Sierra@amd.com>
>> *Subject:* [PATCH 1/4] drm/amdgpu: add stride to calculate oss ring 
>> offsets
>> Arcturus and vega10 share the same vega10_ih, however both
>> have different register offsets at the ih ring section.
>> This variable is used to help calculate ih ring register addresses
>> from the osssys, that corresponds to the current asic type.
>>
>> Signed-off-by: Alex Sierra <alex.sierra@amd.com>
>> ---
>>  drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 4 ++++
>>  drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h | 1 +
>>  2 files changed, 5 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c 
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
>> index 5ed4227f304b..fa384ae9a9bc 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
>> @@ -279,6 +279,10 @@ int amdgpu_irq_init(struct amdgpu_device *adev)
>> amdgpu_hotplug_work_func);
>>          }
>>
>> +       if (adev->asic_type == CHIP_ARCTURUS)
>> +               adev->irq.ring_stride = 1;
>> +       else
>> +               adev->irq.ring_stride = 0;
>>          INIT_WORK(&adev->irq.ih1_work, amdgpu_irq_handle_ih1);
>>          INIT_WORK(&adev->irq.ih2_work, amdgpu_irq_handle_ih2);
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h 
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h
>> index c718e94a55c9..1ec5b735cd9e 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h
>> @@ -97,6 +97,7 @@ struct amdgpu_irq {
>>          struct irq_domain               *domain; /* GPU irq 
>> controller domain */
>>          unsigned virq[AMDGPU_MAX_IRQ_SRC_ID];
>>          uint32_t srbm_soft_reset;
>> +       unsigned                        ring_stride;
>>  };
>>
>>  void amdgpu_irq_disable_all(struct amdgpu_device *adev);
>> -- 
>> 2.17.1
>>
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