* [PATCH 1/6] drm/amd/display: Defer transitions from minimal state to final state
2025-12-02 10:21 [PATCH 0/6] DC Patches Dec 08 2025 Chenyu Chen
@ 2025-12-02 10:21 ` Chenyu Chen
2025-12-02 10:21 ` [PATCH 2/6] drm/amd/display: Remove periodic detection callbacks from dcn35+ Chenyu Chen
` (5 subsequent siblings)
6 siblings, 0 replies; 11+ messages in thread
From: Chenyu Chen @ 2025-12-02 10:21 UTC (permalink / raw)
To: amd-gfx
Cc: Harry Wentland, Leo Li, Aurabindo Pillai, Roman Li, Wayne Lin,
Tom Chung, Fangzhi Zuo, Dan Wheeler, Ray Wu, Ivan Lipski,
Alex Hung, Joshua Aberback, Aric Cyr, Chenyu Chen
From: Joshua Aberback <joshua.aberback@amd.com>
[Why]
In non-seamless pipe transitions, it can take several frames to process
a single flip. One of the reasons is the 2-step transition implementation
where first the minimal transition state is applied, then the final state
is applied, all within the same flip. This delay is noticeable to the user
in some video playback scenarios, which makes for a bad user experience.
[How]
- in applicable non-seamless cases, complete the flip with the minimal
state applied, start a counter, and create all new contexts as minimal
- if another pipe transition occurs while counting, reset the counter
- when the counter finishes, promote the current flip to a full update
and restore creation of optimized contexts
- when creating minimal states from new context, apply stream updates
Reviewed-by: Aric Cyr <aric.cyr@amd.com>
Signed-off-by: Joshua Aberback <joshua.aberback@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 200 +++++++++++++++--------
drivers/gpu/drm/amd/display/dc/dc.h | 7 +
2 files changed, 137 insertions(+), 70 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 1e7c61b975e3..e0db791953a5 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -2963,6 +2963,11 @@ static struct surface_update_descriptor check_update_surfaces_for_stream(
{
struct surface_update_descriptor overall_type = { UPDATE_TYPE_FAST, LOCK_DESCRIPTOR_NONE };
+ /* When countdown finishes, promote this flip to full to trigger deferred final transition */
+ if (check_config->deferred_transition_state && !check_config->transition_countdown_to_steady_state) {
+ elevate_update_type(&overall_type, UPDATE_TYPE_FULL, LOCK_DESCRIPTOR_GLOBAL);
+ }
+
if (stream_update && stream_update->pending_test_pattern) {
elevate_update_type(&overall_type, UPDATE_TYPE_FULL, LOCK_DESCRIPTOR_GLOBAL);
}
@@ -3441,6 +3446,49 @@ static bool full_update_required_weak(
const struct dc_stream_update *stream_update,
const struct dc_stream_state *stream);
+struct pipe_split_policy_backup {
+ bool dynamic_odm_policy;
+ bool subvp_policy;
+ enum pipe_split_policy mpc_policy;
+ char force_odm[MAX_PIPES];
+};
+
+static void backup_and_set_minimal_pipe_split_policy(struct dc *dc,
+ struct dc_state *context,
+ struct pipe_split_policy_backup *policy)
+{
+ int i;
+
+ if (!dc->config.is_vmin_only_asic) {
+ policy->mpc_policy = dc->debug.pipe_split_policy;
+ dc->debug.pipe_split_policy = MPC_SPLIT_AVOID;
+ }
+ policy->dynamic_odm_policy = dc->debug.enable_single_display_2to1_odm_policy;
+ dc->debug.enable_single_display_2to1_odm_policy = false;
+ policy->subvp_policy = dc->debug.force_disable_subvp;
+ dc->debug.force_disable_subvp = true;
+ for (i = 0; i < context->stream_count; i++) {
+ policy->force_odm[i] = context->streams[i]->debug.force_odm_combine_segments;
+ if (context->streams[i]->debug.allow_transition_for_forced_odm)
+ context->streams[i]->debug.force_odm_combine_segments = 0;
+ }
+}
+
+static void restore_minimal_pipe_split_policy(struct dc *dc,
+ struct dc_state *context,
+ struct pipe_split_policy_backup *policy)
+{
+ uint8_t i;
+
+ if (!dc->config.is_vmin_only_asic)
+ dc->debug.pipe_split_policy = policy->mpc_policy;
+ dc->debug.enable_single_display_2to1_odm_policy =
+ policy->dynamic_odm_policy;
+ dc->debug.force_disable_subvp = policy->subvp_policy;
+ for (i = 0; i < context->stream_count; i++)
+ context->streams[i]->debug.force_odm_combine_segments = policy->force_odm[i];
+}
+
/**
* update_planes_and_stream_state() - The function takes planes and stream
* updates as inputs and determines the appropriate update type. If update type
@@ -3591,10 +3639,30 @@ static bool update_planes_and_stream_state(struct dc *dc,
}
if (update_type == UPDATE_TYPE_FULL) {
+ struct pipe_split_policy_backup policy;
+ bool minimize = false;
+
+ if (dc->check_config.deferred_transition_state) {
+ if (dc->check_config.transition_countdown_to_steady_state) {
+ /* During countdown, all new contexts created as minimal transition states */
+ minimize = true;
+ } else {
+ dc->check_config.deferred_transition_state = false;
+ }
+ }
+
+ if (minimize)
+ backup_and_set_minimal_pipe_split_policy(dc, context, &policy);
+
if (dc->res_pool->funcs->validate_bandwidth(dc, context, DC_VALIDATE_MODE_AND_PROGRAMMING) != DC_OK) {
+ if (minimize)
+ restore_minimal_pipe_split_policy(dc, context, &policy);
BREAK_TO_DEBUGGER();
goto fail;
}
+
+ if (minimize)
+ restore_minimal_pipe_split_policy(dc, context, &policy);
}
update_seamless_boot_flags(dc, context, surface_count, stream);
@@ -4622,48 +4690,6 @@ static bool could_mpcc_tree_change_for_active_pipes(struct dc *dc,
return force_minimal_pipe_splitting;
}
-struct pipe_split_policy_backup {
- bool dynamic_odm_policy;
- bool subvp_policy;
- enum pipe_split_policy mpc_policy;
- char force_odm[MAX_PIPES];
-};
-
-static void backup_and_set_minimal_pipe_split_policy(struct dc *dc,
- struct dc_state *context,
- struct pipe_split_policy_backup *policy)
-{
- int i;
-
- if (!dc->config.is_vmin_only_asic) {
- policy->mpc_policy = dc->debug.pipe_split_policy;
- dc->debug.pipe_split_policy = MPC_SPLIT_AVOID;
- }
- policy->dynamic_odm_policy = dc->debug.enable_single_display_2to1_odm_policy;
- dc->debug.enable_single_display_2to1_odm_policy = false;
- policy->subvp_policy = dc->debug.force_disable_subvp;
- dc->debug.force_disable_subvp = true;
- for (i = 0; i < context->stream_count; i++) {
- policy->force_odm[i] = context->streams[i]->debug.force_odm_combine_segments;
- if (context->streams[i]->debug.allow_transition_for_forced_odm)
- context->streams[i]->debug.force_odm_combine_segments = 0;
- }
-}
-
-static void restore_minimal_pipe_split_policy(struct dc *dc,
- struct dc_state *context,
- struct pipe_split_policy_backup *policy)
-{
- uint8_t i;
-
- if (!dc->config.is_vmin_only_asic)
- dc->debug.pipe_split_policy = policy->mpc_policy;
- dc->debug.enable_single_display_2to1_odm_policy =
- policy->dynamic_odm_policy;
- dc->debug.force_disable_subvp = policy->subvp_policy;
- for (i = 0; i < context->stream_count; i++)
- context->streams[i]->debug.force_odm_combine_segments = policy->force_odm[i];
-}
static void release_minimal_transition_state(struct dc *dc,
struct dc_state *minimal_transition_context,
@@ -4773,6 +4799,7 @@ static int initialize_empty_surface_updates(
static bool commit_minimal_transition_based_on_new_context(struct dc *dc,
struct dc_state *new_context,
struct dc_stream_state *stream,
+ struct dc_stream_update *stream_update,
struct dc_surface_update *srf_updates,
int surface_count)
{
@@ -4790,7 +4817,7 @@ static bool commit_minimal_transition_based_on_new_context(struct dc *dc,
new_context)) {
DC_LOG_DC("commit minimal transition state: base = new state\n");
commit_planes_for_stream(dc, srf_updates,
- surface_count, stream, NULL,
+ surface_count, stream, stream_update,
UPDATE_TYPE_FULL, intermediate_context);
swap_and_release_current_context(
dc, intermediate_context, stream);
@@ -4884,8 +4911,8 @@ static bool commit_minimal_transition_state_in_dc_update(struct dc *dc,
int surface_count)
{
bool success = commit_minimal_transition_based_on_new_context(
- dc, new_context, stream, srf_updates,
- surface_count);
+ dc, new_context, stream, NULL,
+ srf_updates, surface_count);
if (!success)
success = commit_minimal_transition_based_on_current_context(dc,
new_context, stream);
@@ -5294,32 +5321,63 @@ static void commit_planes_and_stream_update_with_new_context(struct dc *dc,
enum surface_update_type update_type,
struct dc_state *new_context)
{
+ bool skip_new_context = false;
ASSERT(update_type >= UPDATE_TYPE_FULL);
- if (!dc->hwss.is_pipe_topology_transition_seamless(dc,
- dc->current_state, new_context))
- /*
- * It is required by the feature design that all pipe topologies
- * using extra free pipes for power saving purposes such as
- * dynamic ODM or SubVp shall only be enabled when it can be
- * transitioned seamlessly to AND from its minimal transition
- * state. A minimal transition state is defined as the same dc
- * state but with all power saving features disabled. So it uses
- * the minimum pipe topology. When we can't seamlessly
- * transition from state A to state B, we will insert the
- * minimal transition state A' or B' in between so seamless
- * transition between A and B can be made possible.
- */
- commit_minimal_transition_state_in_dc_update(dc, new_context,
- stream, srf_updates, surface_count);
+ /*
+ * It is required by the feature design that all pipe topologies
+ * using extra free pipes for power saving purposes such as
+ * dynamic ODM or SubVp shall only be enabled when it can be
+ * transitioned seamlessly to AND from its minimal transition
+ * state. A minimal transition state is defined as the same dc
+ * state but with all power saving features disabled. So it uses
+ * the minimum pipe topology. When we can't seamlessly
+ * transition from state A to state B, we will insert the
+ * minimal transition state A' or B' in between so seamless
+ * transition between A and B can be made possible.
+ *
+ * To optimize for the time it takes to execute flips,
+ * the transition from the minimal state to the final state is
+ * deferred until a steady state (no more transitions) is reached.
+ */
+ if (!dc->hwss.is_pipe_topology_transition_seamless(dc, dc->current_state, new_context)) {
+ if (!dc->debug.disable_deferred_minimal_transitions) {
+ dc->check_config.deferred_transition_state = true;
+ dc->check_config.transition_countdown_to_steady_state =
+ dc->debug.num_fast_flips_to_steady_state_override ?
+ dc->debug.num_fast_flips_to_steady_state_override :
+ NUM_FAST_FLIPS_TO_STEADY_STATE;
+
+ if (commit_minimal_transition_based_on_new_context(dc, new_context, stream, stream_update,
+ srf_updates, surface_count)) {
+ skip_new_context = true;
+ dc_state_release(new_context);
+ new_context = dc->current_state;
+ } else {
+ /*
+ * In this case a new mpo plane is being enabled on pipes that were
+ * previously in use, and the surface update to the existing plane
+ * includes an alpha box where the new plane will be, so the update
+ * from minimal to final cannot be deferred as the alpha box would
+ * be visible to the user
+ */
+ commit_minimal_transition_based_on_current_context(dc, new_context, stream);
+ }
+ } else {
+ commit_minimal_transition_state_in_dc_update(dc, new_context, stream,
+ srf_updates, surface_count);
+ }
+ } else if (dc->check_config.deferred_transition_state) {
+ /* reset countdown as steady state not reached */
+ dc->check_config.transition_countdown_to_steady_state =
+ dc->debug.num_fast_flips_to_steady_state_override ?
+ dc->debug.num_fast_flips_to_steady_state_override :
+ NUM_FAST_FLIPS_TO_STEADY_STATE;
+ }
- commit_planes_for_stream(
- dc,
- srf_updates,
- surface_count,
- stream,
- stream_update,
- update_type,
- new_context);
+ if (!skip_new_context) {
+ commit_planes_for_stream(dc, srf_updates, surface_count, stream, stream_update, update_type, new_context);
+ swap_and_release_current_context(dc, new_context, stream);
+ }
}
static bool update_planes_and_stream_v3(struct dc *dc,
@@ -5349,11 +5407,13 @@ static bool update_planes_and_stream_v3(struct dc *dc,
commit_planes_and_stream_update_on_current_context(dc,
srf_updates, surface_count, stream,
stream_update, update_type);
+
+ if (dc->check_config.transition_countdown_to_steady_state)
+ dc->check_config.transition_countdown_to_steady_state--;
} else {
commit_planes_and_stream_update_with_new_context(dc,
srf_updates, surface_count, stream,
stream_update, update_type, new_context);
- swap_and_release_current_context(dc, new_context, stream);
}
return true;
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index 167cfb1b01dd..d926bf54185b 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -82,6 +82,8 @@ struct dcn_dccg_reg_state;
#define MAX_DPIA_PER_HOST_ROUTER 3
#define MAX_DPIA_NUM (MAX_HOST_ROUTERS_NUM * MAX_DPIA_PER_HOST_ROUTER)
+#define NUM_FAST_FLIPS_TO_STEADY_STATE 20
+
/* Display Core Interfaces */
struct dc_versions {
const char *dc_ver;
@@ -293,6 +295,9 @@ struct dc_check_config {
*/
unsigned int max_optimizable_video_width;
bool enable_legacy_fast_update;
+
+ bool deferred_transition_state;
+ unsigned int transition_countdown_to_steady_state;
};
struct dc_caps {
@@ -1201,6 +1206,8 @@ struct dc_debug_options {
bool disable_stutter_for_wm_program;
bool enable_block_sequence_programming;
uint32_t custom_psp_footer_size;
+ bool disable_deferred_minimal_transitions;
+ unsigned int num_fast_flips_to_steady_state_override;
};
--
2.43.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 2/6] drm/amd/display: Remove periodic detection callbacks from dcn35+
2025-12-02 10:21 [PATCH 0/6] DC Patches Dec 08 2025 Chenyu Chen
2025-12-02 10:21 ` [PATCH 1/6] drm/amd/display: Defer transitions from minimal state to final state Chenyu Chen
@ 2025-12-02 10:21 ` Chenyu Chen
2025-12-02 10:21 ` [PATCH 3/6] drm/amd/display: Fixes for S0i3 exit Chenyu Chen
` (4 subsequent siblings)
6 siblings, 0 replies; 11+ messages in thread
From: Chenyu Chen @ 2025-12-02 10:21 UTC (permalink / raw)
To: amd-gfx
Cc: Harry Wentland, Leo Li, Aurabindo Pillai, Roman Li, Wayne Lin,
Tom Chung, Fangzhi Zuo, Dan Wheeler, Ray Wu, Ivan Lipski,
Alex Hung, Dillon Varone, Nicholas Kazlauskas, Chenyu Chen
From: Dillon Varone <Dillon.Varone@amd.com>
[WHY&HOW]
These will not be needed going forward as DMU will communicate to the
driver when detection may be needed after a power saving event.
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Dillon Varone <Dillon.Varone@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
---
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c
index dfd0c9505af0..72558cc55a9a 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c
@@ -405,7 +405,6 @@ void dcn35_update_clocks(struct clk_mgr *clk_mgr_base,
if (new_clocks->zstate_support != DCN_ZSTATE_SUPPORT_DISALLOW &&
new_clocks->zstate_support != clk_mgr_base->clks.zstate_support) {
dcn35_smu_set_zstate_support(clk_mgr, new_clocks->zstate_support);
- dm_helpers_enable_periodic_detection(clk_mgr_base->ctx, true);
clk_mgr_base->clks.zstate_support = new_clocks->zstate_support;
}
@@ -425,7 +424,6 @@ void dcn35_update_clocks(struct clk_mgr *clk_mgr_base,
if (new_clocks->zstate_support == DCN_ZSTATE_SUPPORT_DISALLOW &&
new_clocks->zstate_support != clk_mgr_base->clks.zstate_support) {
dcn35_smu_set_zstate_support(clk_mgr, DCN_ZSTATE_SUPPORT_DISALLOW);
- dm_helpers_enable_periodic_detection(clk_mgr_base->ctx, false);
clk_mgr_base->clks.zstate_support = new_clocks->zstate_support;
}
--
2.43.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 3/6] drm/amd/display: Fixes for S0i3 exit
2025-12-02 10:21 [PATCH 0/6] DC Patches Dec 08 2025 Chenyu Chen
2025-12-02 10:21 ` [PATCH 1/6] drm/amd/display: Defer transitions from minimal state to final state Chenyu Chen
2025-12-02 10:21 ` [PATCH 2/6] drm/amd/display: Remove periodic detection callbacks from dcn35+ Chenyu Chen
@ 2025-12-02 10:21 ` Chenyu Chen
2025-12-02 10:21 ` [PATCH 4/6] drm/amd/display: Refactor dml_core_mode_support to reduce stack frame Chenyu Chen
` (3 subsequent siblings)
6 siblings, 0 replies; 11+ messages in thread
From: Chenyu Chen @ 2025-12-02 10:21 UTC (permalink / raw)
To: amd-gfx
Cc: Harry Wentland, Leo Li, Aurabindo Pillai, Roman Li, Wayne Lin,
Tom Chung, Fangzhi Zuo, Dan Wheeler, Ray Wu, Ivan Lipski,
Alex Hung, Ovidiu Bunea, Charlene Liu, Chenyu Chen
From: Ovidiu Bunea <ovidiu.bunea@amd.com>
[why & how]
Add debug flag "ignore_pg" to dcn32 PG functions.
Update default z10 support status.
Temp disable RFB features for ASIC.
Remove legacy code path.
Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Signed-off-by: Ovidiu Bunea <ovidiu.bunea@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
---
.../drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c | 1 -
drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c | 6 ++++++
2 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c b/drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c
index 319eb1061ba8..20bf04dac609 100644
--- a/drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c
@@ -120,7 +120,6 @@ void dcn35_link_encoder_setup(
void dcn35_link_encoder_init(struct link_encoder *enc)
{
enc31_hw_init(enc);
- dcn35_link_encoder_set_fgcg(enc, enc->ctx->dc->debug.enable_fine_grain_clock_gating.bits.dio);
}
void dcn35_link_encoder_set_fgcg(struct link_encoder *enc, bool enable)
diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
index b213a2ac827a..3cd44c6602b3 100644
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
@@ -82,6 +82,9 @@ void dcn32_dsc_pg_control(
if (!dc->debug.enable_double_buffered_dsc_pg_support)
return;
+ if (dc->debug.ignore_pg)
+ return;
+
REG_GET(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, &org_ip_request_cntl);
if (org_ip_request_cntl == 0)
REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 1);
@@ -168,6 +171,9 @@ void dcn32_hubp_pg_control(struct dce_hwseq *hws, unsigned int hubp_inst, bool p
if (hws->ctx->dc->debug.disable_hubp_power_gate)
return;
+ if (hws->ctx->dc->debug.ignore_pg)
+ return;
+
if (REG(DOMAIN0_PG_CONFIG) == 0)
return;
--
2.43.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 4/6] drm/amd/display: Refactor dml_core_mode_support to reduce stack frame
2025-12-02 10:21 [PATCH 0/6] DC Patches Dec 08 2025 Chenyu Chen
` (2 preceding siblings ...)
2025-12-02 10:21 ` [PATCH 3/6] drm/amd/display: Fixes for S0i3 exit Chenyu Chen
@ 2025-12-02 10:21 ` Chenyu Chen
2025-12-02 16:29 ` Alex Hung
2025-12-02 10:21 ` [PATCH 5/6] drm/amd/display: Additional info from DML for DMU Chenyu Chen
` (2 subsequent siblings)
6 siblings, 1 reply; 11+ messages in thread
From: Chenyu Chen @ 2025-12-02 10:21 UTC (permalink / raw)
To: amd-gfx
Cc: Harry Wentland, Leo Li, Aurabindo Pillai, Roman Li, Wayne Lin,
Tom Chung, Fangzhi Zuo, Dan Wheeler, Ray Wu, Ivan Lipski,
Alex Hung, Austin Zheng, Chenyu Chen
From: Alex Hung <alex.hung@amd.com>
[WHAT]
When compiling Linux kernel with clang, the following warning / error
messages pops up:
drivers/gpu/drm/amd/amdgpu/../dal-dev/dc/dml2_0/display_mode_core.c:6853:12:
error: stack frame size (2120) exceeds limit (2056) in
'dml_core_mode_support' [-Werror,-Wframe-larger-than]
6853 | dml_bool_t dml_core_mode_support(struct display_mode_lib_st
*mode_lib)
[HOW]
Refactoring CalculateVMRowAndSwath_params assignments to a new function
helps reduce the stack frame size in dml_core_mode_support.
Reviewed-by: Austin Zheng <austin.zheng@amd.com>
Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
---
.../amd/display/dc/dml2_0/display_mode_core.c | 134 ++++++++++--------
1 file changed, 71 insertions(+), 63 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c b/drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c
index c468f492b876..09303c282495 100644
--- a/drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c
+++ b/drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c
@@ -6711,6 +6711,76 @@ static noinline_for_stack void dml_prefetch_check(struct display_mode_lib_st *mo
} // for j
}
+static noinline_for_stack void set_vm_row_and_swath_parameters(struct display_mode_lib_st *mode_lib)
+{
+ struct CalculateVMRowAndSwath_params_st *CalculateVMRowAndSwath_params = &mode_lib->scratch.CalculateVMRowAndSwath_params;
+ struct dml_core_mode_support_locals_st *s = &mode_lib->scratch.dml_core_mode_support_locals;
+
+ CalculateVMRowAndSwath_params->NumberOfActiveSurfaces = mode_lib->ms.num_active_planes;
+ CalculateVMRowAndSwath_params->myPipe = s->SurfParameters;
+ CalculateVMRowAndSwath_params->SurfaceSizeInMALL = mode_lib->ms.SurfaceSizeInMALL;
+ CalculateVMRowAndSwath_params->PTEBufferSizeInRequestsLuma = mode_lib->ms.ip.dpte_buffer_size_in_pte_reqs_luma;
+ CalculateVMRowAndSwath_params->PTEBufferSizeInRequestsChroma = mode_lib->ms.ip.dpte_buffer_size_in_pte_reqs_chroma;
+ CalculateVMRowAndSwath_params->DCCMetaBufferSizeBytes = mode_lib->ms.ip.dcc_meta_buffer_size_bytes;
+ CalculateVMRowAndSwath_params->UseMALLForStaticScreen = mode_lib->ms.cache_display_cfg.plane.UseMALLForStaticScreen;
+ CalculateVMRowAndSwath_params->UseMALLForPStateChange = mode_lib->ms.cache_display_cfg.plane.UseMALLForPStateChange;
+ CalculateVMRowAndSwath_params->MALLAllocatedForDCN = mode_lib->ms.soc.mall_allocated_for_dcn_mbytes;
+ CalculateVMRowAndSwath_params->SwathWidthY = mode_lib->ms.SwathWidthYThisState;
+ CalculateVMRowAndSwath_params->SwathWidthC = mode_lib->ms.SwathWidthCThisState;
+ CalculateVMRowAndSwath_params->GPUVMEnable = mode_lib->ms.cache_display_cfg.plane.GPUVMEnable;
+ CalculateVMRowAndSwath_params->HostVMEnable = mode_lib->ms.cache_display_cfg.plane.HostVMEnable;
+ CalculateVMRowAndSwath_params->HostVMMaxNonCachedPageTableLevels = mode_lib->ms.cache_display_cfg.plane.HostVMMaxPageTableLevels;
+ CalculateVMRowAndSwath_params->GPUVMMaxPageTableLevels = mode_lib->ms.cache_display_cfg.plane.GPUVMMaxPageTableLevels;
+ CalculateVMRowAndSwath_params->GPUVMMinPageSizeKBytes = mode_lib->ms.cache_display_cfg.plane.GPUVMMinPageSizeKBytes;
+ CalculateVMRowAndSwath_params->HostVMMinPageSize = mode_lib->ms.soc.hostvm_min_page_size_kbytes * 1024;
+ CalculateVMRowAndSwath_params->PTEBufferModeOverrideEn = mode_lib->ms.cache_display_cfg.plane.PTEBufferModeOverrideEn;
+ CalculateVMRowAndSwath_params->PTEBufferModeOverrideVal = mode_lib->ms.cache_display_cfg.plane.PTEBufferMode;
+ CalculateVMRowAndSwath_params->PTEBufferSizeNotExceeded = mode_lib->ms.PTEBufferSizeNotExceededPerState;
+ CalculateVMRowAndSwath_params->DCCMetaBufferSizeNotExceeded = mode_lib->ms.DCCMetaBufferSizeNotExceededPerState;
+ CalculateVMRowAndSwath_params->dpte_row_width_luma_ub = s->dummy_integer_array[0];
+ CalculateVMRowAndSwath_params->dpte_row_width_chroma_ub = s->dummy_integer_array[1];
+ CalculateVMRowAndSwath_params->dpte_row_height_luma = mode_lib->ms.dpte_row_height;
+ CalculateVMRowAndSwath_params->dpte_row_height_chroma = mode_lib->ms.dpte_row_height_chroma;
+ CalculateVMRowAndSwath_params->dpte_row_height_linear_luma = s->dummy_integer_array[2]; // VBA_DELTA
+ CalculateVMRowAndSwath_params->dpte_row_height_linear_chroma = s->dummy_integer_array[3]; // VBA_DELTA
+ CalculateVMRowAndSwath_params->meta_req_width = s->dummy_integer_array[4];
+ CalculateVMRowAndSwath_params->meta_req_width_chroma = s->dummy_integer_array[5];
+ CalculateVMRowAndSwath_params->meta_req_height = s->dummy_integer_array[6];
+ CalculateVMRowAndSwath_params->meta_req_height_chroma = s->dummy_integer_array[7];
+ CalculateVMRowAndSwath_params->meta_row_width = s->dummy_integer_array[8];
+ CalculateVMRowAndSwath_params->meta_row_width_chroma = s->dummy_integer_array[9];
+ CalculateVMRowAndSwath_params->meta_row_height = mode_lib->ms.meta_row_height;
+ CalculateVMRowAndSwath_params->meta_row_height_chroma = mode_lib->ms.meta_row_height_chroma;
+ CalculateVMRowAndSwath_params->vm_group_bytes = s->dummy_integer_array[10];
+ CalculateVMRowAndSwath_params->dpte_group_bytes = mode_lib->ms.dpte_group_bytes;
+ CalculateVMRowAndSwath_params->PixelPTEReqWidthY = s->dummy_integer_array[11];
+ CalculateVMRowAndSwath_params->PixelPTEReqHeightY = s->dummy_integer_array[12];
+ CalculateVMRowAndSwath_params->PTERequestSizeY = s->dummy_integer_array[13];
+ CalculateVMRowAndSwath_params->PixelPTEReqWidthC = s->dummy_integer_array[14];
+ CalculateVMRowAndSwath_params->PixelPTEReqHeightC = s->dummy_integer_array[15];
+ CalculateVMRowAndSwath_params->PTERequestSizeC = s->dummy_integer_array[16];
+ CalculateVMRowAndSwath_params->dpde0_bytes_per_frame_ub_l = s->dummy_integer_array[17];
+ CalculateVMRowAndSwath_params->meta_pte_bytes_per_frame_ub_l = s->dummy_integer_array[18];
+ CalculateVMRowAndSwath_params->dpde0_bytes_per_frame_ub_c = s->dummy_integer_array[19];
+ CalculateVMRowAndSwath_params->meta_pte_bytes_per_frame_ub_c = s->dummy_integer_array[20];
+ CalculateVMRowAndSwath_params->PrefetchSourceLinesY = mode_lib->ms.PrefetchLinesYThisState;
+ CalculateVMRowAndSwath_params->PrefetchSourceLinesC = mode_lib->ms.PrefetchLinesCThisState;
+ CalculateVMRowAndSwath_params->VInitPreFillY = mode_lib->ms.PrefillY;
+ CalculateVMRowAndSwath_params->VInitPreFillC = mode_lib->ms.PrefillC;
+ CalculateVMRowAndSwath_params->MaxNumSwathY = mode_lib->ms.MaxNumSwY;
+ CalculateVMRowAndSwath_params->MaxNumSwathC = mode_lib->ms.MaxNumSwC;
+ CalculateVMRowAndSwath_params->meta_row_bw = mode_lib->ms.meta_row_bandwidth_this_state;
+ CalculateVMRowAndSwath_params->dpte_row_bw = mode_lib->ms.dpte_row_bandwidth_this_state;
+ CalculateVMRowAndSwath_params->PixelPTEBytesPerRow = mode_lib->ms.DPTEBytesPerRowThisState;
+ CalculateVMRowAndSwath_params->PDEAndMetaPTEBytesFrame = mode_lib->ms.PDEAndMetaPTEBytesPerFrameThisState;
+ CalculateVMRowAndSwath_params->MetaRowByte = mode_lib->ms.MetaRowBytesThisState;
+ CalculateVMRowAndSwath_params->use_one_row_for_frame = mode_lib->ms.use_one_row_for_frame_this_state;
+ CalculateVMRowAndSwath_params->use_one_row_for_frame_flip = mode_lib->ms.use_one_row_for_frame_flip_this_state;
+ CalculateVMRowAndSwath_params->UsesMALLForStaticScreen = s->dummy_boolean_array[0];
+ CalculateVMRowAndSwath_params->PTE_BUFFER_MODE = s->dummy_boolean_array[1];
+ CalculateVMRowAndSwath_params->BIGK_FRAGMENT_SIZE = s->dummy_integer_array[21];
+}
+
/// @brief The Mode Support function.
dml_bool_t dml_core_mode_support(struct display_mode_lib_st *mode_lib)
{
@@ -7683,69 +7753,7 @@ dml_bool_t dml_core_mode_support(struct display_mode_lib_st *mode_lib)
s->SurfParameters[k].SwathHeightC = mode_lib->ms.SwathHeightCThisState[k];
}
- CalculateVMRowAndSwath_params->NumberOfActiveSurfaces = mode_lib->ms.num_active_planes;
- CalculateVMRowAndSwath_params->myPipe = s->SurfParameters;
- CalculateVMRowAndSwath_params->SurfaceSizeInMALL = mode_lib->ms.SurfaceSizeInMALL;
- CalculateVMRowAndSwath_params->PTEBufferSizeInRequestsLuma = mode_lib->ms.ip.dpte_buffer_size_in_pte_reqs_luma;
- CalculateVMRowAndSwath_params->PTEBufferSizeInRequestsChroma = mode_lib->ms.ip.dpte_buffer_size_in_pte_reqs_chroma;
- CalculateVMRowAndSwath_params->DCCMetaBufferSizeBytes = mode_lib->ms.ip.dcc_meta_buffer_size_bytes;
- CalculateVMRowAndSwath_params->UseMALLForStaticScreen = mode_lib->ms.cache_display_cfg.plane.UseMALLForStaticScreen;
- CalculateVMRowAndSwath_params->UseMALLForPStateChange = mode_lib->ms.cache_display_cfg.plane.UseMALLForPStateChange;
- CalculateVMRowAndSwath_params->MALLAllocatedForDCN = mode_lib->ms.soc.mall_allocated_for_dcn_mbytes;
- CalculateVMRowAndSwath_params->SwathWidthY = mode_lib->ms.SwathWidthYThisState;
- CalculateVMRowAndSwath_params->SwathWidthC = mode_lib->ms.SwathWidthCThisState;
- CalculateVMRowAndSwath_params->GPUVMEnable = mode_lib->ms.cache_display_cfg.plane.GPUVMEnable;
- CalculateVMRowAndSwath_params->HostVMEnable = mode_lib->ms.cache_display_cfg.plane.HostVMEnable;
- CalculateVMRowAndSwath_params->HostVMMaxNonCachedPageTableLevels = mode_lib->ms.cache_display_cfg.plane.HostVMMaxPageTableLevels;
- CalculateVMRowAndSwath_params->GPUVMMaxPageTableLevels = mode_lib->ms.cache_display_cfg.plane.GPUVMMaxPageTableLevels;
- CalculateVMRowAndSwath_params->GPUVMMinPageSizeKBytes = mode_lib->ms.cache_display_cfg.plane.GPUVMMinPageSizeKBytes;
- CalculateVMRowAndSwath_params->HostVMMinPageSize = mode_lib->ms.soc.hostvm_min_page_size_kbytes * 1024;
- CalculateVMRowAndSwath_params->PTEBufferModeOverrideEn = mode_lib->ms.cache_display_cfg.plane.PTEBufferModeOverrideEn;
- CalculateVMRowAndSwath_params->PTEBufferModeOverrideVal = mode_lib->ms.cache_display_cfg.plane.PTEBufferMode;
- CalculateVMRowAndSwath_params->PTEBufferSizeNotExceeded = mode_lib->ms.PTEBufferSizeNotExceededPerState;
- CalculateVMRowAndSwath_params->DCCMetaBufferSizeNotExceeded = mode_lib->ms.DCCMetaBufferSizeNotExceededPerState;
- CalculateVMRowAndSwath_params->dpte_row_width_luma_ub = s->dummy_integer_array[0];
- CalculateVMRowAndSwath_params->dpte_row_width_chroma_ub = s->dummy_integer_array[1];
- CalculateVMRowAndSwath_params->dpte_row_height_luma = mode_lib->ms.dpte_row_height;
- CalculateVMRowAndSwath_params->dpte_row_height_chroma = mode_lib->ms.dpte_row_height_chroma;
- CalculateVMRowAndSwath_params->dpte_row_height_linear_luma = s->dummy_integer_array[2]; // VBA_DELTA
- CalculateVMRowAndSwath_params->dpte_row_height_linear_chroma = s->dummy_integer_array[3]; // VBA_DELTA
- CalculateVMRowAndSwath_params->meta_req_width = s->dummy_integer_array[4];
- CalculateVMRowAndSwath_params->meta_req_width_chroma = s->dummy_integer_array[5];
- CalculateVMRowAndSwath_params->meta_req_height = s->dummy_integer_array[6];
- CalculateVMRowAndSwath_params->meta_req_height_chroma = s->dummy_integer_array[7];
- CalculateVMRowAndSwath_params->meta_row_width = s->dummy_integer_array[8];
- CalculateVMRowAndSwath_params->meta_row_width_chroma = s->dummy_integer_array[9];
- CalculateVMRowAndSwath_params->meta_row_height = mode_lib->ms.meta_row_height;
- CalculateVMRowAndSwath_params->meta_row_height_chroma = mode_lib->ms.meta_row_height_chroma;
- CalculateVMRowAndSwath_params->vm_group_bytes = s->dummy_integer_array[10];
- CalculateVMRowAndSwath_params->dpte_group_bytes = mode_lib->ms.dpte_group_bytes;
- CalculateVMRowAndSwath_params->PixelPTEReqWidthY = s->dummy_integer_array[11];
- CalculateVMRowAndSwath_params->PixelPTEReqHeightY = s->dummy_integer_array[12];
- CalculateVMRowAndSwath_params->PTERequestSizeY = s->dummy_integer_array[13];
- CalculateVMRowAndSwath_params->PixelPTEReqWidthC = s->dummy_integer_array[14];
- CalculateVMRowAndSwath_params->PixelPTEReqHeightC = s->dummy_integer_array[15];
- CalculateVMRowAndSwath_params->PTERequestSizeC = s->dummy_integer_array[16];
- CalculateVMRowAndSwath_params->dpde0_bytes_per_frame_ub_l = s->dummy_integer_array[17];
- CalculateVMRowAndSwath_params->meta_pte_bytes_per_frame_ub_l = s->dummy_integer_array[18];
- CalculateVMRowAndSwath_params->dpde0_bytes_per_frame_ub_c = s->dummy_integer_array[19];
- CalculateVMRowAndSwath_params->meta_pte_bytes_per_frame_ub_c = s->dummy_integer_array[20];
- CalculateVMRowAndSwath_params->PrefetchSourceLinesY = mode_lib->ms.PrefetchLinesYThisState;
- CalculateVMRowAndSwath_params->PrefetchSourceLinesC = mode_lib->ms.PrefetchLinesCThisState;
- CalculateVMRowAndSwath_params->VInitPreFillY = mode_lib->ms.PrefillY;
- CalculateVMRowAndSwath_params->VInitPreFillC = mode_lib->ms.PrefillC;
- CalculateVMRowAndSwath_params->MaxNumSwathY = mode_lib->ms.MaxNumSwY;
- CalculateVMRowAndSwath_params->MaxNumSwathC = mode_lib->ms.MaxNumSwC;
- CalculateVMRowAndSwath_params->meta_row_bw = mode_lib->ms.meta_row_bandwidth_this_state;
- CalculateVMRowAndSwath_params->dpte_row_bw = mode_lib->ms.dpte_row_bandwidth_this_state;
- CalculateVMRowAndSwath_params->PixelPTEBytesPerRow = mode_lib->ms.DPTEBytesPerRowThisState;
- CalculateVMRowAndSwath_params->PDEAndMetaPTEBytesFrame = mode_lib->ms.PDEAndMetaPTEBytesPerFrameThisState;
- CalculateVMRowAndSwath_params->MetaRowByte = mode_lib->ms.MetaRowBytesThisState;
- CalculateVMRowAndSwath_params->use_one_row_for_frame = mode_lib->ms.use_one_row_for_frame_this_state;
- CalculateVMRowAndSwath_params->use_one_row_for_frame_flip = mode_lib->ms.use_one_row_for_frame_flip_this_state;
- CalculateVMRowAndSwath_params->UsesMALLForStaticScreen = s->dummy_boolean_array[0];
- CalculateVMRowAndSwath_params->PTE_BUFFER_MODE = s->dummy_boolean_array[1];
- CalculateVMRowAndSwath_params->BIGK_FRAGMENT_SIZE = s->dummy_integer_array[21];
+ set_vm_row_and_swath_parameters(mode_lib);
CalculateVMRowAndSwath(&mode_lib->scratch,
CalculateVMRowAndSwath_params);
--
2.43.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH 4/6] drm/amd/display: Refactor dml_core_mode_support to reduce stack frame
2025-12-02 10:21 ` [PATCH 4/6] drm/amd/display: Refactor dml_core_mode_support to reduce stack frame Chenyu Chen
@ 2025-12-02 16:29 ` Alex Hung
2025-12-02 16:31 ` Alex Hung
0 siblings, 1 reply; 11+ messages in thread
From: Alex Hung @ 2025-12-02 16:29 UTC (permalink / raw)
To: Chenyu Chen, amd-gfx
Cc: Harry Wentland, Leo Li, Aurabindo Pillai, Roman Li, Wayne Lin,
Tom Chung, Fangzhi Zuo, Dan Wheeler, Ray Wu, Ivan Lipski,
Austin Zheng
On 12/2/25 03:21, Chenyu Chen wrote:
> From: Alex Hung <alex.hung@amd.com>
>
> [WHAT]
> When compiling Linux kernel with clang, the following warning / error
> messages pops up:
>
> drivers/gpu/drm/amd/amdgpu/../dal-dev/dc/dml2_0/display_mode_core.c:6853:12:
> error: stack frame size (2120) exceeds limit (2056) in
> 'dml_core_mode_support' [-Werror,-Wframe-larger-than]
> 6853 | dml_bool_t dml_core_mode_support(struct display_mode_lib_st
> *mode_lib)
>
> [HOW]
> Refactoring CalculateVMRowAndSwath_params assignments to a new function
> helps reduce the stack frame size in dml_core_mode_support.
>
Hi Chenyu,
A bug seems to be related. Can you add a buglink? Thanks.
Buglink: https://gitlab.freedesktop.org/drm/amd/-/issues/4733
> Reviewed-by: Austin Zheng <austin.zheng@amd.com>
> Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
> Signed-off-by: Alex Hung <alex.hung@amd.com>
> Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
> ---
> .../amd/display/dc/dml2_0/display_mode_core.c | 134 ++++++++++--------
> 1 file changed, 71 insertions(+), 63 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c b/drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c
> index c468f492b876..09303c282495 100644
> --- a/drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c
> +++ b/drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c
> @@ -6711,6 +6711,76 @@ static noinline_for_stack void dml_prefetch_check(struct display_mode_lib_st *mo
> } // for j
> }
>
> +static noinline_for_stack void set_vm_row_and_swath_parameters(struct display_mode_lib_st *mode_lib)
> +{
> + struct CalculateVMRowAndSwath_params_st *CalculateVMRowAndSwath_params = &mode_lib->scratch.CalculateVMRowAndSwath_params;
> + struct dml_core_mode_support_locals_st *s = &mode_lib->scratch.dml_core_mode_support_locals;
> +
> + CalculateVMRowAndSwath_params->NumberOfActiveSurfaces = mode_lib->ms.num_active_planes;
> + CalculateVMRowAndSwath_params->myPipe = s->SurfParameters;
> + CalculateVMRowAndSwath_params->SurfaceSizeInMALL = mode_lib->ms.SurfaceSizeInMALL;
> + CalculateVMRowAndSwath_params->PTEBufferSizeInRequestsLuma = mode_lib->ms.ip.dpte_buffer_size_in_pte_reqs_luma;
> + CalculateVMRowAndSwath_params->PTEBufferSizeInRequestsChroma = mode_lib->ms.ip.dpte_buffer_size_in_pte_reqs_chroma;
> + CalculateVMRowAndSwath_params->DCCMetaBufferSizeBytes = mode_lib->ms.ip.dcc_meta_buffer_size_bytes;
> + CalculateVMRowAndSwath_params->UseMALLForStaticScreen = mode_lib->ms.cache_display_cfg.plane.UseMALLForStaticScreen;
> + CalculateVMRowAndSwath_params->UseMALLForPStateChange = mode_lib->ms.cache_display_cfg.plane.UseMALLForPStateChange;
> + CalculateVMRowAndSwath_params->MALLAllocatedForDCN = mode_lib->ms.soc.mall_allocated_for_dcn_mbytes;
> + CalculateVMRowAndSwath_params->SwathWidthY = mode_lib->ms.SwathWidthYThisState;
> + CalculateVMRowAndSwath_params->SwathWidthC = mode_lib->ms.SwathWidthCThisState;
> + CalculateVMRowAndSwath_params->GPUVMEnable = mode_lib->ms.cache_display_cfg.plane.GPUVMEnable;
> + CalculateVMRowAndSwath_params->HostVMEnable = mode_lib->ms.cache_display_cfg.plane.HostVMEnable;
> + CalculateVMRowAndSwath_params->HostVMMaxNonCachedPageTableLevels = mode_lib->ms.cache_display_cfg.plane.HostVMMaxPageTableLevels;
> + CalculateVMRowAndSwath_params->GPUVMMaxPageTableLevels = mode_lib->ms.cache_display_cfg.plane.GPUVMMaxPageTableLevels;
> + CalculateVMRowAndSwath_params->GPUVMMinPageSizeKBytes = mode_lib->ms.cache_display_cfg.plane.GPUVMMinPageSizeKBytes;
> + CalculateVMRowAndSwath_params->HostVMMinPageSize = mode_lib->ms.soc.hostvm_min_page_size_kbytes * 1024;
> + CalculateVMRowAndSwath_params->PTEBufferModeOverrideEn = mode_lib->ms.cache_display_cfg.plane.PTEBufferModeOverrideEn;
> + CalculateVMRowAndSwath_params->PTEBufferModeOverrideVal = mode_lib->ms.cache_display_cfg.plane.PTEBufferMode;
> + CalculateVMRowAndSwath_params->PTEBufferSizeNotExceeded = mode_lib->ms.PTEBufferSizeNotExceededPerState;
> + CalculateVMRowAndSwath_params->DCCMetaBufferSizeNotExceeded = mode_lib->ms.DCCMetaBufferSizeNotExceededPerState;
> + CalculateVMRowAndSwath_params->dpte_row_width_luma_ub = s->dummy_integer_array[0];
> + CalculateVMRowAndSwath_params->dpte_row_width_chroma_ub = s->dummy_integer_array[1];
> + CalculateVMRowAndSwath_params->dpte_row_height_luma = mode_lib->ms.dpte_row_height;
> + CalculateVMRowAndSwath_params->dpte_row_height_chroma = mode_lib->ms.dpte_row_height_chroma;
> + CalculateVMRowAndSwath_params->dpte_row_height_linear_luma = s->dummy_integer_array[2]; // VBA_DELTA
> + CalculateVMRowAndSwath_params->dpte_row_height_linear_chroma = s->dummy_integer_array[3]; // VBA_DELTA
> + CalculateVMRowAndSwath_params->meta_req_width = s->dummy_integer_array[4];
> + CalculateVMRowAndSwath_params->meta_req_width_chroma = s->dummy_integer_array[5];
> + CalculateVMRowAndSwath_params->meta_req_height = s->dummy_integer_array[6];
> + CalculateVMRowAndSwath_params->meta_req_height_chroma = s->dummy_integer_array[7];
> + CalculateVMRowAndSwath_params->meta_row_width = s->dummy_integer_array[8];
> + CalculateVMRowAndSwath_params->meta_row_width_chroma = s->dummy_integer_array[9];
> + CalculateVMRowAndSwath_params->meta_row_height = mode_lib->ms.meta_row_height;
> + CalculateVMRowAndSwath_params->meta_row_height_chroma = mode_lib->ms.meta_row_height_chroma;
> + CalculateVMRowAndSwath_params->vm_group_bytes = s->dummy_integer_array[10];
> + CalculateVMRowAndSwath_params->dpte_group_bytes = mode_lib->ms.dpte_group_bytes;
> + CalculateVMRowAndSwath_params->PixelPTEReqWidthY = s->dummy_integer_array[11];
> + CalculateVMRowAndSwath_params->PixelPTEReqHeightY = s->dummy_integer_array[12];
> + CalculateVMRowAndSwath_params->PTERequestSizeY = s->dummy_integer_array[13];
> + CalculateVMRowAndSwath_params->PixelPTEReqWidthC = s->dummy_integer_array[14];
> + CalculateVMRowAndSwath_params->PixelPTEReqHeightC = s->dummy_integer_array[15];
> + CalculateVMRowAndSwath_params->PTERequestSizeC = s->dummy_integer_array[16];
> + CalculateVMRowAndSwath_params->dpde0_bytes_per_frame_ub_l = s->dummy_integer_array[17];
> + CalculateVMRowAndSwath_params->meta_pte_bytes_per_frame_ub_l = s->dummy_integer_array[18];
> + CalculateVMRowAndSwath_params->dpde0_bytes_per_frame_ub_c = s->dummy_integer_array[19];
> + CalculateVMRowAndSwath_params->meta_pte_bytes_per_frame_ub_c = s->dummy_integer_array[20];
> + CalculateVMRowAndSwath_params->PrefetchSourceLinesY = mode_lib->ms.PrefetchLinesYThisState;
> + CalculateVMRowAndSwath_params->PrefetchSourceLinesC = mode_lib->ms.PrefetchLinesCThisState;
> + CalculateVMRowAndSwath_params->VInitPreFillY = mode_lib->ms.PrefillY;
> + CalculateVMRowAndSwath_params->VInitPreFillC = mode_lib->ms.PrefillC;
> + CalculateVMRowAndSwath_params->MaxNumSwathY = mode_lib->ms.MaxNumSwY;
> + CalculateVMRowAndSwath_params->MaxNumSwathC = mode_lib->ms.MaxNumSwC;
> + CalculateVMRowAndSwath_params->meta_row_bw = mode_lib->ms.meta_row_bandwidth_this_state;
> + CalculateVMRowAndSwath_params->dpte_row_bw = mode_lib->ms.dpte_row_bandwidth_this_state;
> + CalculateVMRowAndSwath_params->PixelPTEBytesPerRow = mode_lib->ms.DPTEBytesPerRowThisState;
> + CalculateVMRowAndSwath_params->PDEAndMetaPTEBytesFrame = mode_lib->ms.PDEAndMetaPTEBytesPerFrameThisState;
> + CalculateVMRowAndSwath_params->MetaRowByte = mode_lib->ms.MetaRowBytesThisState;
> + CalculateVMRowAndSwath_params->use_one_row_for_frame = mode_lib->ms.use_one_row_for_frame_this_state;
> + CalculateVMRowAndSwath_params->use_one_row_for_frame_flip = mode_lib->ms.use_one_row_for_frame_flip_this_state;
> + CalculateVMRowAndSwath_params->UsesMALLForStaticScreen = s->dummy_boolean_array[0];
> + CalculateVMRowAndSwath_params->PTE_BUFFER_MODE = s->dummy_boolean_array[1];
> + CalculateVMRowAndSwath_params->BIGK_FRAGMENT_SIZE = s->dummy_integer_array[21];
> +}
> +
> /// @brief The Mode Support function.
> dml_bool_t dml_core_mode_support(struct display_mode_lib_st *mode_lib)
> {
> @@ -7683,69 +7753,7 @@ dml_bool_t dml_core_mode_support(struct display_mode_lib_st *mode_lib)
> s->SurfParameters[k].SwathHeightC = mode_lib->ms.SwathHeightCThisState[k];
> }
>
> - CalculateVMRowAndSwath_params->NumberOfActiveSurfaces = mode_lib->ms.num_active_planes;
> - CalculateVMRowAndSwath_params->myPipe = s->SurfParameters;
> - CalculateVMRowAndSwath_params->SurfaceSizeInMALL = mode_lib->ms.SurfaceSizeInMALL;
> - CalculateVMRowAndSwath_params->PTEBufferSizeInRequestsLuma = mode_lib->ms.ip.dpte_buffer_size_in_pte_reqs_luma;
> - CalculateVMRowAndSwath_params->PTEBufferSizeInRequestsChroma = mode_lib->ms.ip.dpte_buffer_size_in_pte_reqs_chroma;
> - CalculateVMRowAndSwath_params->DCCMetaBufferSizeBytes = mode_lib->ms.ip.dcc_meta_buffer_size_bytes;
> - CalculateVMRowAndSwath_params->UseMALLForStaticScreen = mode_lib->ms.cache_display_cfg.plane.UseMALLForStaticScreen;
> - CalculateVMRowAndSwath_params->UseMALLForPStateChange = mode_lib->ms.cache_display_cfg.plane.UseMALLForPStateChange;
> - CalculateVMRowAndSwath_params->MALLAllocatedForDCN = mode_lib->ms.soc.mall_allocated_for_dcn_mbytes;
> - CalculateVMRowAndSwath_params->SwathWidthY = mode_lib->ms.SwathWidthYThisState;
> - CalculateVMRowAndSwath_params->SwathWidthC = mode_lib->ms.SwathWidthCThisState;
> - CalculateVMRowAndSwath_params->GPUVMEnable = mode_lib->ms.cache_display_cfg.plane.GPUVMEnable;
> - CalculateVMRowAndSwath_params->HostVMEnable = mode_lib->ms.cache_display_cfg.plane.HostVMEnable;
> - CalculateVMRowAndSwath_params->HostVMMaxNonCachedPageTableLevels = mode_lib->ms.cache_display_cfg.plane.HostVMMaxPageTableLevels;
> - CalculateVMRowAndSwath_params->GPUVMMaxPageTableLevels = mode_lib->ms.cache_display_cfg.plane.GPUVMMaxPageTableLevels;
> - CalculateVMRowAndSwath_params->GPUVMMinPageSizeKBytes = mode_lib->ms.cache_display_cfg.plane.GPUVMMinPageSizeKBytes;
> - CalculateVMRowAndSwath_params->HostVMMinPageSize = mode_lib->ms.soc.hostvm_min_page_size_kbytes * 1024;
> - CalculateVMRowAndSwath_params->PTEBufferModeOverrideEn = mode_lib->ms.cache_display_cfg.plane.PTEBufferModeOverrideEn;
> - CalculateVMRowAndSwath_params->PTEBufferModeOverrideVal = mode_lib->ms.cache_display_cfg.plane.PTEBufferMode;
> - CalculateVMRowAndSwath_params->PTEBufferSizeNotExceeded = mode_lib->ms.PTEBufferSizeNotExceededPerState;
> - CalculateVMRowAndSwath_params->DCCMetaBufferSizeNotExceeded = mode_lib->ms.DCCMetaBufferSizeNotExceededPerState;
> - CalculateVMRowAndSwath_params->dpte_row_width_luma_ub = s->dummy_integer_array[0];
> - CalculateVMRowAndSwath_params->dpte_row_width_chroma_ub = s->dummy_integer_array[1];
> - CalculateVMRowAndSwath_params->dpte_row_height_luma = mode_lib->ms.dpte_row_height;
> - CalculateVMRowAndSwath_params->dpte_row_height_chroma = mode_lib->ms.dpte_row_height_chroma;
> - CalculateVMRowAndSwath_params->dpte_row_height_linear_luma = s->dummy_integer_array[2]; // VBA_DELTA
> - CalculateVMRowAndSwath_params->dpte_row_height_linear_chroma = s->dummy_integer_array[3]; // VBA_DELTA
> - CalculateVMRowAndSwath_params->meta_req_width = s->dummy_integer_array[4];
> - CalculateVMRowAndSwath_params->meta_req_width_chroma = s->dummy_integer_array[5];
> - CalculateVMRowAndSwath_params->meta_req_height = s->dummy_integer_array[6];
> - CalculateVMRowAndSwath_params->meta_req_height_chroma = s->dummy_integer_array[7];
> - CalculateVMRowAndSwath_params->meta_row_width = s->dummy_integer_array[8];
> - CalculateVMRowAndSwath_params->meta_row_width_chroma = s->dummy_integer_array[9];
> - CalculateVMRowAndSwath_params->meta_row_height = mode_lib->ms.meta_row_height;
> - CalculateVMRowAndSwath_params->meta_row_height_chroma = mode_lib->ms.meta_row_height_chroma;
> - CalculateVMRowAndSwath_params->vm_group_bytes = s->dummy_integer_array[10];
> - CalculateVMRowAndSwath_params->dpte_group_bytes = mode_lib->ms.dpte_group_bytes;
> - CalculateVMRowAndSwath_params->PixelPTEReqWidthY = s->dummy_integer_array[11];
> - CalculateVMRowAndSwath_params->PixelPTEReqHeightY = s->dummy_integer_array[12];
> - CalculateVMRowAndSwath_params->PTERequestSizeY = s->dummy_integer_array[13];
> - CalculateVMRowAndSwath_params->PixelPTEReqWidthC = s->dummy_integer_array[14];
> - CalculateVMRowAndSwath_params->PixelPTEReqHeightC = s->dummy_integer_array[15];
> - CalculateVMRowAndSwath_params->PTERequestSizeC = s->dummy_integer_array[16];
> - CalculateVMRowAndSwath_params->dpde0_bytes_per_frame_ub_l = s->dummy_integer_array[17];
> - CalculateVMRowAndSwath_params->meta_pte_bytes_per_frame_ub_l = s->dummy_integer_array[18];
> - CalculateVMRowAndSwath_params->dpde0_bytes_per_frame_ub_c = s->dummy_integer_array[19];
> - CalculateVMRowAndSwath_params->meta_pte_bytes_per_frame_ub_c = s->dummy_integer_array[20];
> - CalculateVMRowAndSwath_params->PrefetchSourceLinesY = mode_lib->ms.PrefetchLinesYThisState;
> - CalculateVMRowAndSwath_params->PrefetchSourceLinesC = mode_lib->ms.PrefetchLinesCThisState;
> - CalculateVMRowAndSwath_params->VInitPreFillY = mode_lib->ms.PrefillY;
> - CalculateVMRowAndSwath_params->VInitPreFillC = mode_lib->ms.PrefillC;
> - CalculateVMRowAndSwath_params->MaxNumSwathY = mode_lib->ms.MaxNumSwY;
> - CalculateVMRowAndSwath_params->MaxNumSwathC = mode_lib->ms.MaxNumSwC;
> - CalculateVMRowAndSwath_params->meta_row_bw = mode_lib->ms.meta_row_bandwidth_this_state;
> - CalculateVMRowAndSwath_params->dpte_row_bw = mode_lib->ms.dpte_row_bandwidth_this_state;
> - CalculateVMRowAndSwath_params->PixelPTEBytesPerRow = mode_lib->ms.DPTEBytesPerRowThisState;
> - CalculateVMRowAndSwath_params->PDEAndMetaPTEBytesFrame = mode_lib->ms.PDEAndMetaPTEBytesPerFrameThisState;
> - CalculateVMRowAndSwath_params->MetaRowByte = mode_lib->ms.MetaRowBytesThisState;
> - CalculateVMRowAndSwath_params->use_one_row_for_frame = mode_lib->ms.use_one_row_for_frame_this_state;
> - CalculateVMRowAndSwath_params->use_one_row_for_frame_flip = mode_lib->ms.use_one_row_for_frame_flip_this_state;
> - CalculateVMRowAndSwath_params->UsesMALLForStaticScreen = s->dummy_boolean_array[0];
> - CalculateVMRowAndSwath_params->PTE_BUFFER_MODE = s->dummy_boolean_array[1];
> - CalculateVMRowAndSwath_params->BIGK_FRAGMENT_SIZE = s->dummy_integer_array[21];
> + set_vm_row_and_swath_parameters(mode_lib);
>
> CalculateVMRowAndSwath(&mode_lib->scratch,
> CalculateVMRowAndSwath_params);
^ permalink raw reply [flat|nested] 11+ messages in thread* Re: [PATCH 4/6] drm/amd/display: Refactor dml_core_mode_support to reduce stack frame
2025-12-02 16:29 ` Alex Hung
@ 2025-12-02 16:31 ` Alex Hung
2025-12-03 9:42 ` Chen, Chen-Yu
0 siblings, 1 reply; 11+ messages in thread
From: Alex Hung @ 2025-12-02 16:31 UTC (permalink / raw)
To: Chenyu Chen, amd-gfx
Cc: Harry Wentland, Leo Li, Aurabindo Pillai, Roman Li, Wayne Lin,
Tom Chung, Fangzhi Zuo, Dan Wheeler, Ray Wu, Ivan Lipski,
Austin Zheng
On 12/2/25 09:29, Alex Hung wrote:
>
>
> On 12/2/25 03:21, Chenyu Chen wrote:
>> From: Alex Hung <alex.hung@amd.com>
>>
>> [WHAT]
>> When compiling Linux kernel with clang, the following warning / error
>> messages pops up:
>>
>> drivers/gpu/drm/amd/amdgpu/../dal-dev/dc/dml2_0/
>> display_mode_core.c:6853:12:
>> error: stack frame size (2120) exceeds limit (2056) in
>> 'dml_core_mode_support' [-Werror,-Wframe-larger-than]
>> 6853 | dml_bool_t dml_core_mode_support(struct display_mode_lib_st
>> *mode_lib)
>>
>> [HOW]
>> Refactoring CalculateVMRowAndSwath_params assignments to a new function
>> helps reduce the stack frame size in dml_core_mode_support.
>>
> Hi Chenyu,
>
> A bug seems to be related. Can you add a buglink? Thanks.
>
> Buglink: https://gitlab.freedesktop.org/drm/amd/-/issues/4733
Correction, Add "Closes" instead of "Buglink"
>
>> Reviewed-by: Austin Zheng <austin.zheng@amd.com>
>> Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
>> Signed-off-by: Alex Hung <alex.hung@amd.com>
>> Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
>> ---
>> .../amd/display/dc/dml2_0/display_mode_core.c | 134 ++++++++++--------
>> 1 file changed, 71 insertions(+), 63 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c
>> b/drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c
>> index c468f492b876..09303c282495 100644
>> --- a/drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c
>> +++ b/drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c
>> @@ -6711,6 +6711,76 @@ static noinline_for_stack void
>> dml_prefetch_check(struct display_mode_lib_st *mo
>> } // for j
>> }
>> +static noinline_for_stack void set_vm_row_and_swath_parameters(struct
>> display_mode_lib_st *mode_lib)
>> +{
>> + struct CalculateVMRowAndSwath_params_st
>> *CalculateVMRowAndSwath_params = &mode_lib-
>> >scratch.CalculateVMRowAndSwath_params;
>> + struct dml_core_mode_support_locals_st *s = &mode_lib-
>> >scratch.dml_core_mode_support_locals;
>> +
>> + CalculateVMRowAndSwath_params->NumberOfActiveSurfaces = mode_lib-
>> >ms.num_active_planes;
>> + CalculateVMRowAndSwath_params->myPipe = s->SurfParameters;
>> + CalculateVMRowAndSwath_params->SurfaceSizeInMALL = mode_lib-
>> >ms.SurfaceSizeInMALL;
>> + CalculateVMRowAndSwath_params->PTEBufferSizeInRequestsLuma =
>> mode_lib->ms.ip.dpte_buffer_size_in_pte_reqs_luma;
>> + CalculateVMRowAndSwath_params->PTEBufferSizeInRequestsChroma =
>> mode_lib->ms.ip.dpte_buffer_size_in_pte_reqs_chroma;
>> + CalculateVMRowAndSwath_params->DCCMetaBufferSizeBytes = mode_lib-
>> >ms.ip.dcc_meta_buffer_size_bytes;
>> + CalculateVMRowAndSwath_params->UseMALLForStaticScreen = mode_lib-
>> >ms.cache_display_cfg.plane.UseMALLForStaticScreen;
>> + CalculateVMRowAndSwath_params->UseMALLForPStateChange = mode_lib-
>> >ms.cache_display_cfg.plane.UseMALLForPStateChange;
>> + CalculateVMRowAndSwath_params->MALLAllocatedForDCN = mode_lib-
>> >ms.soc.mall_allocated_for_dcn_mbytes;
>> + CalculateVMRowAndSwath_params->SwathWidthY = mode_lib-
>> >ms.SwathWidthYThisState;
>> + CalculateVMRowAndSwath_params->SwathWidthC = mode_lib-
>> >ms.SwathWidthCThisState;
>> + CalculateVMRowAndSwath_params->GPUVMEnable = mode_lib-
>> >ms.cache_display_cfg.plane.GPUVMEnable;
>> + CalculateVMRowAndSwath_params->HostVMEnable = mode_lib-
>> >ms.cache_display_cfg.plane.HostVMEnable;
>> + CalculateVMRowAndSwath_params->HostVMMaxNonCachedPageTableLevels
>> = mode_lib->ms.cache_display_cfg.plane.HostVMMaxPageTableLevels;
>> + CalculateVMRowAndSwath_params->GPUVMMaxPageTableLevels =
>> mode_lib->ms.cache_display_cfg.plane.GPUVMMaxPageTableLevels;
>> + CalculateVMRowAndSwath_params->GPUVMMinPageSizeKBytes = mode_lib-
>> >ms.cache_display_cfg.plane.GPUVMMinPageSizeKBytes;
>> + CalculateVMRowAndSwath_params->HostVMMinPageSize = mode_lib-
>> >ms.soc.hostvm_min_page_size_kbytes * 1024;
>> + CalculateVMRowAndSwath_params->PTEBufferModeOverrideEn =
>> mode_lib->ms.cache_display_cfg.plane.PTEBufferModeOverrideEn;
>> + CalculateVMRowAndSwath_params->PTEBufferModeOverrideVal =
>> mode_lib->ms.cache_display_cfg.plane.PTEBufferMode;
>> + CalculateVMRowAndSwath_params->PTEBufferSizeNotExceeded =
>> mode_lib->ms.PTEBufferSizeNotExceededPerState;
>> + CalculateVMRowAndSwath_params->DCCMetaBufferSizeNotExceeded =
>> mode_lib->ms.DCCMetaBufferSizeNotExceededPerState;
>> + CalculateVMRowAndSwath_params->dpte_row_width_luma_ub = s-
>> >dummy_integer_array[0];
>> + CalculateVMRowAndSwath_params->dpte_row_width_chroma_ub = s-
>> >dummy_integer_array[1];
>> + CalculateVMRowAndSwath_params->dpte_row_height_luma = mode_lib-
>> >ms.dpte_row_height;
>> + CalculateVMRowAndSwath_params->dpte_row_height_chroma = mode_lib-
>> >ms.dpte_row_height_chroma;
>> + CalculateVMRowAndSwath_params->dpte_row_height_linear_luma = s-
>> >dummy_integer_array[2]; // VBA_DELTA
>> + CalculateVMRowAndSwath_params->dpte_row_height_linear_chroma = s-
>> >dummy_integer_array[3]; // VBA_DELTA
>> + CalculateVMRowAndSwath_params->meta_req_width = s-
>> >dummy_integer_array[4];
>> + CalculateVMRowAndSwath_params->meta_req_width_chroma = s-
>> >dummy_integer_array[5];
>> + CalculateVMRowAndSwath_params->meta_req_height = s-
>> >dummy_integer_array[6];
>> + CalculateVMRowAndSwath_params->meta_req_height_chroma = s-
>> >dummy_integer_array[7];
>> + CalculateVMRowAndSwath_params->meta_row_width = s-
>> >dummy_integer_array[8];
>> + CalculateVMRowAndSwath_params->meta_row_width_chroma = s-
>> >dummy_integer_array[9];
>> + CalculateVMRowAndSwath_params->meta_row_height = mode_lib-
>> >ms.meta_row_height;
>> + CalculateVMRowAndSwath_params->meta_row_height_chroma = mode_lib-
>> >ms.meta_row_height_chroma;
>> + CalculateVMRowAndSwath_params->vm_group_bytes = s-
>> >dummy_integer_array[10];
>> + CalculateVMRowAndSwath_params->dpte_group_bytes = mode_lib-
>> >ms.dpte_group_bytes;
>> + CalculateVMRowAndSwath_params->PixelPTEReqWidthY = s-
>> >dummy_integer_array[11];
>> + CalculateVMRowAndSwath_params->PixelPTEReqHeightY = s-
>> >dummy_integer_array[12];
>> + CalculateVMRowAndSwath_params->PTERequestSizeY = s-
>> >dummy_integer_array[13];
>> + CalculateVMRowAndSwath_params->PixelPTEReqWidthC = s-
>> >dummy_integer_array[14];
>> + CalculateVMRowAndSwath_params->PixelPTEReqHeightC = s-
>> >dummy_integer_array[15];
>> + CalculateVMRowAndSwath_params->PTERequestSizeC = s-
>> >dummy_integer_array[16];
>> + CalculateVMRowAndSwath_params->dpde0_bytes_per_frame_ub_l = s-
>> >dummy_integer_array[17];
>> + CalculateVMRowAndSwath_params->meta_pte_bytes_per_frame_ub_l = s-
>> >dummy_integer_array[18];
>> + CalculateVMRowAndSwath_params->dpde0_bytes_per_frame_ub_c = s-
>> >dummy_integer_array[19];
>> + CalculateVMRowAndSwath_params->meta_pte_bytes_per_frame_ub_c = s-
>> >dummy_integer_array[20];
>> + CalculateVMRowAndSwath_params->PrefetchSourceLinesY = mode_lib-
>> >ms.PrefetchLinesYThisState;
>> + CalculateVMRowAndSwath_params->PrefetchSourceLinesC = mode_lib-
>> >ms.PrefetchLinesCThisState;
>> + CalculateVMRowAndSwath_params->VInitPreFillY = mode_lib-
>> >ms.PrefillY;
>> + CalculateVMRowAndSwath_params->VInitPreFillC = mode_lib-
>> >ms.PrefillC;
>> + CalculateVMRowAndSwath_params->MaxNumSwathY = mode_lib-
>> >ms.MaxNumSwY;
>> + CalculateVMRowAndSwath_params->MaxNumSwathC = mode_lib-
>> >ms.MaxNumSwC;
>> + CalculateVMRowAndSwath_params->meta_row_bw = mode_lib-
>> >ms.meta_row_bandwidth_this_state;
>> + CalculateVMRowAndSwath_params->dpte_row_bw = mode_lib-
>> >ms.dpte_row_bandwidth_this_state;
>> + CalculateVMRowAndSwath_params->PixelPTEBytesPerRow = mode_lib-
>> >ms.DPTEBytesPerRowThisState;
>> + CalculateVMRowAndSwath_params->PDEAndMetaPTEBytesFrame =
>> mode_lib->ms.PDEAndMetaPTEBytesPerFrameThisState;
>> + CalculateVMRowAndSwath_params->MetaRowByte = mode_lib-
>> >ms.MetaRowBytesThisState;
>> + CalculateVMRowAndSwath_params->use_one_row_for_frame = mode_lib-
>> >ms.use_one_row_for_frame_this_state;
>> + CalculateVMRowAndSwath_params->use_one_row_for_frame_flip =
>> mode_lib->ms.use_one_row_for_frame_flip_this_state;
>> + CalculateVMRowAndSwath_params->UsesMALLForStaticScreen = s-
>> >dummy_boolean_array[0];
>> + CalculateVMRowAndSwath_params->PTE_BUFFER_MODE = s-
>> >dummy_boolean_array[1];
>> + CalculateVMRowAndSwath_params->BIGK_FRAGMENT_SIZE = s-
>> >dummy_integer_array[21];
>> +}
>> +
>> /// @brief The Mode Support function.
>> dml_bool_t dml_core_mode_support(struct display_mode_lib_st *mode_lib)
>> {
>> @@ -7683,69 +7753,7 @@ dml_bool_t dml_core_mode_support(struct
>> display_mode_lib_st *mode_lib)
>> s->SurfParameters[k].SwathHeightC = mode_lib-
>> >ms.SwathHeightCThisState[k];
>> }
>> - CalculateVMRowAndSwath_params->NumberOfActiveSurfaces =
>> mode_lib->ms.num_active_planes;
>> - CalculateVMRowAndSwath_params->myPipe = s->SurfParameters;
>> - CalculateVMRowAndSwath_params->SurfaceSizeInMALL = mode_lib-
>> >ms.SurfaceSizeInMALL;
>> - CalculateVMRowAndSwath_params->PTEBufferSizeInRequestsLuma =
>> mode_lib->ms.ip.dpte_buffer_size_in_pte_reqs_luma;
>> - CalculateVMRowAndSwath_params->PTEBufferSizeInRequestsChroma
>> = mode_lib->ms.ip.dpte_buffer_size_in_pte_reqs_chroma;
>> - CalculateVMRowAndSwath_params->DCCMetaBufferSizeBytes =
>> mode_lib->ms.ip.dcc_meta_buffer_size_bytes;
>> - CalculateVMRowAndSwath_params->UseMALLForStaticScreen =
>> mode_lib->ms.cache_display_cfg.plane.UseMALLForStaticScreen;
>> - CalculateVMRowAndSwath_params->UseMALLForPStateChange =
>> mode_lib->ms.cache_display_cfg.plane.UseMALLForPStateChange;
>> - CalculateVMRowAndSwath_params->MALLAllocatedForDCN =
>> mode_lib->ms.soc.mall_allocated_for_dcn_mbytes;
>> - CalculateVMRowAndSwath_params->SwathWidthY = mode_lib-
>> >ms.SwathWidthYThisState;
>> - CalculateVMRowAndSwath_params->SwathWidthC = mode_lib-
>> >ms.SwathWidthCThisState;
>> - CalculateVMRowAndSwath_params->GPUVMEnable = mode_lib-
>> >ms.cache_display_cfg.plane.GPUVMEnable;
>> - CalculateVMRowAndSwath_params->HostVMEnable = mode_lib-
>> >ms.cache_display_cfg.plane.HostVMEnable;
>> - CalculateVMRowAndSwath_params-
>> >HostVMMaxNonCachedPageTableLevels = mode_lib-
>> >ms.cache_display_cfg.plane.HostVMMaxPageTableLevels;
>> - CalculateVMRowAndSwath_params->GPUVMMaxPageTableLevels =
>> mode_lib->ms.cache_display_cfg.plane.GPUVMMaxPageTableLevels;
>> - CalculateVMRowAndSwath_params->GPUVMMinPageSizeKBytes =
>> mode_lib->ms.cache_display_cfg.plane.GPUVMMinPageSizeKBytes;
>> - CalculateVMRowAndSwath_params->HostVMMinPageSize = mode_lib-
>> >ms.soc.hostvm_min_page_size_kbytes * 1024;
>> - CalculateVMRowAndSwath_params->PTEBufferModeOverrideEn =
>> mode_lib->ms.cache_display_cfg.plane.PTEBufferModeOverrideEn;
>> - CalculateVMRowAndSwath_params->PTEBufferModeOverrideVal =
>> mode_lib->ms.cache_display_cfg.plane.PTEBufferMode;
>> - CalculateVMRowAndSwath_params->PTEBufferSizeNotExceeded =
>> mode_lib->ms.PTEBufferSizeNotExceededPerState;
>> - CalculateVMRowAndSwath_params->DCCMetaBufferSizeNotExceeded =
>> mode_lib->ms.DCCMetaBufferSizeNotExceededPerState;
>> - CalculateVMRowAndSwath_params->dpte_row_width_luma_ub = s-
>> >dummy_integer_array[0];
>> - CalculateVMRowAndSwath_params->dpte_row_width_chroma_ub = s-
>> >dummy_integer_array[1];
>> - CalculateVMRowAndSwath_params->dpte_row_height_luma =
>> mode_lib->ms.dpte_row_height;
>> - CalculateVMRowAndSwath_params->dpte_row_height_chroma =
>> mode_lib->ms.dpte_row_height_chroma;
>> - CalculateVMRowAndSwath_params->dpte_row_height_linear_luma =
>> s->dummy_integer_array[2]; // VBA_DELTA
>> - CalculateVMRowAndSwath_params->dpte_row_height_linear_chroma
>> = s->dummy_integer_array[3]; // VBA_DELTA
>> - CalculateVMRowAndSwath_params->meta_req_width = s-
>> >dummy_integer_array[4];
>> - CalculateVMRowAndSwath_params->meta_req_width_chroma = s-
>> >dummy_integer_array[5];
>> - CalculateVMRowAndSwath_params->meta_req_height = s-
>> >dummy_integer_array[6];
>> - CalculateVMRowAndSwath_params->meta_req_height_chroma = s-
>> >dummy_integer_array[7];
>> - CalculateVMRowAndSwath_params->meta_row_width = s-
>> >dummy_integer_array[8];
>> - CalculateVMRowAndSwath_params->meta_row_width_chroma = s-
>> >dummy_integer_array[9];
>> - CalculateVMRowAndSwath_params->meta_row_height = mode_lib-
>> >ms.meta_row_height;
>> - CalculateVMRowAndSwath_params->meta_row_height_chroma =
>> mode_lib->ms.meta_row_height_chroma;
>> - CalculateVMRowAndSwath_params->vm_group_bytes = s-
>> >dummy_integer_array[10];
>> - CalculateVMRowAndSwath_params->dpte_group_bytes = mode_lib-
>> >ms.dpte_group_bytes;
>> - CalculateVMRowAndSwath_params->PixelPTEReqWidthY = s-
>> >dummy_integer_array[11];
>> - CalculateVMRowAndSwath_params->PixelPTEReqHeightY = s-
>> >dummy_integer_array[12];
>> - CalculateVMRowAndSwath_params->PTERequestSizeY = s-
>> >dummy_integer_array[13];
>> - CalculateVMRowAndSwath_params->PixelPTEReqWidthC = s-
>> >dummy_integer_array[14];
>> - CalculateVMRowAndSwath_params->PixelPTEReqHeightC = s-
>> >dummy_integer_array[15];
>> - CalculateVMRowAndSwath_params->PTERequestSizeC = s-
>> >dummy_integer_array[16];
>> - CalculateVMRowAndSwath_params->dpde0_bytes_per_frame_ub_l =
>> s->dummy_integer_array[17];
>> - CalculateVMRowAndSwath_params->meta_pte_bytes_per_frame_ub_l
>> = s->dummy_integer_array[18];
>> - CalculateVMRowAndSwath_params->dpde0_bytes_per_frame_ub_c =
>> s->dummy_integer_array[19];
>> - CalculateVMRowAndSwath_params->meta_pte_bytes_per_frame_ub_c
>> = s->dummy_integer_array[20];
>> - CalculateVMRowAndSwath_params->PrefetchSourceLinesY =
>> mode_lib->ms.PrefetchLinesYThisState;
>> - CalculateVMRowAndSwath_params->PrefetchSourceLinesC =
>> mode_lib->ms.PrefetchLinesCThisState;
>> - CalculateVMRowAndSwath_params->VInitPreFillY = mode_lib-
>> >ms.PrefillY;
>> - CalculateVMRowAndSwath_params->VInitPreFillC = mode_lib-
>> >ms.PrefillC;
>> - CalculateVMRowAndSwath_params->MaxNumSwathY = mode_lib-
>> >ms.MaxNumSwY;
>> - CalculateVMRowAndSwath_params->MaxNumSwathC = mode_lib-
>> >ms.MaxNumSwC;
>> - CalculateVMRowAndSwath_params->meta_row_bw = mode_lib-
>> >ms.meta_row_bandwidth_this_state;
>> - CalculateVMRowAndSwath_params->dpte_row_bw = mode_lib-
>> >ms.dpte_row_bandwidth_this_state;
>> - CalculateVMRowAndSwath_params->PixelPTEBytesPerRow =
>> mode_lib->ms.DPTEBytesPerRowThisState;
>> - CalculateVMRowAndSwath_params->PDEAndMetaPTEBytesFrame =
>> mode_lib->ms.PDEAndMetaPTEBytesPerFrameThisState;
>> - CalculateVMRowAndSwath_params->MetaRowByte = mode_lib-
>> >ms.MetaRowBytesThisState;
>> - CalculateVMRowAndSwath_params->use_one_row_for_frame =
>> mode_lib->ms.use_one_row_for_frame_this_state;
>> - CalculateVMRowAndSwath_params->use_one_row_for_frame_flip =
>> mode_lib->ms.use_one_row_for_frame_flip_this_state;
>> - CalculateVMRowAndSwath_params->UsesMALLForStaticScreen = s-
>> >dummy_boolean_array[0];
>> - CalculateVMRowAndSwath_params->PTE_BUFFER_MODE = s-
>> >dummy_boolean_array[1];
>> - CalculateVMRowAndSwath_params->BIGK_FRAGMENT_SIZE = s-
>> >dummy_integer_array[21];
>> + set_vm_row_and_swath_parameters(mode_lib);
>> CalculateVMRowAndSwath(&mode_lib->scratch,
>> CalculateVMRowAndSwath_params);
>
^ permalink raw reply [flat|nested] 11+ messages in thread* Re: [PATCH 4/6] drm/amd/display: Refactor dml_core_mode_support to reduce stack frame
2025-12-02 16:31 ` Alex Hung
@ 2025-12-03 9:42 ` Chen, Chen-Yu
0 siblings, 0 replies; 11+ messages in thread
From: Chen, Chen-Yu @ 2025-12-03 9:42 UTC (permalink / raw)
To: Alex Hung, amd-gfx
Cc: Harry Wentland, Leo Li, Aurabindo Pillai, Roman Li, Wayne Lin,
Tom Chung, Fangzhi Zuo, Dan Wheeler, Ray Wu, Ivan Lipski,
Austin Zheng
Hi Alex,
I wiil add it before upstream.
Regards,
Chenyu
On 12/3/2025 12:31 AM, Alex Hung wrote:
>
>
> On 12/2/25 09:29, Alex Hung wrote:
>>
>>
>> On 12/2/25 03:21, Chenyu Chen wrote:
>>> From: Alex Hung <alex.hung@amd.com>
>>>
>>> [WHAT]
>>> When compiling Linux kernel with clang, the following warning / error
>>> messages pops up:
>>>
>>> drivers/gpu/drm/amd/amdgpu/../dal-dev/dc/dml2_0/
>>> display_mode_core.c:6853:12:
>>> error: stack frame size (2120) exceeds limit (2056) in
>>> 'dml_core_mode_support' [-Werror,-Wframe-larger-than]
>>> 6853 | dml_bool_t dml_core_mode_support(struct display_mode_lib_st
>>> *mode_lib)
>>>
>>> [HOW]
>>> Refactoring CalculateVMRowAndSwath_params assignments to a new function
>>> helps reduce the stack frame size in dml_core_mode_support.
>>>
>> Hi Chenyu,
>>
>> A bug seems to be related. Can you add a buglink? Thanks.
>>
>> Buglink: https://gitlab.freedesktop.org/drm/amd/-/issues/4733
>
> Correction, Add "Closes" instead of "Buglink"
>
>>
>>> Reviewed-by: Austin Zheng <austin.zheng@amd.com>
>>> Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
>>> Signed-off-by: Alex Hung <alex.hung@amd.com>
>>> Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
>>> ---
>>> .../amd/display/dc/dml2_0/display_mode_core.c | 134 ++++++++++--------
>>> 1 file changed, 71 insertions(+), 63 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c
>>> b/drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c
>>> index c468f492b876..09303c282495 100644
>>> --- a/drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c
>>> +++ b/drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c
>>> @@ -6711,6 +6711,76 @@ static noinline_for_stack void
>>> dml_prefetch_check(struct display_mode_lib_st *mo
>>> } // for j
>>> }
>>> +static noinline_for_stack void set_vm_row_and_swath_parameters(struct
>>> display_mode_lib_st *mode_lib)
>>> +{
>>> + struct CalculateVMRowAndSwath_params_st
>>> *CalculateVMRowAndSwath_params = &mode_lib-
>>>> scratch.CalculateVMRowAndSwath_params;
>>> + struct dml_core_mode_support_locals_st *s = &mode_lib-
>>>> scratch.dml_core_mode_support_locals;
>>> +
>>> + CalculateVMRowAndSwath_params->NumberOfActiveSurfaces = mode_lib-
>>>> ms.num_active_planes;
>>> + CalculateVMRowAndSwath_params->myPipe = s->SurfParameters;
>>> + CalculateVMRowAndSwath_params->SurfaceSizeInMALL = mode_lib-
>>>> ms.SurfaceSizeInMALL;
>>> + CalculateVMRowAndSwath_params->PTEBufferSizeInRequestsLuma =
>>> mode_lib->ms.ip.dpte_buffer_size_in_pte_reqs_luma;
>>> + CalculateVMRowAndSwath_params->PTEBufferSizeInRequestsChroma =
>>> mode_lib->ms.ip.dpte_buffer_size_in_pte_reqs_chroma;
>>> + CalculateVMRowAndSwath_params->DCCMetaBufferSizeBytes = mode_lib-
>>>> ms.ip.dcc_meta_buffer_size_bytes;
>>> + CalculateVMRowAndSwath_params->UseMALLForStaticScreen = mode_lib-
>>>> ms.cache_display_cfg.plane.UseMALLForStaticScreen;
>>> + CalculateVMRowAndSwath_params->UseMALLForPStateChange = mode_lib-
>>>> ms.cache_display_cfg.plane.UseMALLForPStateChange;
>>> + CalculateVMRowAndSwath_params->MALLAllocatedForDCN = mode_lib-
>>>> ms.soc.mall_allocated_for_dcn_mbytes;
>>> + CalculateVMRowAndSwath_params->SwathWidthY = mode_lib-
>>>> ms.SwathWidthYThisState;
>>> + CalculateVMRowAndSwath_params->SwathWidthC = mode_lib-
>>>> ms.SwathWidthCThisState;
>>> + CalculateVMRowAndSwath_params->GPUVMEnable = mode_lib-
>>>> ms.cache_display_cfg.plane.GPUVMEnable;
>>> + CalculateVMRowAndSwath_params->HostVMEnable = mode_lib-
>>>> ms.cache_display_cfg.plane.HostVMEnable;
>>> + CalculateVMRowAndSwath_params->HostVMMaxNonCachedPageTableLevels
>>> = mode_lib->ms.cache_display_cfg.plane.HostVMMaxPageTableLevels;
>>> + CalculateVMRowAndSwath_params->GPUVMMaxPageTableLevels =
>>> mode_lib->ms.cache_display_cfg.plane.GPUVMMaxPageTableLevels;
>>> + CalculateVMRowAndSwath_params->GPUVMMinPageSizeKBytes = mode_lib-
>>>> ms.cache_display_cfg.plane.GPUVMMinPageSizeKBytes;
>>> + CalculateVMRowAndSwath_params->HostVMMinPageSize = mode_lib-
>>>> ms.soc.hostvm_min_page_size_kbytes * 1024;
>>> + CalculateVMRowAndSwath_params->PTEBufferModeOverrideEn =
>>> mode_lib->ms.cache_display_cfg.plane.PTEBufferModeOverrideEn;
>>> + CalculateVMRowAndSwath_params->PTEBufferModeOverrideVal =
>>> mode_lib->ms.cache_display_cfg.plane.PTEBufferMode;
>>> + CalculateVMRowAndSwath_params->PTEBufferSizeNotExceeded =
>>> mode_lib->ms.PTEBufferSizeNotExceededPerState;
>>> + CalculateVMRowAndSwath_params->DCCMetaBufferSizeNotExceeded =
>>> mode_lib->ms.DCCMetaBufferSizeNotExceededPerState;
>>> + CalculateVMRowAndSwath_params->dpte_row_width_luma_ub = s-
>>>> dummy_integer_array[0];
>>> + CalculateVMRowAndSwath_params->dpte_row_width_chroma_ub = s-
>>>> dummy_integer_array[1];
>>> + CalculateVMRowAndSwath_params->dpte_row_height_luma = mode_lib-
>>>> ms.dpte_row_height;
>>> + CalculateVMRowAndSwath_params->dpte_row_height_chroma = mode_lib-
>>>> ms.dpte_row_height_chroma;
>>> + CalculateVMRowAndSwath_params->dpte_row_height_linear_luma = s-
>>>> dummy_integer_array[2]; // VBA_DELTA
>>> + CalculateVMRowAndSwath_params->dpte_row_height_linear_chroma = s-
>>>> dummy_integer_array[3]; // VBA_DELTA
>>> + CalculateVMRowAndSwath_params->meta_req_width = s-
>>>> dummy_integer_array[4];
>>> + CalculateVMRowAndSwath_params->meta_req_width_chroma = s-
>>>> dummy_integer_array[5];
>>> + CalculateVMRowAndSwath_params->meta_req_height = s-
>>>> dummy_integer_array[6];
>>> + CalculateVMRowAndSwath_params->meta_req_height_chroma = s-
>>>> dummy_integer_array[7];
>>> + CalculateVMRowAndSwath_params->meta_row_width = s-
>>>> dummy_integer_array[8];
>>> + CalculateVMRowAndSwath_params->meta_row_width_chroma = s-
>>>> dummy_integer_array[9];
>>> + CalculateVMRowAndSwath_params->meta_row_height = mode_lib-
>>>> ms.meta_row_height;
>>> + CalculateVMRowAndSwath_params->meta_row_height_chroma = mode_lib-
>>>> ms.meta_row_height_chroma;
>>> + CalculateVMRowAndSwath_params->vm_group_bytes = s-
>>>> dummy_integer_array[10];
>>> + CalculateVMRowAndSwath_params->dpte_group_bytes = mode_lib-
>>>> ms.dpte_group_bytes;
>>> + CalculateVMRowAndSwath_params->PixelPTEReqWidthY = s-
>>>> dummy_integer_array[11];
>>> + CalculateVMRowAndSwath_params->PixelPTEReqHeightY = s-
>>>> dummy_integer_array[12];
>>> + CalculateVMRowAndSwath_params->PTERequestSizeY = s-
>>>> dummy_integer_array[13];
>>> + CalculateVMRowAndSwath_params->PixelPTEReqWidthC = s-
>>>> dummy_integer_array[14];
>>> + CalculateVMRowAndSwath_params->PixelPTEReqHeightC = s-
>>>> dummy_integer_array[15];
>>> + CalculateVMRowAndSwath_params->PTERequestSizeC = s-
>>>> dummy_integer_array[16];
>>> + CalculateVMRowAndSwath_params->dpde0_bytes_per_frame_ub_l = s-
>>>> dummy_integer_array[17];
>>> + CalculateVMRowAndSwath_params->meta_pte_bytes_per_frame_ub_l = s-
>>>> dummy_integer_array[18];
>>> + CalculateVMRowAndSwath_params->dpde0_bytes_per_frame_ub_c = s-
>>>> dummy_integer_array[19];
>>> + CalculateVMRowAndSwath_params->meta_pte_bytes_per_frame_ub_c = s-
>>>> dummy_integer_array[20];
>>> + CalculateVMRowAndSwath_params->PrefetchSourceLinesY = mode_lib-
>>>> ms.PrefetchLinesYThisState;
>>> + CalculateVMRowAndSwath_params->PrefetchSourceLinesC = mode_lib-
>>>> ms.PrefetchLinesCThisState;
>>> + CalculateVMRowAndSwath_params->VInitPreFillY = mode_lib-
>>>> ms.PrefillY;
>>> + CalculateVMRowAndSwath_params->VInitPreFillC = mode_lib-
>>>> ms.PrefillC;
>>> + CalculateVMRowAndSwath_params->MaxNumSwathY = mode_lib-
>>>> ms.MaxNumSwY;
>>> + CalculateVMRowAndSwath_params->MaxNumSwathC = mode_lib-
>>>> ms.MaxNumSwC;
>>> + CalculateVMRowAndSwath_params->meta_row_bw = mode_lib-
>>>> ms.meta_row_bandwidth_this_state;
>>> + CalculateVMRowAndSwath_params->dpte_row_bw = mode_lib-
>>>> ms.dpte_row_bandwidth_this_state;
>>> + CalculateVMRowAndSwath_params->PixelPTEBytesPerRow = mode_lib-
>>>> ms.DPTEBytesPerRowThisState;
>>> + CalculateVMRowAndSwath_params->PDEAndMetaPTEBytesFrame =
>>> mode_lib->ms.PDEAndMetaPTEBytesPerFrameThisState;
>>> + CalculateVMRowAndSwath_params->MetaRowByte = mode_lib-
>>>> ms.MetaRowBytesThisState;
>>> + CalculateVMRowAndSwath_params->use_one_row_for_frame = mode_lib-
>>>> ms.use_one_row_for_frame_this_state;
>>> + CalculateVMRowAndSwath_params->use_one_row_for_frame_flip =
>>> mode_lib->ms.use_one_row_for_frame_flip_this_state;
>>> + CalculateVMRowAndSwath_params->UsesMALLForStaticScreen = s-
>>>> dummy_boolean_array[0];
>>> + CalculateVMRowAndSwath_params->PTE_BUFFER_MODE = s-
>>>> dummy_boolean_array[1];
>>> + CalculateVMRowAndSwath_params->BIGK_FRAGMENT_SIZE = s-
>>>> dummy_integer_array[21];
>>> +}
>>> +
>>> /// @brief The Mode Support function.
>>> dml_bool_t dml_core_mode_support(struct display_mode_lib_st *mode_lib)
>>> {
>>> @@ -7683,69 +7753,7 @@ dml_bool_t dml_core_mode_support(struct
>>> display_mode_lib_st *mode_lib)
>>> s->SurfParameters[k].SwathHeightC = mode_lib-
>>>> ms.SwathHeightCThisState[k];
>>> }
>>> - CalculateVMRowAndSwath_params->NumberOfActiveSurfaces =
>>> mode_lib->ms.num_active_planes;
>>> - CalculateVMRowAndSwath_params->myPipe = s->SurfParameters;
>>> - CalculateVMRowAndSwath_params->SurfaceSizeInMALL = mode_lib-
>>>> ms.SurfaceSizeInMALL;
>>> - CalculateVMRowAndSwath_params->PTEBufferSizeInRequestsLuma =
>>> mode_lib->ms.ip.dpte_buffer_size_in_pte_reqs_luma;
>>> - CalculateVMRowAndSwath_params->PTEBufferSizeInRequestsChroma
>>> = mode_lib->ms.ip.dpte_buffer_size_in_pte_reqs_chroma;
>>> - CalculateVMRowAndSwath_params->DCCMetaBufferSizeBytes =
>>> mode_lib->ms.ip.dcc_meta_buffer_size_bytes;
>>> - CalculateVMRowAndSwath_params->UseMALLForStaticScreen =
>>> mode_lib->ms.cache_display_cfg.plane.UseMALLForStaticScreen;
>>> - CalculateVMRowAndSwath_params->UseMALLForPStateChange =
>>> mode_lib->ms.cache_display_cfg.plane.UseMALLForPStateChange;
>>> - CalculateVMRowAndSwath_params->MALLAllocatedForDCN =
>>> mode_lib->ms.soc.mall_allocated_for_dcn_mbytes;
>>> - CalculateVMRowAndSwath_params->SwathWidthY = mode_lib-
>>>> ms.SwathWidthYThisState;
>>> - CalculateVMRowAndSwath_params->SwathWidthC = mode_lib-
>>>> ms.SwathWidthCThisState;
>>> - CalculateVMRowAndSwath_params->GPUVMEnable = mode_lib-
>>>> ms.cache_display_cfg.plane.GPUVMEnable;
>>> - CalculateVMRowAndSwath_params->HostVMEnable = mode_lib-
>>>> ms.cache_display_cfg.plane.HostVMEnable;
>>> - CalculateVMRowAndSwath_params-
>>>> HostVMMaxNonCachedPageTableLevels = mode_lib-
>>>> ms.cache_display_cfg.plane.HostVMMaxPageTableLevels;
>>> - CalculateVMRowAndSwath_params->GPUVMMaxPageTableLevels =
>>> mode_lib->ms.cache_display_cfg.plane.GPUVMMaxPageTableLevels;
>>> - CalculateVMRowAndSwath_params->GPUVMMinPageSizeKBytes =
>>> mode_lib->ms.cache_display_cfg.plane.GPUVMMinPageSizeKBytes;
>>> - CalculateVMRowAndSwath_params->HostVMMinPageSize = mode_lib-
>>>> ms.soc.hostvm_min_page_size_kbytes * 1024;
>>> - CalculateVMRowAndSwath_params->PTEBufferModeOverrideEn =
>>> mode_lib->ms.cache_display_cfg.plane.PTEBufferModeOverrideEn;
>>> - CalculateVMRowAndSwath_params->PTEBufferModeOverrideVal =
>>> mode_lib->ms.cache_display_cfg.plane.PTEBufferMode;
>>> - CalculateVMRowAndSwath_params->PTEBufferSizeNotExceeded =
>>> mode_lib->ms.PTEBufferSizeNotExceededPerState;
>>> - CalculateVMRowAndSwath_params->DCCMetaBufferSizeNotExceeded =
>>> mode_lib->ms.DCCMetaBufferSizeNotExceededPerState;
>>> - CalculateVMRowAndSwath_params->dpte_row_width_luma_ub = s-
>>>> dummy_integer_array[0];
>>> - CalculateVMRowAndSwath_params->dpte_row_width_chroma_ub = s-
>>>> dummy_integer_array[1];
>>> - CalculateVMRowAndSwath_params->dpte_row_height_luma =
>>> mode_lib->ms.dpte_row_height;
>>> - CalculateVMRowAndSwath_params->dpte_row_height_chroma =
>>> mode_lib->ms.dpte_row_height_chroma;
>>> - CalculateVMRowAndSwath_params->dpte_row_height_linear_luma =
>>> s->dummy_integer_array[2]; // VBA_DELTA
>>> - CalculateVMRowAndSwath_params->dpte_row_height_linear_chroma
>>> = s->dummy_integer_array[3]; // VBA_DELTA
>>> - CalculateVMRowAndSwath_params->meta_req_width = s-
>>>> dummy_integer_array[4];
>>> - CalculateVMRowAndSwath_params->meta_req_width_chroma = s-
>>>> dummy_integer_array[5];
>>> - CalculateVMRowAndSwath_params->meta_req_height = s-
>>>> dummy_integer_array[6];
>>> - CalculateVMRowAndSwath_params->meta_req_height_chroma = s-
>>>> dummy_integer_array[7];
>>> - CalculateVMRowAndSwath_params->meta_row_width = s-
>>>> dummy_integer_array[8];
>>> - CalculateVMRowAndSwath_params->meta_row_width_chroma = s-
>>>> dummy_integer_array[9];
>>> - CalculateVMRowAndSwath_params->meta_row_height = mode_lib-
>>>> ms.meta_row_height;
>>> - CalculateVMRowAndSwath_params->meta_row_height_chroma =
>>> mode_lib->ms.meta_row_height_chroma;
>>> - CalculateVMRowAndSwath_params->vm_group_bytes = s-
>>>> dummy_integer_array[10];
>>> - CalculateVMRowAndSwath_params->dpte_group_bytes = mode_lib-
>>>> ms.dpte_group_bytes;
>>> - CalculateVMRowAndSwath_params->PixelPTEReqWidthY = s-
>>>> dummy_integer_array[11];
>>> - CalculateVMRowAndSwath_params->PixelPTEReqHeightY = s-
>>>> dummy_integer_array[12];
>>> - CalculateVMRowAndSwath_params->PTERequestSizeY = s-
>>>> dummy_integer_array[13];
>>> - CalculateVMRowAndSwath_params->PixelPTEReqWidthC = s-
>>>> dummy_integer_array[14];
>>> - CalculateVMRowAndSwath_params->PixelPTEReqHeightC = s-
>>>> dummy_integer_array[15];
>>> - CalculateVMRowAndSwath_params->PTERequestSizeC = s-
>>>> dummy_integer_array[16];
>>> - CalculateVMRowAndSwath_params->dpde0_bytes_per_frame_ub_l =
>>> s->dummy_integer_array[17];
>>> - CalculateVMRowAndSwath_params->meta_pte_bytes_per_frame_ub_l
>>> = s->dummy_integer_array[18];
>>> - CalculateVMRowAndSwath_params->dpde0_bytes_per_frame_ub_c =
>>> s->dummy_integer_array[19];
>>> - CalculateVMRowAndSwath_params->meta_pte_bytes_per_frame_ub_c
>>> = s->dummy_integer_array[20];
>>> - CalculateVMRowAndSwath_params->PrefetchSourceLinesY =
>>> mode_lib->ms.PrefetchLinesYThisState;
>>> - CalculateVMRowAndSwath_params->PrefetchSourceLinesC =
>>> mode_lib->ms.PrefetchLinesCThisState;
>>> - CalculateVMRowAndSwath_params->VInitPreFillY = mode_lib-
>>>> ms.PrefillY;
>>> - CalculateVMRowAndSwath_params->VInitPreFillC = mode_lib-
>>>> ms.PrefillC;
>>> - CalculateVMRowAndSwath_params->MaxNumSwathY = mode_lib-
>>>> ms.MaxNumSwY;
>>> - CalculateVMRowAndSwath_params->MaxNumSwathC = mode_lib-
>>>> ms.MaxNumSwC;
>>> - CalculateVMRowAndSwath_params->meta_row_bw = mode_lib-
>>>> ms.meta_row_bandwidth_this_state;
>>> - CalculateVMRowAndSwath_params->dpte_row_bw = mode_lib-
>>>> ms.dpte_row_bandwidth_this_state;
>>> - CalculateVMRowAndSwath_params->PixelPTEBytesPerRow =
>>> mode_lib->ms.DPTEBytesPerRowThisState;
>>> - CalculateVMRowAndSwath_params->PDEAndMetaPTEBytesFrame =
>>> mode_lib->ms.PDEAndMetaPTEBytesPerFrameThisState;
>>> - CalculateVMRowAndSwath_params->MetaRowByte = mode_lib-
>>>> ms.MetaRowBytesThisState;
>>> - CalculateVMRowAndSwath_params->use_one_row_for_frame =
>>> mode_lib->ms.use_one_row_for_frame_this_state;
>>> - CalculateVMRowAndSwath_params->use_one_row_for_frame_flip =
>>> mode_lib->ms.use_one_row_for_frame_flip_this_state;
>>> - CalculateVMRowAndSwath_params->UsesMALLForStaticScreen = s-
>>>> dummy_boolean_array[0];
>>> - CalculateVMRowAndSwath_params->PTE_BUFFER_MODE = s-
>>>> dummy_boolean_array[1];
>>> - CalculateVMRowAndSwath_params->BIGK_FRAGMENT_SIZE = s-
>>>> dummy_integer_array[21];
>>> + set_vm_row_and_swath_parameters(mode_lib);
>>> CalculateVMRowAndSwath(&mode_lib->scratch,
>>> CalculateVMRowAndSwath_params);
>>
>
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 5/6] drm/amd/display: Additional info from DML for DMU
2025-12-02 10:21 [PATCH 0/6] DC Patches Dec 08 2025 Chenyu Chen
` (3 preceding siblings ...)
2025-12-02 10:21 ` [PATCH 4/6] drm/amd/display: Refactor dml_core_mode_support to reduce stack frame Chenyu Chen
@ 2025-12-02 10:21 ` Chenyu Chen
2025-12-02 10:21 ` [PATCH 6/6] drm/amd/display: Promote DC to 3.2.362 Chenyu Chen
2025-12-08 13:58 ` [PATCH 0/6] DC Patches Dec 08 2025 Wheeler, Daniel
6 siblings, 0 replies; 11+ messages in thread
From: Chenyu Chen @ 2025-12-02 10:21 UTC (permalink / raw)
To: amd-gfx
Cc: Harry Wentland, Leo Li, Aurabindo Pillai, Roman Li, Wayne Lin,
Tom Chung, Fangzhi Zuo, Dan Wheeler, Ray Wu, Ivan Lipski,
Alex Hung, Nevenko Stupar, Alvin Lee, Chenyu Chen
From: Nevenko Stupar <Nevenko.Stupar@amd.com>
[WHAT]
Add additional info from DML for DMU when applicable
on future platforms.
Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Nevenko Stupar <Nevenko.Stupar@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
---
drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_utils.c | 3 ++-
.../gpu/drm/amd/display/dc/dml2_0/dml21/inc/dml_top_types.h | 1 +
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_utils.c b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_utils.c
index ee721606b883..f667026cb43e 100644
--- a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_utils.c
+++ b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_utils.c
@@ -387,7 +387,8 @@ void dml21_build_fams2_programming(const struct dc *dc,
memset(&context->bw_ctx.bw.dcn.fams2_stream_sub_params_v2, 0, sizeof(union dmub_fams2_stream_static_sub_state_v2) * DML2_MAX_PLANES);
memset(&context->bw_ctx.bw.dcn.fams2_global_config, 0, sizeof(struct dmub_cmd_fams2_global_config));
- if (dml_ctx->v21.mode_programming.programming->fams2_required) {
+ if ((dml_ctx->v21.mode_programming.programming->fams2_required) ||
+ (dml_ctx->v21.mode_programming.programming->legacy_pstate_info_for_dmu)) {
for (i = 0; i < context->stream_count; i++) {
int dml_stream_idx;
struct dc_stream_state *phantom_stream;
diff --git a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/dml_top_types.h b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/dml_top_types.h
index 452e4a2e72c0..943fd3f040c3 100644
--- a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/dml_top_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/dml_top_types.h
@@ -418,6 +418,7 @@ struct dml2_display_cfg_programming {
/* indicates this configuration requires FW to support */
bool fams2_required;
+ bool legacy_pstate_info_for_dmu;
struct dmub_cmd_fams2_global_config fams2_global_config;
struct {
--
2.43.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 6/6] drm/amd/display: Promote DC to 3.2.362
2025-12-02 10:21 [PATCH 0/6] DC Patches Dec 08 2025 Chenyu Chen
` (4 preceding siblings ...)
2025-12-02 10:21 ` [PATCH 5/6] drm/amd/display: Additional info from DML for DMU Chenyu Chen
@ 2025-12-02 10:21 ` Chenyu Chen
2025-12-08 13:58 ` [PATCH 0/6] DC Patches Dec 08 2025 Wheeler, Daniel
6 siblings, 0 replies; 11+ messages in thread
From: Chenyu Chen @ 2025-12-02 10:21 UTC (permalink / raw)
To: amd-gfx
Cc: Harry Wentland, Leo Li, Aurabindo Pillai, Roman Li, Wayne Lin,
Tom Chung, Fangzhi Zuo, Dan Wheeler, Ray Wu, Ivan Lipski,
Alex Hung, Taimur Hassan, Chenyu Chen
From: Taimur Hassan <Syed.Hassan@amd.com>
This version brings along the following updates:
- Defer transitions from minimal state to final state
- Remove periodic detection callbacks from dcn35+
- Fixes for S0i3 exit
- Refactor dml_core_mode_support to reduce stack frame
- Add additional info from DML for DMU
Signed-off-by: Taimur Hassan <Syed.Hassan@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index d926bf54185b..93a60fd9a08c 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -63,7 +63,7 @@ struct dcn_dsc_reg_state;
struct dcn_optc_reg_state;
struct dcn_dccg_reg_state;
-#define DC_VER "3.2.361"
+#define DC_VER "3.2.362"
/**
* MAX_SURFACES - representative of the upper bound of surfaces that can be piped to a single CRTC
--
2.43.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* RE: [PATCH 0/6] DC Patches Dec 08 2025
2025-12-02 10:21 [PATCH 0/6] DC Patches Dec 08 2025 Chenyu Chen
` (5 preceding siblings ...)
2025-12-02 10:21 ` [PATCH 6/6] drm/amd/display: Promote DC to 3.2.362 Chenyu Chen
@ 2025-12-08 13:58 ` Wheeler, Daniel
6 siblings, 0 replies; 11+ messages in thread
From: Wheeler, Daniel @ 2025-12-08 13:58 UTC (permalink / raw)
To: Chen, Chen-Yu, amd-gfx@lists.freedesktop.org
Cc: Wentland, Harry, Li, Sun peng (Leo), Pillai, Aurabindo, Li, Roman,
Lin, Wayne, Chung, ChiaHsuan (Tom), Zuo, Jerry, Wu, Ray,
LIPSKI, IVAN, Hung, Alex, Chen, Chen-Yu
[Public]
Hi all,
This week this patchset was tested on 4 systems, two dGPU and two APU based, and tested across multiple display and connection types.
APU
* Single Display eDP -> 1080p 60hz, 1920x1200 165hz, 3840x2400 60hz
* Single Display DP (SST DSC) -> 4k144hz, 4k240hz
* Multi display -> eDP + DP/HDMI/USB-C -> 1080p 60hz eDP + 4k 144hz, 4k 240hz (Includes USB-C to DP/HDMI adapters)
* Thunderbolt -> LG Ultrafine 5k
* MST DSC -> Cable Matters 101075 (DP to 3x DP) with 3x 4k60hz displays, HP Hook G2 with 2x 4k60hz displays
* USB 4 -> HP Hook G4, Lenovo Thunderbolt Dock, both with 2x 4k60hz DP and 1x 4k60hz HDMI displays
* SST PCON -> Club3D CAC-1085 + 1x 4k 144hz, FRL3, at a max resolution supported by the dongle of 4k 120hz YUV420 12bpc.
* MST PCON -> 1x 4k 144hz, FRL3, at a max resolution supported by the adapter of 4k 120hz RGB 8bpc.
DGPU
* Single Display DP (SST DSC) -> 4k144hz, 4k240hz
* Multiple Display DP -> 4k240hz + 4k144hz
* MST (Startech MST14DP123DP [DP to 3x DP] and 2x 4k 60hz displays)
* MST DSC (with Cable Matters 101075 [DP to 3x DP] with 3x 4k60hz displays)
The testing is a mix of automated and manual tests. Manual testing includes (but is not limited to)
* Changing display configurations and settings
* Video/Audio playback
* Benchmark testing
* Suspend/Resume testing
* Feature testing (Freesync, HDCP, etc.)
Automated testing includes (but is not limited to)
* Script testing (scripts to automate some of the manual checks)
* IGT testing
The testing is mainly tested on the following displays, but occasionally there are tests with other displays
* Samsung G8 Neo 4k240hz
* Samsung QN55QN95B 4k 120hz
* Acer XV322QKKV 4k144hz
* HP U27 4k Wireless 4k60hz
* LG 27UD58B 4k60hz
* LG 32UN650WA 4k60hz
* LG Ultrafine 5k 5k60hz
* AU Optronics B140HAN01.1 1080p 60hz eDP
* AU Optronics B160UAN01.J 1920x1200 165hz eDP
* Samsung ATNA60YV02-0 3840x2400 60Hz OLED eDP
The patchset consists of the amd-staging-drm-next branch (Head commit - 9a9bbe98197771f67bb808ea078b3b95b4c1f22b -> amdkfd: Introduce kfd_create_process_sysfs as a separate function) with new patches added on top of it.
Tested on Ubuntu 24.04.3, on Wayland and X11, using Gnome.
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Thank you,
Dan Wheeler
Sr. Technologist | AMD
SW Display
------------------------------------------------------------------------------------------------------------------
1 Commerce Valley Dr E, Thornhill, ON L3T 7X6
amd.com
-----Original Message-----
From: Chenyu Chen <chen-yu.chen@amd.com>
Sent: Tuesday, December 2, 2025 5:21 AM
To: amd-gfx@lists.freedesktop.org
Cc: Wentland, Harry <Harry.Wentland@amd.com>; Li, Sun peng (Leo) <Sunpeng.Li@amd.com>; Pillai, Aurabindo <Aurabindo.Pillai@amd.com>; Li, Roman <Roman.Li@amd.com>; Lin, Wayne <Wayne.Lin@amd.com>; Chung, ChiaHsuan (Tom) <ChiaHsuan.Chung@amd.com>; Zuo, Jerry <Jerry.Zuo@amd.com>; Wheeler, Daniel <Daniel.Wheeler@amd.com>; Wu, Ray <Ray.Wu@amd.com>; LIPSKI, IVAN <IVAN.LIPSKI@amd.com>; Hung, Alex <Alex.Hung@amd.com>; Chen, Chen-Yu <Chen-Yu.Chen@amd.com>
Subject: [PATCH 0/6] DC Patches Dec 08 2025
This DC patchset brings improvements in multiple areas. In summary, we highlight:
- Defer transitions from minimal state to final state
- Remove periodic detection callbacks from dcn35+
- Fixes for S0i3 exit
- Refactor dml_core_mode_support to reduce stack frame
- Add additional info from DML for DMU
Cc: Daniel Wheeler <daniel.wheeler@amd.com>
Alex Hung (1):
drm/amd/display: Refactor dml_core_mode_support to reduce stack frame
Dillon Varone (1):
drm/amd/display: Remove periodic detection callbacks from dcn35+
Joshua Aberback (1):
drm/amd/display: Defer transitions from minimal state to final state
Nevenko Stupar (1):
drm/amd/display: Additional info from DML for DMU
Ovidiu Bunea (1):
drm/amd/display: Fixes for S0i3 exit
Taimur Hassan (1):
drm/amd/display: Promote DC to 3.2.362
.../display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c | 2 -
drivers/gpu/drm/amd/display/dc/core/dc.c | 200 ++++++++++++------
drivers/gpu/drm/amd/display/dc/dc.h | 9 +-
.../dc/dio/dcn35/dcn35_dio_link_encoder.c | 1 -
.../amd/display/dc/dml2_0/display_mode_core.c | 134 ++++++------
.../amd/display/dc/dml2_0/dml21/dml21_utils.c | 3 +-
.../dc/dml2_0/dml21/inc/dml_top_types.h | 1 +
.../amd/display/dc/hwss/dcn32/dcn32_hwseq.c | 6 +
8 files changed, 218 insertions(+), 138 deletions(-)
--
2.43.0
^ permalink raw reply [flat|nested] 11+ messages in thread