[PATCH] drm/amdgpu/sriov: Need to initialize the HDP_NONSURFACE_BAStE

[PATCH] drm/amdgpu/sriov: Need to initialize the HDP_NONSURFACE_BAStE

[Tiecheng Zhou]

it requires to initialize HDP_NONSURFACE_BASE, so as to avoid
using the value left by a previous VM under sriov scenario.

v2: it should not hurt baremetal, generalize it for both sriov
and baremetal

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Signed-off-by: Tiecheng Zhou <Tiecheng.Zhou@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index be729e7..c221570 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -1181,6 +1181,9 @@ static int gmc_v9_0_gart_enable(struct amdgpu_device *adev)
 	tmp = RREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL);
 	WREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL, tmp);
 
+	WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE, (adev->gmc.vram_start >> 8));
+	WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE_HI, (adev->gmc.vram_start >> 40));
+
 	/* After HDP is initialized, flush HDP.*/
 	adev->nbio_funcs->hdp_flush(adev, NULL);
 
-- 
2.7.4

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Re: [PATCH] drm/amdgpu/sriov: Need to initialize the HDP_NONSURFACE_BAStE

[Christian König]

Am 14.05.19 um 12:59 schrieb Tiecheng Zhou:
> it requires to initialize HDP_NONSURFACE_BASE, so as to avoid
> using the value left by a previous VM under sriov scenario.
>
> v2: it should not hurt baremetal, generalize it for both sriov
> and baremetal
>
> Signed-off-by: Emily Deng <Emily.Deng@amd.com>
> Signed-off-by: Tiecheng Zhou <Tiecheng.Zhou@amd.com>

Reviewed-by: Christian König <christian.koenig@amd.com>

> ---
>   drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 3 +++
>   1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> index be729e7..c221570 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> @@ -1181,6 +1181,9 @@ static int gmc_v9_0_gart_enable(struct amdgpu_device *adev)
>   	tmp = RREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL);
>   	WREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL, tmp);
>   
> +	WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE, (adev->gmc.vram_start >> 8));
> +	WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE_HI, (adev->gmc.vram_start >> 40));
> +
>   	/* After HDP is initialized, flush HDP.*/
>   	adev->nbio_funcs->hdp_flush(adev, NULL);
>   

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[PATCH] drm/amdgpu/sriov: Need to initialize the HDP_NONSURFACE_BAStE

[Tiecheng Zhou]

it requires to initialize HDP_NONSURFACE_BASE, so as to avoid
using the value left by a previous VM under sriov scenario.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Signed-off-by: Tiecheng Zhou <Tiecheng.Zhou@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index be729e7..e96684e 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -1181,6 +1181,11 @@ static int gmc_v9_0_gart_enable(struct amdgpu_device *adev)
 	tmp = RREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL);
 	WREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL, tmp);
 
+	if (amdgpu_sriov_vf(adev)) {
+		WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE, (adev->gmc.vram_start >> 8));
+		WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE_HI, (adev->gmc.vram_start >> 40));
+	}
+
 	/* After HDP is initialized, flush HDP.*/
 	adev->nbio_funcs->hdp_flush(adev, NULL);
 
-- 
2.7.4

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Re: [PATCH] drm/amdgpu/sriov: Need to initialize the HDP_NONSURFACE_BAStE

[Christian König]

Am 14.05.19 um 12:24 schrieb Tiecheng Zhou:
> it requires to initialize HDP_NONSURFACE_BASE, so as to avoid
> using the value left by a previous VM under sriov scenario.
>
> Signed-off-by: Emily Deng <Emily.Deng@amd.com>
> Signed-off-by: Tiecheng Zhou <Tiecheng.Zhou@amd.com>

Would it hurt us to also do this on bare metal?

Apart from that looks good to me,
Christian.

> ---
>   drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 5 +++++
>   1 file changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> index be729e7..e96684e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> @@ -1181,6 +1181,11 @@ static int gmc_v9_0_gart_enable(struct amdgpu_device *adev)
>   	tmp = RREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL);
>   	WREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL, tmp);
>   
> +	if (amdgpu_sriov_vf(adev)) {
> +		WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE, (adev->gmc.vram_start >> 8));
> +		WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE_HI, (adev->gmc.vram_start >> 40));
> +	}
> +
>   	/* After HDP is initialized, flush HDP.*/
>   	adev->nbio_funcs->hdp_flush(adev, NULL);
>   

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RE: [PATCH] drm/amdgpu/sriov: Need to initialize the HDP_NONSURFACE_BAStE

[Deucher, Alexander]

> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of
> Christian König
> Sent: Tuesday, May 14, 2019 6:34 AM
> To: Zhou, Tiecheng <Tiecheng.Zhou@amd.com>; amd-
> gfx@lists.freedesktop.org
> Cc: Deng, Emily <Emily.Deng@amd.com>
> Subject: Re: [PATCH] drm/amdgpu/sriov: Need to initialize the
> HDP_NONSURFACE_BAStE
> 
> [CAUTION: External Email]
> 
> Am 14.05.19 um 12:24 schrieb Tiecheng Zhou:
> > it requires to initialize HDP_NONSURFACE_BASE, so as to avoid using
> > the value left by a previous VM under sriov scenario.
> >
> > Signed-off-by: Emily Deng <Emily.Deng@amd.com>
> > Signed-off-by: Tiecheng Zhou <Tiecheng.Zhou@amd.com>
> 
> Would it hurt us to also do this on bare metal?
> 

Vbios Asic_init handles this for us on bare metal.

Alex

> Apart from that looks good to me,
> Christian.
> 
> > ---
> >   drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 5 +++++
> >   1 file changed, 5 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> > b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> > index be729e7..e96684e 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> > @@ -1181,6 +1181,11 @@ static int gmc_v9_0_gart_enable(struct
> amdgpu_device *adev)
> >       tmp = RREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL);
> >       WREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL, tmp);
> >
> > +     if (amdgpu_sriov_vf(adev)) {
> > +             WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE, (adev-
> >gmc.vram_start >> 8));
> > +             WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE_HI, (adev-
> >gmc.vram_start >> 40));
> > +     }
> > +
> >       /* After HDP is initialized, flush HDP.*/
> >       adev->nbio_funcs->hdp_flush(adev, NULL);
> >
> 
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
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[PATCH] drm/amdgpu/sriov: Need to initialize the HDP_NONSURFACE_BAStE

[Tiecheng Zhou]

it requires to initialize HDP_NONSURFACE_BASE, so as to avoid
using the value left by a previous VM under sriov scenario.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Signed-off-by: Tiecheng Zhou <Tiecheng.Zhou@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index be729e7..e96684e 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -1181,6 +1181,11 @@ static int gmc_v9_0_gart_enable(struct amdgpu_device *adev)
 	tmp = RREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL);
 	WREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL, tmp);
 
+	if (amdgpu_sriov_vf(adev)) {
+		WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE, (adev->gmc.vram_start >> 8));
+		WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE_HI, (adev->gmc.vram_start >> 40));
+	}
+
 	/* After HDP is initialized, flush HDP.*/
 	adev->nbio_funcs->hdp_flush(adev, NULL);
 
-- 
2.7.4

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Re: [PATCH] drm/amdgpu/sriov: Need to initialize the HDP_NONSURFACE_BAStE

[Deucher, Alexander]

[-- Attachment #1.1: Type: text/plain, Size: 1826 bytes --]

Reviewed-by: Alex Deucher <alexander.deucher-5C7GfCeVMHo@public.gmane.org>
________________________________
From: amd-gfx <amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org> on behalf of Tiecheng Zhou <Tiecheng.Zhou-5C7GfCeVMHo@public.gmane.org>
Sent: Monday, May 13, 2019 11:34 PM
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: Zhou, Tiecheng; Deng, Emily
Subject: [PATCH] drm/amdgpu/sriov: Need to initialize the HDP_NONSURFACE_BAStE

[CAUTION: External Email]

it requires to initialize HDP_NONSURFACE_BASE, so as to avoid
using the value left by a previous VM under sriov scenario.

Signed-off-by: Emily Deng <Emily.Deng-5C7GfCeVMHo@public.gmane.org>
Signed-off-by: Tiecheng Zhou <Tiecheng.Zhou-5C7GfCeVMHo@public.gmane.org>
---
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index be729e7..e96684e 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -1181,6 +1181,11 @@ static int gmc_v9_0_gart_enable(struct amdgpu_device *adev)
        tmp = RREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL);
        WREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL, tmp);

+       if (amdgpu_sriov_vf(adev)) {
+               WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE, (adev->gmc.vram_start >> 8));
+               WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE_HI, (adev->gmc.vram_start >> 40));
+       }
+
        /* After HDP is initialized, flush HDP.*/
        adev->nbio_funcs->hdp_flush(adev, NULL);

--
2.7.4

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