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* [PATCH v3] drm/amdgpu: do not use amdgpu_bo_gpu_offset_no_check individually
@ 2025-11-30  9:04 Saleemkhan Jamadar
  2025-12-04  9:20 ` Saleemkhan
  2025-12-11 10:40 ` Christian König
  0 siblings, 2 replies; 5+ messages in thread
From: Saleemkhan Jamadar @ 2025-11-30  9:04 UTC (permalink / raw)
  To: Christian.Koenig, alexander.deucher, amd-gfx, saleemkhan083
  Cc: Christian König

This should not be used indiviually, use amdgpu_bo_gpu_offset
with bo reserved.

v3 - unpin bo in queue destroy (Christian)
v2 - pin bo so that offset returned won't change after unlock (Christian)

Signed-off-by: Saleemkhan Jamadar <saleemkhan083@gmail.com>
Suggested-by: Christian König <christian.koenig@amd.com>
---
 .../gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c  |  2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c     |  8 +++++++
 drivers/gpu/drm/amd/amdgpu/mes_userqueue.c    | 21 ++++++++++++++++++-
 3 files changed, 29 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c
index 3040437d99c2..bc7858567321 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c
@@ -129,7 +129,7 @@ uint32_t amdgpu_doorbell_index_on_bar(struct amdgpu_device *adev,
 {
 	int db_bo_offset;
 
-	db_bo_offset = amdgpu_bo_gpu_offset_no_check(db_bo);
+	db_bo_offset = amdgpu_bo_gpu_offset(db_bo);
 
 	/* doorbell index is 32 bit but doorbell's size can be 32 bit
 	 * or 64 bit, so *db_size(in byte)/4 for alignment.
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c
index 2f97f35e0af5..98110f543307 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c
@@ -586,6 +586,14 @@ amdgpu_userq_destroy(struct drm_file *filp, int queue_id)
 		amdgpu_bo_unreserve(queue->db_obj.obj);
 	}
 	amdgpu_bo_unref(&queue->db_obj.obj);
+
+	r = amdgpu_bo_reserve(queue->wptr_obj.obj, true);
+	if (!r) {
+		amdgpu_bo_unpin(queue->wptr_obj.obj);
+		amdgpu_bo_unreserve(queue->wptr_obj.obj);
+	}
+	amdgpu_bo_unref(&queue->wptr_obj.obj);
+
 	atomic_dec(&uq_mgr->userq_count[queue->queue_type]);
 #if defined(CONFIG_DEBUG_FS)
 	debugfs_remove_recursive(queue->debugfs_queue);
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c b/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
index 8b0aeb89025a..23cf517bec39 100644
--- a/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
+++ b/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
@@ -94,8 +94,27 @@ mes_userq_create_wptr_mapping(struct amdgpu_device *adev,
 		return ret;
 	}
 
-	queue->wptr_obj.gpu_addr = amdgpu_bo_gpu_offset_no_check(wptr_obj->obj);
+	ret = amdgpu_bo_reserve(wptr_obj->obj, true);
+	if (ret) {
+		DRM_ERROR("Failed to reserve wptr bo\n");
+		return ret;
+	}
+
+	ret = amdgpu_bo_pin(wptr_obj->obj, AMDGPU_GEM_DOMAIN_GTT);
+	if (ret) {
+		drm_file_err(uq_mgr->file, "[Usermode queues] Failed to pin wptr bo\n");
+		goto unresv_bo;
+	}
+
+	queue->wptr_obj.gpu_addr = amdgpu_bo_gpu_offset(wptr_obj->obj);
+	amdgpu_bo_unreserve(wptr_obj->obj);
+
 	return 0;
+
+unresv_bo:
+	amdgpu_bo_unreserve(wptr_obj->obj);
+	return ret;
+
 }
 
 static int convert_to_mes_priority(int priority)
-- 
2.43.0


^ permalink raw reply related	[flat|nested] 5+ messages in thread

* Re: [PATCH v3] drm/amdgpu: do not use amdgpu_bo_gpu_offset_no_check individually
  2025-11-30  9:04 [PATCH v3] drm/amdgpu: do not use amdgpu_bo_gpu_offset_no_check individually Saleemkhan Jamadar
@ 2025-12-04  9:20 ` Saleemkhan
  2025-12-11 10:40 ` Christian König
  1 sibling, 0 replies; 5+ messages in thread
From: Saleemkhan @ 2025-12-04  9:20 UTC (permalink / raw)
  To: Christian.Koenig, alexander.deucher, amd-gfx, saleemkhan083
  Cc: Christian König

[-- Attachment #1: Type: text/plain, Size: 3150 bytes --]

Ping.?

Thanks,
Saleem

On 30 November 2025 2:34:44 pm IST, Saleemkhan Jamadar <saleemkhan083@gmail.com> wrote:
>This should not be used indiviually, use amdgpu_bo_gpu_offset
>with bo reserved.
>
>v3 - unpin bo in queue destroy (Christian)
>v2 - pin bo so that offset returned won't change after unlock (Christian)
>
>Signed-off-by: Saleemkhan Jamadar <saleemkhan083@gmail.com>
>Suggested-by: Christian König <christian.koenig@amd.com>
>---
> .../gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c  |  2 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c     |  8 +++++++
> drivers/gpu/drm/amd/amdgpu/mes_userqueue.c    | 21 ++++++++++++++++++-
> 3 files changed, 29 insertions(+), 2 deletions(-)
>
>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c
>index 3040437d99c2..bc7858567321 100644
>--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c
>+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c
>@@ -129,7 +129,7 @@ uint32_t amdgpu_doorbell_index_on_bar(struct amdgpu_device *adev,
> {
> 	int db_bo_offset;
> 
>-	db_bo_offset = amdgpu_bo_gpu_offset_no_check(db_bo);
>+	db_bo_offset = amdgpu_bo_gpu_offset(db_bo);
> 
> 	/* doorbell index is 32 bit but doorbell's size can be 32 bit
> 	 * or 64 bit, so *db_size(in byte)/4 for alignment.
>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c
>index 2f97f35e0af5..98110f543307 100644
>--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c
>+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c
>@@ -586,6 +586,14 @@ amdgpu_userq_destroy(struct drm_file *filp, int queue_id)
> 		amdgpu_bo_unreserve(queue->db_obj.obj);
> 	}
> 	amdgpu_bo_unref(&queue->db_obj.obj);
>+
>+	r = amdgpu_bo_reserve(queue->wptr_obj.obj, true);
>+	if (!r) {
>+		amdgpu_bo_unpin(queue->wptr_obj.obj);
>+		amdgpu_bo_unreserve(queue->wptr_obj.obj);
>+	}
>+	amdgpu_bo_unref(&queue->wptr_obj.obj);
>+
> 	atomic_dec(&uq_mgr->userq_count[queue->queue_type]);
> #if defined(CONFIG_DEBUG_FS)
> 	debugfs_remove_recursive(queue->debugfs_queue);
>diff --git a/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c b/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
>index 8b0aeb89025a..23cf517bec39 100644
>--- a/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
>+++ b/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
>@@ -94,8 +94,27 @@ mes_userq_create_wptr_mapping(struct amdgpu_device *adev,
> 		return ret;
> 	}
> 
>-	queue->wptr_obj.gpu_addr = amdgpu_bo_gpu_offset_no_check(wptr_obj->obj);
>+	ret = amdgpu_bo_reserve(wptr_obj->obj, true);
>+	if (ret) {
>+		DRM_ERROR("Failed to reserve wptr bo\n");
>+		return ret;
>+	}
>+
>+	ret = amdgpu_bo_pin(wptr_obj->obj, AMDGPU_GEM_DOMAIN_GTT);
>+	if (ret) {
>+		drm_file_err(uq_mgr->file, "[Usermode queues] Failed to pin wptr bo\n");
>+		goto unresv_bo;
>+	}
>+
>+	queue->wptr_obj.gpu_addr = amdgpu_bo_gpu_offset(wptr_obj->obj);
>+	amdgpu_bo_unreserve(wptr_obj->obj);
>+
> 	return 0;
>+
>+unresv_bo:
>+	amdgpu_bo_unreserve(wptr_obj->obj);
>+	return ret;
>+
> }
> 
> static int convert_to_mes_priority(int priority)
>-- 
>2.43.0
>

--
Saleem

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^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH v3] drm/amdgpu: do not use amdgpu_bo_gpu_offset_no_check individually
  2025-11-30  9:04 [PATCH v3] drm/amdgpu: do not use amdgpu_bo_gpu_offset_no_check individually Saleemkhan Jamadar
  2025-12-04  9:20 ` Saleemkhan
@ 2025-12-11 10:40 ` Christian König
  1 sibling, 0 replies; 5+ messages in thread
From: Christian König @ 2025-12-11 10:40 UTC (permalink / raw)
  To: Saleemkhan Jamadar, alexander.deucher, amd-gfx

On 11/30/25 10:04, Saleemkhan Jamadar wrote:
> This should not be used indiviually, use amdgpu_bo_gpu_offset
> with bo reserved.
> 
> v3 - unpin bo in queue destroy (Christian)
> v2 - pin bo so that offset returned won't change after unlock (Christian)
> 
> Signed-off-by: Saleemkhan Jamadar <saleemkhan083@gmail.com>
> Suggested-by: Christian König <christian.koenig@amd.com>
> ---
>  .../gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c  |  2 +-
>  drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c     |  8 +++++++
>  drivers/gpu/drm/amd/amdgpu/mes_userqueue.c    | 21 ++++++++++++++++++-
>  3 files changed, 29 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c
> index 3040437d99c2..bc7858567321 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c
> @@ -129,7 +129,7 @@ uint32_t amdgpu_doorbell_index_on_bar(struct amdgpu_device *adev,
>  {
>  	int db_bo_offset;
>  
> -	db_bo_offset = amdgpu_bo_gpu_offset_no_check(db_bo);
> +	db_bo_offset = amdgpu_bo_gpu_offset(db_bo);
>  
>  	/* doorbell index is 32 bit but doorbell's size can be 32 bit
>  	 * or 64 bit, so *db_size(in byte)/4 for alignment.
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c
> index 2f97f35e0af5..98110f543307 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c
> @@ -586,6 +586,14 @@ amdgpu_userq_destroy(struct drm_file *filp, int queue_id)
>  		amdgpu_bo_unreserve(queue->db_obj.obj);
>  	}
>  	amdgpu_bo_unref(&queue->db_obj.obj);
> +
> +	r = amdgpu_bo_reserve(queue->wptr_obj.obj, true);
> +	if (!r) {
> +		amdgpu_bo_unpin(queue->wptr_obj.obj);
> +		amdgpu_bo_unreserve(queue->wptr_obj.obj);
> +	}
> +	amdgpu_bo_unref(&queue->wptr_obj.obj);
> +
>  	atomic_dec(&uq_mgr->userq_count[queue->queue_type]);
>  #if defined(CONFIG_DEBUG_FS)
>  	debugfs_remove_recursive(queue->debugfs_queue);
> diff --git a/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c b/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
> index 8b0aeb89025a..23cf517bec39 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
> @@ -94,8 +94,27 @@ mes_userq_create_wptr_mapping(struct amdgpu_device *adev,
>  		return ret;
>  	}
>  
> -	queue->wptr_obj.gpu_addr = amdgpu_bo_gpu_offset_no_check(wptr_obj->obj);
> +	ret = amdgpu_bo_reserve(wptr_obj->obj, true);
> +	if (ret) {
> +		DRM_ERROR("Failed to reserve wptr bo\n");
> +		return ret;
> +	}
> +

Please add a comment here: /* TODO use eviction fence instead of pinning. */

With that done patch is Reviewed-by: Christian König <christian.koenig@amd.com>

Thanks,
Christian.

> +	ret = amdgpu_bo_pin(wptr_obj->obj, AMDGPU_GEM_DOMAIN_GTT);
> +	if (ret) {
> +		drm_file_err(uq_mgr->file, "[Usermode queues] Failed to pin wptr bo\n");
> +		goto unresv_bo;
> +	}
> +
> +	queue->wptr_obj.gpu_addr = amdgpu_bo_gpu_offset(wptr_obj->obj);
> +	amdgpu_bo_unreserve(wptr_obj->obj);
> +
>  	return 0;
> +
> +unresv_bo:
> +	amdgpu_bo_unreserve(wptr_obj->obj);
> +	return ret;
> +
>  }
>  
>  static int convert_to_mes_priority(int priority)


^ permalink raw reply	[flat|nested] 5+ messages in thread

* [PATCH v3] drm/amdgpu: do not use amdgpu_bo_gpu_offset_no_check individually
@ 2025-12-11 17:36 Saleemkhan Jamadar
  2025-12-11 18:22 ` Alex Deucher
  0 siblings, 1 reply; 5+ messages in thread
From: Saleemkhan Jamadar @ 2025-12-11 17:36 UTC (permalink / raw)
  To: Christian.Koenig, alexander.deucher, amd-gfx, saleemkhan083
  Cc: Christian König

This should not be used indiviually, use amdgpu_bo_gpu_offset
with bo reserved.

v3 - unpin bo in queue destroy (Christian)
v2 - pin bo so that offset returned won't change after unlock (Christian)

Signed-off-by: Saleemkhan Jamadar <saleemkhan083@gmail.com>
Suggested-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
---
 .../gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c  |  2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c     |  8 +++++++
 drivers/gpu/drm/amd/amdgpu/mes_userqueue.c    | 22 ++++++++++++++++++-
 3 files changed, 30 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c
index 3040437d99c2..bc7858567321 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c
@@ -129,7 +129,7 @@ uint32_t amdgpu_doorbell_index_on_bar(struct amdgpu_device *adev,
 {
 	int db_bo_offset;
 
-	db_bo_offset = amdgpu_bo_gpu_offset_no_check(db_bo);
+	db_bo_offset = amdgpu_bo_gpu_offset(db_bo);
 
 	/* doorbell index is 32 bit but doorbell's size can be 32 bit
 	 * or 64 bit, so *db_size(in byte)/4 for alignment.
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c
index bff39dcb4068..f8e66f6e8c09 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c
@@ -586,6 +586,14 @@ amdgpu_userq_destroy(struct drm_file *filp, int queue_id)
 		amdgpu_bo_unreserve(queue->db_obj.obj);
 	}
 	amdgpu_bo_unref(&queue->db_obj.obj);
+
+	r = amdgpu_bo_reserve(queue->wptr_obj.obj, true);
+	if (!r) {
+		amdgpu_bo_unpin(queue->wptr_obj.obj);
+		amdgpu_bo_unreserve(queue->wptr_obj.obj);
+	}
+	amdgpu_bo_unref(&queue->wptr_obj.obj);
+
 	atomic_dec(&uq_mgr->userq_count[queue->queue_type]);
 #if defined(CONFIG_DEBUG_FS)
 	debugfs_remove_recursive(queue->debugfs_queue);
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c b/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
index 8b0aeb89025a..f2309d72bbe6 100644
--- a/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
+++ b/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
@@ -94,8 +94,28 @@ mes_userq_create_wptr_mapping(struct amdgpu_device *adev,
 		return ret;
 	}
 
-	queue->wptr_obj.gpu_addr = amdgpu_bo_gpu_offset_no_check(wptr_obj->obj);
+	ret = amdgpu_bo_reserve(wptr_obj->obj, true);
+	if (ret) {
+		DRM_ERROR("Failed to reserve wptr bo\n");
+		return ret;
+	}
+
+	/* TODO use eviction fence instead of pinning. */
+	ret = amdgpu_bo_pin(wptr_obj->obj, AMDGPU_GEM_DOMAIN_GTT);
+	if (ret) {
+		drm_file_err(uq_mgr->file, "[Usermode queues] Failed to pin wptr bo\n");
+		goto unresv_bo;
+	}
+
+	queue->wptr_obj.gpu_addr = amdgpu_bo_gpu_offset(wptr_obj->obj);
+	amdgpu_bo_unreserve(wptr_obj->obj);
+
 	return 0;
+
+unresv_bo:
+	amdgpu_bo_unreserve(wptr_obj->obj);
+	return ret;
+
 }
 
 static int convert_to_mes_priority(int priority)
-- 
2.43.0


^ permalink raw reply related	[flat|nested] 5+ messages in thread

* Re: [PATCH v3] drm/amdgpu: do not use amdgpu_bo_gpu_offset_no_check individually
  2025-12-11 17:36 Saleemkhan Jamadar
@ 2025-12-11 18:22 ` Alex Deucher
  0 siblings, 0 replies; 5+ messages in thread
From: Alex Deucher @ 2025-12-11 18:22 UTC (permalink / raw)
  To: Saleemkhan Jamadar; +Cc: Christian.Koenig, alexander.deucher, amd-gfx

Applied.  Thanks!

On Thu, Dec 11, 2025 at 12:44 PM Saleemkhan Jamadar
<saleemkhan083@gmail.com> wrote:
>
> This should not be used indiviually, use amdgpu_bo_gpu_offset
> with bo reserved.
>
> v3 - unpin bo in queue destroy (Christian)
> v2 - pin bo so that offset returned won't change after unlock (Christian)
>
> Signed-off-by: Saleemkhan Jamadar <saleemkhan083@gmail.com>
> Suggested-by: Christian König <christian.koenig@amd.com>
> Reviewed-by: Christian König <christian.koenig@amd.com>
> ---
>  .../gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c  |  2 +-
>  drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c     |  8 +++++++
>  drivers/gpu/drm/amd/amdgpu/mes_userqueue.c    | 22 ++++++++++++++++++-
>  3 files changed, 30 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c
> index 3040437d99c2..bc7858567321 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c
> @@ -129,7 +129,7 @@ uint32_t amdgpu_doorbell_index_on_bar(struct amdgpu_device *adev,
>  {
>         int db_bo_offset;
>
> -       db_bo_offset = amdgpu_bo_gpu_offset_no_check(db_bo);
> +       db_bo_offset = amdgpu_bo_gpu_offset(db_bo);
>
>         /* doorbell index is 32 bit but doorbell's size can be 32 bit
>          * or 64 bit, so *db_size(in byte)/4 for alignment.
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c
> index bff39dcb4068..f8e66f6e8c09 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c
> @@ -586,6 +586,14 @@ amdgpu_userq_destroy(struct drm_file *filp, int queue_id)
>                 amdgpu_bo_unreserve(queue->db_obj.obj);
>         }
>         amdgpu_bo_unref(&queue->db_obj.obj);
> +
> +       r = amdgpu_bo_reserve(queue->wptr_obj.obj, true);
> +       if (!r) {
> +               amdgpu_bo_unpin(queue->wptr_obj.obj);
> +               amdgpu_bo_unreserve(queue->wptr_obj.obj);
> +       }
> +       amdgpu_bo_unref(&queue->wptr_obj.obj);
> +
>         atomic_dec(&uq_mgr->userq_count[queue->queue_type]);
>  #if defined(CONFIG_DEBUG_FS)
>         debugfs_remove_recursive(queue->debugfs_queue);
> diff --git a/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c b/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
> index 8b0aeb89025a..f2309d72bbe6 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
> @@ -94,8 +94,28 @@ mes_userq_create_wptr_mapping(struct amdgpu_device *adev,
>                 return ret;
>         }
>
> -       queue->wptr_obj.gpu_addr = amdgpu_bo_gpu_offset_no_check(wptr_obj->obj);
> +       ret = amdgpu_bo_reserve(wptr_obj->obj, true);
> +       if (ret) {
> +               DRM_ERROR("Failed to reserve wptr bo\n");
> +               return ret;
> +       }
> +
> +       /* TODO use eviction fence instead of pinning. */
> +       ret = amdgpu_bo_pin(wptr_obj->obj, AMDGPU_GEM_DOMAIN_GTT);
> +       if (ret) {
> +               drm_file_err(uq_mgr->file, "[Usermode queues] Failed to pin wptr bo\n");
> +               goto unresv_bo;
> +       }
> +
> +       queue->wptr_obj.gpu_addr = amdgpu_bo_gpu_offset(wptr_obj->obj);
> +       amdgpu_bo_unreserve(wptr_obj->obj);
> +
>         return 0;
> +
> +unresv_bo:
> +       amdgpu_bo_unreserve(wptr_obj->obj);
> +       return ret;
> +
>  }
>
>  static int convert_to_mes_priority(int priority)
> --
> 2.43.0
>

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2025-12-11 18:22 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-11-30  9:04 [PATCH v3] drm/amdgpu: do not use amdgpu_bo_gpu_offset_no_check individually Saleemkhan Jamadar
2025-12-04  9:20 ` Saleemkhan
2025-12-11 10:40 ` Christian König
  -- strict thread matches above, loose matches on Subject: below --
2025-12-11 17:36 Saleemkhan Jamadar
2025-12-11 18:22 ` Alex Deucher

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