* [PATCH] drm/amdgpu: force to use CPU_ACCESS hint optimization
@ 2019-03-06 11:52 Chunming Zhou
[not found] ` <20190306115250.21217-1-david1.zhou-5C7GfCeVMHo@public.gmane.org>
0 siblings, 1 reply; 5+ messages in thread
From: Chunming Zhou @ 2019-03-06 11:52 UTC (permalink / raw)
To: Christian.Koenig-5C7GfCeVMHo,
amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Cc: Chunming Zhou
As we know, visible vram can be placed to invisible when no cpu access.
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 8 +++-----
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index bc62bf41b7e9..823deb66f5da 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -592,8 +592,7 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
vram_gtt.vram_size = adev->gmc.real_vram_size -
atomic64_read(&adev->vram_pin_size);
- vram_gtt.vram_cpu_accessible_size = adev->gmc.visible_vram_size -
- atomic64_read(&adev->visible_pin_size);
+ vram_gtt.vram_cpu_accessible_size = vram_gtt.vram_size;
vram_gtt.gtt_size = adev->mman.bdev.man[TTM_PL_TT].size;
vram_gtt.gtt_size *= PAGE_SIZE;
vram_gtt.gtt_size -= atomic64_read(&adev->gart_pin_size);
@@ -612,9 +611,8 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
mem.vram.max_allocation = mem.vram.usable_heap_size * 3 / 4;
mem.cpu_accessible_vram.total_heap_size =
- adev->gmc.visible_vram_size;
- mem.cpu_accessible_vram.usable_heap_size = adev->gmc.visible_vram_size -
- atomic64_read(&adev->visible_pin_size);
+ mem.vram.total_heap_size;
+ mem.cpu_accessible_vram.usable_heap_size = mem.vram.usable_heap_size;
mem.cpu_accessible_vram.heap_usage =
amdgpu_vram_mgr_vis_usage(&adev->mman.bdev.man[TTM_PL_VRAM]);
mem.cpu_accessible_vram.max_allocation =
--
2.17.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH] drm/amdgpu: force to use CPU_ACCESS hint optimization
[not found] ` <20190306115250.21217-1-david1.zhou-5C7GfCeVMHo@public.gmane.org>
@ 2019-03-06 11:55 ` Christian König
[not found] ` <5ff670c0-6279-98cd-56c1-db792693ead9-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
0 siblings, 1 reply; 5+ messages in thread
From: Christian König @ 2019-03-06 11:55 UTC (permalink / raw)
To: Chunming Zhou, Christian.Koenig-5C7GfCeVMHo,
amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Am 06.03.19 um 12:52 schrieb Chunming Zhou:
> As we know, visible vram can be placed to invisible when no cpu access.
>
> Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 8 +++-----
> 1 file changed, 3 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> index bc62bf41b7e9..823deb66f5da 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> @@ -592,8 +592,7 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
>
> vram_gtt.vram_size = adev->gmc.real_vram_size -
> atomic64_read(&adev->vram_pin_size);
> - vram_gtt.vram_cpu_accessible_size = adev->gmc.visible_vram_size -
> - atomic64_read(&adev->visible_pin_size);
> + vram_gtt.vram_cpu_accessible_size = vram_gtt.vram_size;
Well, NAK that would of course report the full VRAM as visible which
isn't correct.
Christian.
> vram_gtt.gtt_size = adev->mman.bdev.man[TTM_PL_TT].size;
> vram_gtt.gtt_size *= PAGE_SIZE;
> vram_gtt.gtt_size -= atomic64_read(&adev->gart_pin_size);
> @@ -612,9 +611,8 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
> mem.vram.max_allocation = mem.vram.usable_heap_size * 3 / 4;
>
> mem.cpu_accessible_vram.total_heap_size =
> - adev->gmc.visible_vram_size;
> - mem.cpu_accessible_vram.usable_heap_size = adev->gmc.visible_vram_size -
> - atomic64_read(&adev->visible_pin_size);
> + mem.vram.total_heap_size;
> + mem.cpu_accessible_vram.usable_heap_size = mem.vram.usable_heap_size;
> mem.cpu_accessible_vram.heap_usage =
> amdgpu_vram_mgr_vis_usage(&adev->mman.bdev.man[TTM_PL_VRAM]);
> mem.cpu_accessible_vram.max_allocation =
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
* RE: [PATCH] drm/amdgpu: force to use CPU_ACCESS hint optimization
[not found] ` <5ff670c0-6279-98cd-56c1-db792693ead9-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
@ 2019-03-06 12:00 ` Zhou, David(ChunMing)
[not found] ` <MN2PR12MB2910C1E01F48480A034E1E82B4730-rweVpJHSKTr1t3MqfsnKMAdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
0 siblings, 1 reply; 5+ messages in thread
From: Zhou, David(ChunMing) @ 2019-03-06 12:00 UTC (permalink / raw)
To: Koenig, Christian,
amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
> -----Original Message-----
> From: Christian König <ckoenig.leichtzumerken@gmail.com>
> Sent: Wednesday, March 06, 2019 7:55 PM
> To: Zhou, David(ChunMing) <David1.Zhou@amd.com>; Koenig, Christian
> <Christian.Koenig@amd.com>; amd-gfx@lists.freedesktop.org
> Subject: Re: [PATCH] drm/amdgpu: force to use CPU_ACCESS hint
> optimization
>
> Am 06.03.19 um 12:52 schrieb Chunming Zhou:
> > As we know, visible vram can be placed to invisible when no cpu access.
> >
> > Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
> > ---
> > drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 8 +++-----
> > 1 file changed, 3 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> > b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> > index bc62bf41b7e9..823deb66f5da 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> > @@ -592,8 +592,7 @@ static int amdgpu_info_ioctl(struct drm_device
> > *dev, void *data, struct drm_file
> >
> > vram_gtt.vram_size = adev->gmc.real_vram_size -
> > atomic64_read(&adev->vram_pin_size);
> > - vram_gtt.vram_cpu_accessible_size = adev-
> >gmc.visible_vram_size -
> > - atomic64_read(&adev->visible_pin_size);
> > + vram_gtt.vram_cpu_accessible_size = vram_gtt.vram_size;
>
> Well, NAK that would of course report the full VRAM as visible which isn't
> correct.
UMD also said same reason that they like report explicit vram info to application.
No idea to do that.
-David
>
> Christian.
>
> > vram_gtt.gtt_size = adev-
> >mman.bdev.man[TTM_PL_TT].size;
> > vram_gtt.gtt_size *= PAGE_SIZE;
> > vram_gtt.gtt_size -= atomic64_read(&adev->gart_pin_size);
> > @@ -612,9 +611,8 @@ static int amdgpu_info_ioctl(struct drm_device
> *dev, void *data, struct drm_file
> > mem.vram.max_allocation = mem.vram.usable_heap_size *
> 3 / 4;
> >
> > mem.cpu_accessible_vram.total_heap_size =
> > - adev->gmc.visible_vram_size;
> > - mem.cpu_accessible_vram.usable_heap_size = adev-
> >gmc.visible_vram_size -
> > - atomic64_read(&adev->visible_pin_size);
> > + mem.vram.total_heap_size;
> > + mem.cpu_accessible_vram.usable_heap_size =
> > +mem.vram.usable_heap_size;
> > mem.cpu_accessible_vram.heap_usage =
> > amdgpu_vram_mgr_vis_usage(&adev-
> >mman.bdev.man[TTM_PL_VRAM]);
> > mem.cpu_accessible_vram.max_allocation =
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] drm/amdgpu: force to use CPU_ACCESS hint optimization
[not found] ` <MN2PR12MB2910C1E01F48480A034E1E82B4730-rweVpJHSKTr1t3MqfsnKMAdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
@ 2019-03-06 12:30 ` Christian König
[not found] ` <1977ace8-19a7-2277-648b-d464fe46f2f7-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
0 siblings, 1 reply; 5+ messages in thread
From: Christian König @ 2019-03-06 12:30 UTC (permalink / raw)
To: Zhou, David(ChunMing), Koenig, Christian,
amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Am 06.03.19 um 13:00 schrieb Zhou, David(ChunMing):
>
>> -----Original Message-----
>> From: Christian König <ckoenig.leichtzumerken@gmail.com>
>> Sent: Wednesday, March 06, 2019 7:55 PM
>> To: Zhou, David(ChunMing) <David1.Zhou@amd.com>; Koenig, Christian
>> <Christian.Koenig@amd.com>; amd-gfx@lists.freedesktop.org
>> Subject: Re: [PATCH] drm/amdgpu: force to use CPU_ACCESS hint
>> optimization
>>
>> Am 06.03.19 um 12:52 schrieb Chunming Zhou:
>>> As we know, visible vram can be placed to invisible when no cpu access.
>>>
>>> Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
>>> ---
>>> drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 8 +++-----
>>> 1 file changed, 3 insertions(+), 5 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
>>> index bc62bf41b7e9..823deb66f5da 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
>>> @@ -592,8 +592,7 @@ static int amdgpu_info_ioctl(struct drm_device
>>> *dev, void *data, struct drm_file
>>>
>>> vram_gtt.vram_size = adev->gmc.real_vram_size -
>>> atomic64_read(&adev->vram_pin_size);
>>> - vram_gtt.vram_cpu_accessible_size = adev-
>>> gmc.visible_vram_size -
>>> - atomic64_read(&adev->visible_pin_size);
>>> + vram_gtt.vram_cpu_accessible_size = vram_gtt.vram_size;
>> Well, NAK that would of course report the full VRAM as visible which isn't
>> correct.
> UMD also said same reason that they like report explicit vram info to application.
Yeah, I mean that is a rather good argument. The application should
certainly know that.
> No idea to do that.
Well if I understood that correctly Vulkan had the same problem with
cached and uncached system memory. How is it handled there?
Christian.
>
> -David
>> Christian.
>>
>>> vram_gtt.gtt_size = adev-
>>> mman.bdev.man[TTM_PL_TT].size;
>>> vram_gtt.gtt_size *= PAGE_SIZE;
>>> vram_gtt.gtt_size -= atomic64_read(&adev->gart_pin_size);
>>> @@ -612,9 +611,8 @@ static int amdgpu_info_ioctl(struct drm_device
>> *dev, void *data, struct drm_file
>>> mem.vram.max_allocation = mem.vram.usable_heap_size *
>> 3 / 4;
>>> mem.cpu_accessible_vram.total_heap_size =
>>> - adev->gmc.visible_vram_size;
>>> - mem.cpu_accessible_vram.usable_heap_size = adev-
>>> gmc.visible_vram_size -
>>> - atomic64_read(&adev->visible_pin_size);
>>> + mem.vram.total_heap_size;
>>> + mem.cpu_accessible_vram.usable_heap_size =
>>> +mem.vram.usable_heap_size;
>>> mem.cpu_accessible_vram.heap_usage =
>>> amdgpu_vram_mgr_vis_usage(&adev-
>>> mman.bdev.man[TTM_PL_VRAM]);
>>> mem.cpu_accessible_vram.max_allocation =
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] drm/amdgpu: force to use CPU_ACCESS hint optimization
[not found] ` <1977ace8-19a7-2277-648b-d464fe46f2f7-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
@ 2019-03-06 13:37 ` Chunming Zhou
0 siblings, 0 replies; 5+ messages in thread
From: Chunming Zhou @ 2019-03-06 13:37 UTC (permalink / raw)
To: Koenig, Christian, Zhou, David(ChunMing),
amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
在 2019/3/6 20:30, Christian König 写道:
> Am 06.03.19 um 13:00 schrieb Zhou, David(ChunMing):
>>
>>> -----Original Message-----
>>> From: Christian König <ckoenig.leichtzumerken@gmail.com>
>>> Sent: Wednesday, March 06, 2019 7:55 PM
>>> To: Zhou, David(ChunMing) <David1.Zhou@amd.com>; Koenig, Christian
>>> <Christian.Koenig@amd.com>; amd-gfx@lists.freedesktop.org
>>> Subject: Re: [PATCH] drm/amdgpu: force to use CPU_ACCESS hint
>>> optimization
>>>
>>> Am 06.03.19 um 12:52 schrieb Chunming Zhou:
>>>> As we know, visible vram can be placed to invisible when no cpu
>>>> access.
>>>>
>>>> Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
>>>> ---
>>>> drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 8 +++-----
>>>> 1 file changed, 3 insertions(+), 5 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
>>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
>>>> index bc62bf41b7e9..823deb66f5da 100644
>>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
>>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
>>>> @@ -592,8 +592,7 @@ static int amdgpu_info_ioctl(struct drm_device
>>>> *dev, void *data, struct drm_file
>>>>
>>>> vram_gtt.vram_size = adev->gmc.real_vram_size -
>>>> atomic64_read(&adev->vram_pin_size);
>>>> - vram_gtt.vram_cpu_accessible_size = adev-
>>>> gmc.visible_vram_size -
>>>> - atomic64_read(&adev->visible_pin_size);
>>>> + vram_gtt.vram_cpu_accessible_size = vram_gtt.vram_size;
>>> Well, NAK that would of course report the full VRAM as visible which
>>> isn't
>>> correct.
>> UMD also said same reason that they like report explicit vram info to
>> application.
>
> Yeah, I mean that is a rather good argument. The application should
> certainly know that.
>
>> No idea to do that.
>
> Well if I understood that correctly Vulkan had the same problem with
> cached and uncached system memory. How is it handled there?
Which problem with cached and uncached system memory?
-David
>
> Christian.
>
>>
>> -David
>>> Christian.
>>>
>>>> vram_gtt.gtt_size = adev-
>>>> mman.bdev.man[TTM_PL_TT].size;
>>>> vram_gtt.gtt_size *= PAGE_SIZE;
>>>> vram_gtt.gtt_size -= atomic64_read(&adev->gart_pin_size);
>>>> @@ -612,9 +611,8 @@ static int amdgpu_info_ioctl(struct drm_device
>>> *dev, void *data, struct drm_file
>>>> mem.vram.max_allocation = mem.vram.usable_heap_size *
>>> 3 / 4;
>>>> mem.cpu_accessible_vram.total_heap_size =
>>>> - adev->gmc.visible_vram_size;
>>>> - mem.cpu_accessible_vram.usable_heap_size = adev-
>>>> gmc.visible_vram_size -
>>>> - atomic64_read(&adev->visible_pin_size);
>>>> + mem.vram.total_heap_size;
>>>> + mem.cpu_accessible_vram.usable_heap_size =
>>>> +mem.vram.usable_heap_size;
>>>> mem.cpu_accessible_vram.heap_usage =
>>>> amdgpu_vram_mgr_vis_usage(&adev-
>>>> mman.bdev.man[TTM_PL_VRAM]);
>>>> mem.cpu_accessible_vram.max_allocation =
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
>
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2019-03-06 13:37 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2019-03-06 11:52 [PATCH] drm/amdgpu: force to use CPU_ACCESS hint optimization Chunming Zhou
[not found] ` <20190306115250.21217-1-david1.zhou-5C7GfCeVMHo@public.gmane.org>
2019-03-06 11:55 ` Christian König
[not found] ` <5ff670c0-6279-98cd-56c1-db792693ead9-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2019-03-06 12:00 ` Zhou, David(ChunMing)
[not found] ` <MN2PR12MB2910C1E01F48480A034E1E82B4730-rweVpJHSKTr1t3MqfsnKMAdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2019-03-06 12:30 ` Christian König
[not found] ` <1977ace8-19a7-2277-648b-d464fe46f2f7-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2019-03-06 13:37 ` Chunming Zhou
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox