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* [PATCH] drm/amdgpu: do not use amdgpu_bo_gpu_offset_no_check individually
@ 2025-11-03 15:24 Saleemkhan Jamadar
  2025-11-03 15:26 ` Christian König
  0 siblings, 1 reply; 3+ messages in thread
From: Saleemkhan Jamadar @ 2025-11-03 15:24 UTC (permalink / raw)
  To: Christian.Koenig, alexander.deucher, amd-gfx, saleemkhan083
  Cc: Christian König

This should not be used indiviually, use amdgpu_bo_gpu_offset
with bo reserved.

Signed-off-by: Saleemkhan Jamadar <saleemkhan083@gmail.com>
Suggested-by: Christian König <christian.koenig@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c |  2 +-
 drivers/gpu/drm/amd/amdgpu/mes_userqueue.c       | 10 +++++++++-
 2 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c
index 3040437d99c2..bc7858567321 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c
@@ -129,7 +129,7 @@ uint32_t amdgpu_doorbell_index_on_bar(struct amdgpu_device *adev,
 {
 	int db_bo_offset;
 
-	db_bo_offset = amdgpu_bo_gpu_offset_no_check(db_bo);
+	db_bo_offset = amdgpu_bo_gpu_offset(db_bo);
 
 	/* doorbell index is 32 bit but doorbell's size can be 32 bit
 	 * or 64 bit, so *db_size(in byte)/4 for alignment.
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c b/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
index b1ee9473d628..0a244f80426c 100644
--- a/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
+++ b/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
@@ -93,7 +93,15 @@ mes_userq_create_wptr_mapping(struct amdgpu_userq_mgr *uq_mgr,
 		return ret;
 	}
 
-	queue->wptr_obj.gpu_addr = amdgpu_bo_gpu_offset_no_check(wptr_obj->obj);
+	ret = amdgpu_bo_reserve(wptr_obj->obj, true);
+	if (ret) {
+		DRM_ERROR("Failed to reserve wptr bo\n");
+		return ret;
+	}
+
+	queue->wptr_obj.gpu_addr = amdgpu_bo_gpu_offset(wptr_obj->obj);
+	amdgpu_bo_unreserve(wptr_obj->obj);
+
 	return 0;
 }
 
-- 
2.43.0


^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH] drm/amdgpu: do not use amdgpu_bo_gpu_offset_no_check individually
  2025-11-03 15:24 [PATCH] drm/amdgpu: do not use amdgpu_bo_gpu_offset_no_check individually Saleemkhan Jamadar
@ 2025-11-03 15:26 ` Christian König
  2025-11-03 21:00   ` Alex Deucher
  0 siblings, 1 reply; 3+ messages in thread
From: Christian König @ 2025-11-03 15:26 UTC (permalink / raw)
  To: Saleemkhan Jamadar, alexander.deucher, amd-gfx



On 11/3/25 16:24, Saleemkhan Jamadar wrote:
> This should not be used indiviually, use amdgpu_bo_gpu_offset
> with bo reserved.
> 
> Signed-off-by: Saleemkhan Jamadar <saleemkhan083@gmail.com>
> Suggested-by: Christian König <christian.koenig@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c |  2 +-
>  drivers/gpu/drm/amd/amdgpu/mes_userqueue.c       | 10 +++++++++-
>  2 files changed, 10 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c
> index 3040437d99c2..bc7858567321 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c
> @@ -129,7 +129,7 @@ uint32_t amdgpu_doorbell_index_on_bar(struct amdgpu_device *adev,
>  {
>  	int db_bo_offset;
>  
> -	db_bo_offset = amdgpu_bo_gpu_offset_no_check(db_bo);
> +	db_bo_offset = amdgpu_bo_gpu_offset(db_bo);
>  
>  	/* doorbell index is 32 bit but doorbell's size can be 32 bit
>  	 * or 64 bit, so *db_size(in byte)/4 for alignment.
> diff --git a/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c b/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
> index b1ee9473d628..0a244f80426c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
> @@ -93,7 +93,15 @@ mes_userq_create_wptr_mapping(struct amdgpu_userq_mgr *uq_mgr,
>  		return ret;
>  	}
>  
> -	queue->wptr_obj.gpu_addr = amdgpu_bo_gpu_offset_no_check(wptr_obj->obj);
> +	ret = amdgpu_bo_reserve(wptr_obj->obj, true);
> +	if (ret) {
> +		DRM_ERROR("Failed to reserve wptr bo\n");
> +		return ret;
> +	}
> +
> +	queue->wptr_obj.gpu_addr = amdgpu_bo_gpu_offset(wptr_obj->obj);
> +	amdgpu_bo_unreserve(wptr_obj->obj);

The problem here is that the return value of amdgpu_bo_gpu_offset() can change as soon as you unlock the BO.

So that wptr BO either need to be pinned or fenced for this to work.

Regards,
Christian.

> +
>  	return 0;
>  }
>  


^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH] drm/amdgpu: do not use amdgpu_bo_gpu_offset_no_check individually
  2025-11-03 15:26 ` Christian König
@ 2025-11-03 21:00   ` Alex Deucher
  0 siblings, 0 replies; 3+ messages in thread
From: Alex Deucher @ 2025-11-03 21:00 UTC (permalink / raw)
  To: Christian König; +Cc: Saleemkhan Jamadar, alexander.deucher, amd-gfx

On Mon, Nov 3, 2025 at 2:11 PM Christian König <christian.koenig@amd.com> wrote:
>
>
>
> On 11/3/25 16:24, Saleemkhan Jamadar wrote:
> > This should not be used indiviually, use amdgpu_bo_gpu_offset
> > with bo reserved.
> >
> > Signed-off-by: Saleemkhan Jamadar <saleemkhan083@gmail.com>
> > Suggested-by: Christian König <christian.koenig@amd.com>
> > ---
> >  drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c |  2 +-
> >  drivers/gpu/drm/amd/amdgpu/mes_userqueue.c       | 10 +++++++++-
> >  2 files changed, 10 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c
> > index 3040437d99c2..bc7858567321 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c
> > @@ -129,7 +129,7 @@ uint32_t amdgpu_doorbell_index_on_bar(struct amdgpu_device *adev,
> >  {
> >       int db_bo_offset;
> >
> > -     db_bo_offset = amdgpu_bo_gpu_offset_no_check(db_bo);
> > +     db_bo_offset = amdgpu_bo_gpu_offset(db_bo);
> >
> >       /* doorbell index is 32 bit but doorbell's size can be 32 bit
> >        * or 64 bit, so *db_size(in byte)/4 for alignment.
> > diff --git a/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c b/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
> > index b1ee9473d628..0a244f80426c 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
> > @@ -93,7 +93,15 @@ mes_userq_create_wptr_mapping(struct amdgpu_userq_mgr *uq_mgr,
> >               return ret;
> >       }
> >
> > -     queue->wptr_obj.gpu_addr = amdgpu_bo_gpu_offset_no_check(wptr_obj->obj);
> > +     ret = amdgpu_bo_reserve(wptr_obj->obj, true);
> > +     if (ret) {
> > +             DRM_ERROR("Failed to reserve wptr bo\n");
> > +             return ret;
> > +     }
> > +
> > +     queue->wptr_obj.gpu_addr = amdgpu_bo_gpu_offset(wptr_obj->obj);
> > +     amdgpu_bo_unreserve(wptr_obj->obj);
>
> The problem here is that the return value of amdgpu_bo_gpu_offset() can change as soon as you unlock the BO.
>
> So that wptr BO either need to be pinned or fenced for this to work.

amdgpu_amdkfd_map_gtt_bo_to_gart() and mes_userq_map_gtt_bo_to_gart()
differ in how they handle this.  amdgpu_amdkfd_map_gtt_bo_to_gart()
pins the BO while mes_userq_map_gtt_bo_to_gart() does not.

Alex

>
> Regards,
> Christian.
>
> > +
> >       return 0;
> >  }
> >
>

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2025-11-03 21:01 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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2025-11-03 15:24 [PATCH] drm/amdgpu: do not use amdgpu_bo_gpu_offset_no_check individually Saleemkhan Jamadar
2025-11-03 15:26 ` Christian König
2025-11-03 21:00   ` Alex Deucher

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