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* [PATCH] drm/amd/display: Add DPCS regs for dcn3 link encoder
@ 2020-08-24 15:11 Bhawanpreet Lakha
  2020-08-24 15:20 ` Deucher, Alexander
  2020-08-24 15:27 ` Kazlauskas, Nicholas
  0 siblings, 2 replies; 3+ messages in thread
From: Bhawanpreet Lakha @ 2020-08-24 15:11 UTC (permalink / raw)
  To: alexander.deucher
  Cc: Bhawanpreet Lakha, rodrigo.siqueira, nicholas.kazlauskas, amd-gfx

dpcs reg are missing for dcn3 link encoder regs list, so add them.

Also remove
DPCSTX_DEBUG_CONFIG and RDPCSTX_DEBUG_CONFIG as they are unused and
cause compile errors for dcn3

Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
---
 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.h | 2 --
 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c     | 1 +
 2 files changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.h b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.h
index dcbf28dd72d4..864acd695cbb 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.h
@@ -231,8 +231,6 @@
 	SRI(RDPCSTX_PHY_FUSE3, RDPCSTX, id), \
 	SRI(DPCSTX_TX_CLOCK_CNTL, DPCSTX, id), \
 	SRI(DPCSTX_TX_CNTL, DPCSTX, id), \
-	SRI(DPCSTX_DEBUG_CONFIG, DPCSTX, id), \
-	SRI(RDPCSTX_DEBUG_CONFIG, RDPCSTX, id), \
 	SR(RDPCSTX0_RDPCSTX_SCRATCH)
 
 
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
index 957fc37b971e..8be4f21169d0 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
@@ -491,6 +491,7 @@ static const struct dcn10_link_enc_hpd_registers link_enc_hpd_regs[] = {
 [id] = {\
 	LE_DCN3_REG_LIST(id), \
 	UNIPHY_DCN2_REG_LIST(phyid), \
+	DPCS_DCN2_REG_LIST(id), \
 	SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \
 }
 
-- 
2.17.1

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https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 3+ messages in thread
* Re: [PATCH] drm/amd/display: Add DPCS regs for dcn3 link encoder
  2020-08-24 15:11 [PATCH] drm/amd/display: Add DPCS regs for dcn3 link encoder Bhawanpreet Lakha
@ 2020-08-24 15:20 ` Deucher, Alexander
  2020-08-24 15:27 ` Kazlauskas, Nicholas
  1 sibling, 0 replies; 3+ messages in thread
From: Deucher, Alexander @ 2020-08-24 15:20 UTC (permalink / raw)
  To: Lakha, Bhawanpreet
  Cc: Siqueira, Rodrigo, Kazlauskas, Nicholas,
	amd-gfx@lists.freedesktop.org


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[AMD Official Use Only - Internal Distribution Only]

Acked-by: Alex Deucher <alexander.deucher@amd.com>
________________________________
From: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Sent: Monday, August 24, 2020 11:11 AM
To: Deucher, Alexander <Alexander.Deucher@amd.com>
Cc: Siqueira, Rodrigo <Rodrigo.Siqueira@amd.com>; Kazlauskas, Nicholas <Nicholas.Kazlauskas@amd.com>; amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>; Lakha, Bhawanpreet <Bhawanpreet.Lakha@amd.com>
Subject: [PATCH] drm/amd/display: Add DPCS regs for dcn3 link encoder

dpcs reg are missing for dcn3 link encoder regs list, so add them.

Also remove
DPCSTX_DEBUG_CONFIG and RDPCSTX_DEBUG_CONFIG as they are unused and
cause compile errors for dcn3

Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
---
 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.h | 2 --
 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c     | 1 +
 2 files changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.h b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.h
index dcbf28dd72d4..864acd695cbb 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.h
@@ -231,8 +231,6 @@
         SRI(RDPCSTX_PHY_FUSE3, RDPCSTX, id), \
         SRI(DPCSTX_TX_CLOCK_CNTL, DPCSTX, id), \
         SRI(DPCSTX_TX_CNTL, DPCSTX, id), \
-       SRI(DPCSTX_DEBUG_CONFIG, DPCSTX, id), \
-       SRI(RDPCSTX_DEBUG_CONFIG, RDPCSTX, id), \
         SR(RDPCSTX0_RDPCSTX_SCRATCH)


diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
index 957fc37b971e..8be4f21169d0 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
@@ -491,6 +491,7 @@ static const struct dcn10_link_enc_hpd_registers link_enc_hpd_regs[] = {
 [id] = {\
         LE_DCN3_REG_LIST(id), \
         UNIPHY_DCN2_REG_LIST(phyid), \
+       DPCS_DCN2_REG_LIST(id), \
         SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \
 }

--
2.17.1


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_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 3+ messages in thread
* Re: [PATCH] drm/amd/display: Add DPCS regs for dcn3 link encoder
  2020-08-24 15:11 [PATCH] drm/amd/display: Add DPCS regs for dcn3 link encoder Bhawanpreet Lakha
  2020-08-24 15:20 ` Deucher, Alexander
@ 2020-08-24 15:27 ` Kazlauskas, Nicholas
  1 sibling, 0 replies; 3+ messages in thread
From: Kazlauskas, Nicholas @ 2020-08-24 15:27 UTC (permalink / raw)
  To: Bhawanpreet Lakha, alexander.deucher; +Cc: rodrigo.siqueira, amd-gfx

On 2020-08-24 11:11 a.m., Bhawanpreet Lakha wrote:
> dpcs reg are missing for dcn3 link encoder regs list, so add them.
> 
> Also remove
> DPCSTX_DEBUG_CONFIG and RDPCSTX_DEBUG_CONFIG as they are unused and
> cause compile errors for dcn3
> 
> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>

Regards,
Nicholas Kazlauskas

> ---
>   drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.h | 2 --
>   drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c     | 1 +
>   2 files changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.h b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.h
> index dcbf28dd72d4..864acd695cbb 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.h
> +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.h
> @@ -231,8 +231,6 @@
>   	SRI(RDPCSTX_PHY_FUSE3, RDPCSTX, id), \
>   	SRI(DPCSTX_TX_CLOCK_CNTL, DPCSTX, id), \
>   	SRI(DPCSTX_TX_CNTL, DPCSTX, id), \
> -	SRI(DPCSTX_DEBUG_CONFIG, DPCSTX, id), \
> -	SRI(RDPCSTX_DEBUG_CONFIG, RDPCSTX, id), \
>   	SR(RDPCSTX0_RDPCSTX_SCRATCH)
>   
>   
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
> index 957fc37b971e..8be4f21169d0 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
> @@ -491,6 +491,7 @@ static const struct dcn10_link_enc_hpd_registers link_enc_hpd_regs[] = {
>   [id] = {\
>   	LE_DCN3_REG_LIST(id), \
>   	UNIPHY_DCN2_REG_LIST(phyid), \
> +	DPCS_DCN2_REG_LIST(id), \
>   	SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \
>   }
>   
> 

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https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 3+ messages in thread
end of thread, other threads:[~2020-08-24 15:27 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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2020-08-24 15:11 [PATCH] drm/amd/display: Add DPCS regs for dcn3 link encoder Bhawanpreet Lakha
2020-08-24 15:20 ` Deucher, Alexander
2020-08-24 15:27 ` Kazlauskas, Nicholas

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