From: "Christian König" <ckoenig.leichtzumerken@gmail.com>
To: Peng Ju Zhou <PengJu.Zhou@amd.com>, amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH v2 12/12] drm/amdgpu: Refine the error report when flush tlb.
Date: Thu, 29 Apr 2021 13:28:56 +0200 [thread overview]
Message-ID: <ec0ac02e-565d-39f4-ea91-f4f59e8efbb7@gmail.com> (raw)
In-Reply-To: <20210429102644.31172-12-PengJu.Zhou@amd.com>
Am 29.04.21 um 12:26 schrieb Peng Ju Zhou:
> there are 2 hubs to flush in the gmc, to make it easier
> to debug when hub flush failed, refine the logs.
NAK, we can have more than just the two hubs.
See gmc_v9_0_process_interrupt:
if (entry->client_id == SOC15_IH_CLIENTID_VMC) {
hub_name = "mmhub0";
hub = &adev->vmhub[AMDGPU_MMHUB_0];
} else if (entry->client_id == SOC15_IH_CLIENTID_VMC1) {
hub_name = "mmhub1";
hub = &adev->vmhub[AMDGPU_MMHUB_1];
} else {
hub_name = "gfxhub0";
hub = &adev->vmhub[AMDGPU_GFXHUB_0];
}
Maybe put the name into the hub structure as well.
Christian.
>
> Signed-off-by: Peng Ju Zhou <PengJu.Zhou@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> index c25541112663..33cd487741f7 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> @@ -297,7 +297,8 @@ static void gmc_v10_0_flush_vm_hub(struct amdgpu_device *adev, uint32_t vmid,
> if (i < adev->usec_timeout)
> return;
>
> - DRM_ERROR("Timeout waiting for VM flush ACK!\n");
> + DRM_ERROR("Timeout waiting for VM flush hub: %s!\n",
> + vmhub == AMDGPU_GFXHUB_0 ? "gfxhub" : "mmhub");
> }
>
> /**
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next prev parent reply other threads:[~2021-04-29 11:29 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-29 10:26 [PATCH v2 01/12] drm/amdgpu: Indirect register access for Navi12 sriov Peng Ju Zhou
2021-04-29 10:26 ` [PATCH v2 02/12] drm/amdgpu: Modify GC register access from MMIO to RLCG in file gfx_v10* Peng Ju Zhou
2021-04-29 10:26 ` [PATCH v2 03/12] drm/amdgpu: Modify GC register access from MMIO to RLCG in file kfd_v10* Peng Ju Zhou
2021-04-29 10:26 ` [PATCH v2 04/12] drm/amdgpu: Modify GC register access from MMIO to RLCG in file soc15.c Peng Ju Zhou
2021-04-29 10:26 ` [PATCH v2 05/12] drm/amdgpu: Modify GC register access from MMIO to RLCG in file sdma_v5* Peng Ju Zhou
2021-04-29 10:26 ` [PATCH v2 06/12] drm/amdgpu: Modify GC register access from MMIO to RLCG in file nv.c Peng Ju Zhou
2021-04-29 10:26 ` [PATCH v2 07/12] drm/amdgpu: Modify GC register access from MMIO to RLCG in file amdgpu_gmc.c Peng Ju Zhou
2021-04-29 10:26 ` [PATCH v2 08/12] drm/amdgpu: Modify MMHUB register access from MMIO to RLCG in file mmhub_v2* Peng Ju Zhou
2021-04-29 10:26 ` [PATCH v2 09/12] drm/amdgpu: Use PSP to program IH_RB_CNTL* registers Peng Ju Zhou
2021-04-29 10:26 ` [PATCH v2 10/12] drm/amdgpu: Skip the program of MMMC_VM_AGP_* in SRIOV Peng Ju Zhou
2021-04-29 10:26 ` [PATCH v2 11/12] drm/amdgpu: Skip the program of GRBM_CAM* " Peng Ju Zhou
2021-04-29 10:26 ` [PATCH v2 12/12] drm/amdgpu: Refine the error report when flush tlb Peng Ju Zhou
2021-04-29 11:28 ` Christian König [this message]
2021-04-30 3:55 ` Zhou, Peng Ju
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