Re: [PATCH 4/5] drm/amdgpu/sdma: Use common SDMA legacy queue reset on SDMA v4.4.2

["Lazar, Lijo" <lijo.lazar@amd.com>]

On 28-Aug-26 9:06 PM, Timur Kristóf wrote:
> On Friday, August 28, 2026 4:16:15 PM Central European Summer Time Lazar, Lijo
> wrote:
>> On 28-Aug-26 5:37 PM, Timur Kristóf wrote:
>>> Besides sharing code, this additionally adds support for
>>> restoring queue contents after the reset.
>>>
>>> Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
>>> ---
>>>
>>>    drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c | 18 ++----------------
>>>    1 file changed, 2 insertions(+), 16 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
>>> b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c index
>>> 72ea9db939b4..023821848531 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
>>> @@ -1655,20 +1655,6 @@ static bool sdma_v4_4_2_is_queue_selected(struct
>>> amdgpu_device *adev, uint32_t i>
>>>    	return (context_status & SDMA_GFX_CONTEXT_STATUS__SELECTED_MASK)
> != 0;
>>>    
>>>    }
>>>
>>> -static int sdma_v4_4_2_reset_queue(struct amdgpu_ring *ring,
>>> -				   unsigned int vmid,
>>> -				   struct amdgpu_fence
> *timedout_fence)
>>> -{
>>> -	struct amdgpu_device *adev = ring->adev;
>>> -	u32 id = ring->me;
>>> -	int r;
>>> -
>>> -	amdgpu_amdkfd_suspend(adev, true);
>>> -	r = amdgpu_sdma_reset_engine(adev, id, false);
>>
>> The common one passes true, so this doesn't look right.
>>    	amdgpu_sdma_reset_engine(adev, ring->me, true);
>>
>>
>> Thanks,
>> Lijo
> 
> Can you please elaborate more on what you are suggesting here?
> The caller of the queue reset is amdgpu_job_timedout() and that function
> already handles kernel queues.
> 
> 

It passes a false here which takes care of both paging and gfx rings. 
The one in job timeout is a generic one which only looks at the hung ring.

Thanks,
Lijo

>>
>>> -	amdgpu_amdkfd_resume(adev, true);
>>> -	return r;
>>> -}
>>> -
>>>
>>>    static int sdma_v4_4_2_stop_queue(struct amdgpu_ring *ring)
>>>    {
>>>    
>>>    	struct amdgpu_device *adev = ring->adev;
>>>
>>> @@ -2133,7 +2119,7 @@ static const struct amdgpu_ring_funcs
>>> sdma_v4_4_2_ring_funcs = {>
>>>    	.emit_wreg = sdma_v4_4_2_ring_emit_wreg,
>>>    	.emit_reg_wait = sdma_v4_4_2_ring_emit_reg_wait,
>>>    	.emit_reg_write_reg_wait =
> amdgpu_ring_emit_reg_write_reg_wait_helper,
>>>
>>> -	.reset = sdma_v4_4_2_reset_queue,
>>> +	.reset = amdgpu_sdma_reset_queue_legacy,
>>>
>>>    };
>>>    
>>>    static const struct amdgpu_ring_funcs sdma_v4_4_2_page_ring_funcs = {
>>>
>>> @@ -2165,7 +2151,7 @@ static const struct amdgpu_ring_funcs
>>> sdma_v4_4_2_page_ring_funcs = {>
>>>    	.emit_wreg = sdma_v4_4_2_ring_emit_wreg,
>>>    	.emit_reg_wait = sdma_v4_4_2_ring_emit_reg_wait,
>>>    	.emit_reg_write_reg_wait =
> amdgpu_ring_emit_reg_write_reg_wait_helper,
>>>
>>> -	.reset = sdma_v4_4_2_reset_queue,
>>> +	.reset = amdgpu_sdma_reset_queue_legacy,
>>>
>>>    };
>>>    
>>>    static void sdma_v4_4_2_set_ring_funcs(struct amdgpu_device *adev)
> 
> 
> 
>