From: Kalle Valo <kvalo@qca.qualcomm.com>
To: Michal Kazior <michal.kazior@tieto.com>
Cc: linux-wireless <linux-wireless@vger.kernel.org>,
ath10k@lists.infradead.org
Subject: Re: [PATCH v2 6/8] ath10k: implement ath10k_pci_soc_read/write32()
Date: Wed, 16 Oct 2013 18:55:50 +0300 [thread overview]
Message-ID: <87txgh5hx5.fsf@kamboji.qca.qualcomm.com> (raw)
In-Reply-To: <CA+BoTQmP14xuXP=D4mEsJiWOXvtg0iJ4=BmUb=89QgA_AX5edA@mail.gmail.com> (Michal Kazior's message of "Wed, 16 Oct 2013 08:38:43 -0700")
Michal Kazior <michal.kazior@tieto.com> writes:
> On 16 October 2013 06:46, Kalle Valo <kvalo@qca.qualcomm.com> wrote:
>> To make it easier to access SOC registers. No functional
>> changes.
>>
>> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
>> ---
>> drivers/net/wireless/ath/ath10k/pci.c | 3 +--
>> drivers/net/wireless/ath/ath10k/pci.h | 10 ++++++++++
>> 2 files changed, 11 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/net/wireless/ath/ath10k/pci.c b/drivers/net/wireless/ath/ath10k/pci.c
>> index d09f8a2..5c78383 100644
>> --- a/drivers/net/wireless/ath/ath10k/pci.c
>> +++ b/drivers/net/wireless/ath/ath10k/pci.c
>> @@ -2454,8 +2454,7 @@ static int ath10k_pci_probe(struct pci_dev *pdev,
>> return ret;
>> }
>>
>> - chip_id = ath10k_pci_read32(ar,
>> - RTC_SOC_BASE_ADDRESS + SOC_CHIP_ID_ADDRESS);
>> + chip_id = ath10k_pci_soc_read32(ar, SOC_CHIP_ID_ADDRESS);
>>
>> ath10k_do_pci_sleep(ar);
>>
>> diff --git a/drivers/net/wireless/ath/ath10k/pci.h b/drivers/net/wireless/ath/ath10k/pci.h
>> index 52fb7b9..a304c33 100644
>> --- a/drivers/net/wireless/ath/ath10k/pci.h
>> +++ b/drivers/net/wireless/ath/ath10k/pci.h
>> @@ -318,6 +318,16 @@ static inline u32 ath10k_pci_read32(struct ath10k *ar, u32 offset)
>> return ioread32(ar_pci->mem + offset);
>> }
>>
>> +static inline u32 ath10k_pci_soc_read32(struct ath10k *ar, u32 addr)
>> +{
>> + return ath10k_pci_read32(ar, RTC_SOC_BASE_ADDRESS + addr);
>> +}
>> +
>> +static inline void ath10k_pci_soc_write32(struct ath10k *ar, u32 addr, u32 val)
>> +{
>> + ath10k_pci_write32(ar, RTC_SOC_BASE_ADDRESS + addr, val);
>> +}
>> +
>
> I'm not entirely sure about this. There are a couple of soc address
> groups (RTC_SOC, RTC_WMAC, SOC_PCIE, SOC_CORE, ..).
And then we can have different functions for each group.
> I'd rather use just raw ioread/iowrite than have all those wrappers.
Well, I again would prefer to have clean interfaces instead of doing
address arithmetic in every call :)
> I think the reason for having ath10k_pci_{read,write}32 was the HW v1
> workaround.
No, it was also to make the code simple.
> Do we really need to keep it?
In my opinion yes. What is the negative side of keeping them? Why don't
you like these wrappers?
--
Kalle Valo
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next prev parent reply other threads:[~2013-10-16 15:56 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-10-16 13:45 [PATCH v2 0/8] ath10k: fixes 2013-10-15 Kalle Valo
2013-10-16 13:45 ` [PATCH v2 1/8] ath10k: prevent starting monitor without a vdev Kalle Valo
2013-10-16 13:45 ` [PATCH v2 2/8] ath10k: add sanity checks for monitor management Kalle Valo
2013-10-16 13:45 ` [PATCH v2 3/8] ath10k: fix endianess in prints Kalle Valo
2013-10-16 13:45 ` [PATCH v2 4/8] ath10k: fix NSS reporting in RX Kalle Valo
2013-10-16 13:46 ` [PATCH v2 5/8] ath10k: fix NULL deref upon early FW crash Kalle Valo
2013-10-16 13:46 ` [PATCH v2 6/8] ath10k: implement ath10k_pci_soc_read/write32() Kalle Valo
2013-10-16 15:38 ` Michal Kazior
2013-10-16 15:55 ` Kalle Valo [this message]
2013-10-16 13:46 ` [PATCH v2 7/8] ath10k: fix device initialization routine Kalle Valo
2013-10-16 15:44 ` Michal Kazior
2013-10-16 15:57 ` Kalle Valo
2013-10-16 16:01 ` Michal Kazior
2013-10-17 5:33 ` Kalle Valo
2013-10-16 13:46 ` [PATCH v2 8/8] ath10k: fix FW crashes on heavy TX on 10.1.389 AP FW Kalle Valo
2013-10-21 14:15 ` [PATCH v2 0/8] ath10k: fixes 2013-10-15 Kalle Valo
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