* [PATCH 1/4] ARM: mvebu_defconfig: oldconfig
From: Uwe Kleine-König @ 2016-09-15 10:38 UTC (permalink / raw)
To: barebox; +Cc: Thomas Petazzoni, Ezequiel Garcia
In-Reply-To: <1473935897-9252-1-git-send-email-u.kleine-koenig@pengutronix.de>
This is the result of
make mvebu_defconfig
make savedefconfig
mv defconfig arch/arm/configs/mvebu_defconfig
.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
arch/arm/configs/mvebu_defconfig | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/configs/mvebu_defconfig b/arch/arm/configs/mvebu_defconfig
index bd978a9acbe2..faaeb1de8476 100644
--- a/arch/arm/configs/mvebu_defconfig
+++ b/arch/arm/configs/mvebu_defconfig
@@ -17,7 +17,13 @@ CONFIG_HUSH_FANCY_PROMPT=y
CONFIG_CMDLINE_EDITING=y
CONFIG_AUTO_COMPLETE=y
CONFIG_MENU=y
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_VERBOSE=y
+CONFIG_BOOTM_INITRD=y
+CONFIG_BOOTM_OFTREE=y
+CONFIG_BOOTM_OFTREE_UIMAGE=y
CONFIG_BLSPEC=y
+CONFIG_FLEXIBLE_BOOTARGS=y
CONFIG_IMD_TARGET=y
CONFIG_CONSOLE_ACTIVATE_NONE=y
CONFIG_PARTITION_DISK_EFI=y
@@ -26,13 +32,7 @@ CONFIG_CMD_IOMEM=y
CONFIG_CMD_IMD=y
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_ARM_MMUINFO=y
-CONFIG_FLEXIBLE_BOOTARGS=y
CONFIG_CMD_BOOT=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_VERBOSE=y
-CONFIG_BOOTM_INITRD=y
-CONFIG_BOOTM_OFTREE=y
-CONFIG_BOOTM_OFTREE_UIMAGE=y
CONFIG_CMD_GO=y
CONFIG_CMD_LOADS=y
CONFIG_CMD_LOADY=y
--
2.8.1
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* [PATCH 3/4] ARM: mvebu: select HAVE_DEFAULT_ENVIRONMENT_NEW
From: Uwe Kleine-König @ 2016-09-15 10:38 UTC (permalink / raw)
To: barebox; +Cc: Thomas Petazzoni, Ezequiel Garcia
In-Reply-To: <1473935897-9252-1-git-send-email-u.kleine-koenig@pengutronix.de>
None of the available boards for mvebu has any environment additions, so
this is safe.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
arch/arm/Kconfig | 1 +
arch/arm/configs/mvebu_defconfig | 2 ++
2 files changed, 3 insertions(+)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 150320c6af86..3c5572e700bb 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -125,6 +125,7 @@ config ARCH_MVEBU
select CLKDEV_LOOKUP
select GPIOLIB
select HAS_DEBUG_LL
+ select HAVE_DEFAULT_ENVIRONMENT_NEW
select HAVE_PBL_MULTI_IMAGES
select HW_HAS_PCI
select MVEBU_MBUS
diff --git a/arch/arm/configs/mvebu_defconfig b/arch/arm/configs/mvebu_defconfig
index 9998ce42d6b0..39e7ef1798f5 100644
--- a/arch/arm/configs/mvebu_defconfig
+++ b/arch/arm/configs/mvebu_defconfig
@@ -123,6 +123,8 @@ CONFIG_GPIO_ORION=y
CONFIG_PCI_MVEBU=y
CONFIG_FS_CRAMFS=y
CONFIG_FS_EXT4=y
+CONFIG_FS_TFTP=y
+CONFIG_FS_NFS=y
CONFIG_FS_FAT=y
CONFIG_FS_FAT_WRITE=y
CONFIG_FS_FAT_LFN=y
--
2.8.1
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* Re: [PATCH 1/2] state: don't keep pointers to any device tree data
From: Michael Olbrich @ 2016-09-15 9:06 UTC (permalink / raw)
To: barebox
In-Reply-To: <20160915081336.fgw53sbm3youxupt@pengutronix.de>
On Thu, Sep 15, 2016 at 10:13:36AM +0200, Sascha Hauer wrote:
> On Thu, Sep 15, 2016 at 08:10:13AM +0200, Michael Olbrich wrote:
> > Caching pointers to device tree nodes or names is not save. The barebox
> > internal device tree may be changed by loading a new device tree or through
> > fixup handlers.
> > Use local copies of the full path instead and resolve the node as needed.
> >
>
> This should be two patches, one for backend->of_path and one
> state->root. When reviewing this I first had to understand that this
> patch has two unrelated changes.
Ok.
> > Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de>
> > ---
> > common/state/backend.c | 3 ++-
> > common/state/state.c | 19 ++++++++++++-------
> > common/state/state.h | 4 ++--
> > 3 files changed, 16 insertions(+), 10 deletions(-)
> >
> > diff --git a/common/state/backend.c b/common/state/backend.c
> > index 2f2e6dfd32d1..5235bb0283dd 100644
> > --- a/common/state/backend.c
> > +++ b/common/state/backend.c
> > @@ -164,7 +164,7 @@ int state_backend_init(struct state_backend *backend, struct device_d *dev,
> > if (ret)
> > goto out_free_format;
> >
> > - backend->of_path = of_path;
> > + backend->of_path = xstrdup(of_path);
> >
> > return 0;
> >
> > @@ -185,4 +185,5 @@ void state_backend_free(struct state_backend *backend)
> > state_storage_free(&backend->storage);
> > if (backend->format)
> > state_format_free(backend->format);
> > + free(backend->of_path);
> > }
> > diff --git a/common/state/state.c b/common/state/state.c
> > index 9b1d4edef132..0c329cd67548 100644
> > --- a/common/state/state.c
> > +++ b/common/state/state.c
> > @@ -202,15 +202,19 @@ struct device_node *state_to_node(struct state *state,
> > enum state_convert conv)
> > {
> > struct device_node *child;
> > - struct device_node *root;
> > + struct device_node *root, *state_root;
> > int ret;
> >
> > - root = of_new_node(parent, state->root->name);
> > + state_root = of_find_node_by_path(state->of_path);
> > + if (!state_root)
> > + return ERR_PTR(-ENODEV);
>
> Shouldn't you create the node if it's not there in the target device
> tree?
This looks for the node in the barebox internal device tree, not the target
device tree. If this node is missing, then state does not work any more.
Michael
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* Re: [PATCH 1/2] state: don't keep pointers to any device tree data
From: Sascha Hauer @ 2016-09-15 8:13 UTC (permalink / raw)
To: Michael Olbrich; +Cc: barebox
In-Reply-To: <20160915061014.16943-1-m.olbrich@pengutronix.de>
On Thu, Sep 15, 2016 at 08:10:13AM +0200, Michael Olbrich wrote:
> Caching pointers to device tree nodes or names is not save. The barebox
> internal device tree may be changed by loading a new device tree or through
> fixup handlers.
> Use local copies of the full path instead and resolve the node as needed.
>
This should be two patches, one for backend->of_path and one
state->root. When reviewing this I first had to understand that this
patch has two unrelated changes.
> Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de>
> ---
> common/state/backend.c | 3 ++-
> common/state/state.c | 19 ++++++++++++-------
> common/state/state.h | 4 ++--
> 3 files changed, 16 insertions(+), 10 deletions(-)
>
> diff --git a/common/state/backend.c b/common/state/backend.c
> index 2f2e6dfd32d1..5235bb0283dd 100644
> --- a/common/state/backend.c
> +++ b/common/state/backend.c
> @@ -164,7 +164,7 @@ int state_backend_init(struct state_backend *backend, struct device_d *dev,
> if (ret)
> goto out_free_format;
>
> - backend->of_path = of_path;
> + backend->of_path = xstrdup(of_path);
>
> return 0;
>
> @@ -185,4 +185,5 @@ void state_backend_free(struct state_backend *backend)
> state_storage_free(&backend->storage);
> if (backend->format)
> state_format_free(backend->format);
> + free(backend->of_path);
> }
> diff --git a/common/state/state.c b/common/state/state.c
> index 9b1d4edef132..0c329cd67548 100644
> --- a/common/state/state.c
> +++ b/common/state/state.c
> @@ -202,15 +202,19 @@ struct device_node *state_to_node(struct state *state,
> enum state_convert conv)
> {
> struct device_node *child;
> - struct device_node *root;
> + struct device_node *root, *state_root;
> int ret;
>
> - root = of_new_node(parent, state->root->name);
> + state_root = of_find_node_by_path(state->of_path);
> + if (!state_root)
> + return ERR_PTR(-ENODEV);
Shouldn't you create the node if it's not there in the target device
tree?
Sascha
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* Re: [PATCH v2] ARM: imx6: reset PLL2's PFD2 on i.MX6D
From: Sascha Hauer @ 2016-09-15 8:01 UTC (permalink / raw)
To: Uwe Kleine-König; +Cc: barebox
In-Reply-To: <1473848225-19039-1-git-send-email-u.kleine-koenig@pengutronix.de>
On Wed, Sep 14, 2016 at 12:17:05PM +0200, Uwe Kleine-König wrote:
> The check for is_imx6q was introduced initially in
>
> f1f6d76370b3 ("ARM: i.MX6: correct work flow of PFDs from uboot-sources")
>
> to differentiate between i.MX6DL+i.MX6SL and i.MX6Q. The i.MX6D must be
> handled like the latter, so drop the check. i.MX6DL+i.MX6SL can be
> ignored here since since
>
> a66596282413 ("imx6: lowlevel_init: Fix workaround for new i.MX6s chips")
>
> the PFD handling is only done for i.MX6DQ.
>
> Update the comment to be not only logically correct but also helpful.
>
> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Applied, thanks
Sascha
--
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* Re: [PATCH 04/12] ARM: i.MX53 Vincell: Add PBL console support
From: Sascha Hauer @ 2016-09-15 8:00 UTC (permalink / raw)
To: Michael Grzeschik; +Cc: Barebox List
In-Reply-To: <20160914092450.xd5xrsf37qb3odxm@pengutronix.de>
On Wed, Sep 14, 2016 at 11:24:50AM +0200, Michael Grzeschik wrote:
> On Wed, Sep 14, 2016 at 11:12:40AM +0200, Sascha Hauer wrote:
> > PBL console support is more useful than debug_ll. Add support
> > for it to the Vincell Board.
> >
> > Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> > ---
> > arch/arm/boards/guf-vincell/lowlevel.c | 50 ++++++++++++++++++++--------------
> > 1 file changed, 29 insertions(+), 21 deletions(-)
> >
> > diff --git a/arch/arm/boards/guf-vincell/lowlevel.c b/arch/arm/boards/guf-vincell/lowlevel.c
> > index af7c65d..3985dd7 100644
> > --- a/arch/arm/boards/guf-vincell/lowlevel.c
> > +++ b/arch/arm/boards/guf-vincell/lowlevel.c
> > @@ -11,6 +11,7 @@
> > #include <mach/generic.h>
> > #include <asm/barebox-arm.h>
> > #include <asm/barebox-arm-head.h>
> > +#include <asm/cache.h>
> >
> > #define IOMUX_PADCTL_DDRI_DDR (1 << 9)
> >
> > @@ -123,12 +124,16 @@ void disable_watchdog(void)
> > writew(0x0, MX53_WDOG2_BASE_ADDR + 8);
> > }
> >
> > -static noinline void imx53_guf_vincell_init(void *fdt)
> > +extern char __dtb_imx53_guf_vincell_lt_start[];
> > +extern char __dtb_imx53_guf_vincell_start[];
> > +
> > +static noinline void imx53_guf_vincell_init(int is_lt)
> > {
> > void __iomem *ccm = (void *)MX53_CCM_BASE_ADDR;
> > + void __iomem *uart = IOMEM(MX53_UART4_BASE_ADDR);
>
> This should be MX53_UART2_BASE_ADDR to be consistent with
> linux,stdout-path in imx53-guf-vincell.dts and imx53-guf-vincell-lt.dts.
Yes. Fixed.
Sascha
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* Re: errors copying UBI volumes
From: Sascha Hauer @ 2016-09-15 7:56 UTC (permalink / raw)
To: iw3gtf; +Cc: barebox
In-Reply-To: <1875844407.837557.1473868352073.JavaMail.ngmail@webmail09.arcor-online.net>
Hi Giorgio,
On Wed, Sep 14, 2016 at 05:52:32PM +0200, iw3gtf@arcor.de wrote:
> Hi,
>
> I'm working on an embedded board with an iMX25 arm CPU and a nand flash.
>
> The board runs a linux kernel/userland.
>
> When the user updates the firmware, the running userland/kernel creates some
> new ubi volumes on the nand, let's say 'kernel_next' and 'userland_next'.
> On the next system reboot barebox looks if it finds, lets say, the 'kernel_next' volume
> and, in this case, it removes the old one ('kernel'), creates a new, empty one ('kernel'),
> copies 'kernel_next' to the just created 'kernel' and finally removes the 'kernel_next'
> to complete the update.
While this should work, why so complicated? Since this commit:
| commit 892abde56c1c5a62d49d8b70c73e5d388e74345d
| Author: Richard Weinberger <richard@nod.at>
| Date: Mon Nov 24 22:30:10 2014 +0100
|
| UBI: rename_volumes: Use UBI_METAONLY
|
| By using UBI_METAONLY in rename_volumes() it is now possible to rename
| an UBI volume atomically while it is open for writing.
| This is useful for firmware upgrades.
It should be possible to just remove 'kernel' and rename 'kernel_next' to 'kernel'
without bootloader intervention.
BTW you should consider using Bootloader Spec entries
(http://www.barebox.org/doc/latest/user/booting-linux.html#bootloader-spec).
This makes the kernel volume unnecessary and the kernel will only be a file
in UBIFS and thus updating is a matter of 'cp newkernel /boot/kernel'.
Also booting in barebox becomes as simple as 'boot nand0.ubi.rootfs', no
further configuration or scripting required.
>
> Here the relevant part of the init script:
>
> ...
> if [ -e $kernel_next ]; then
> echo "Update the kernel... "
> ubirmvol $ubi_root kernel
> ubimkvol $ubi_root kernel 8M
> cp $kernel_next $kernel
> if [ $? != 0 ]; then
> echo "***Errors copying $kernel_next to $kernel"
> sleep 2
> else
> echo "Update OK."
> ubirmvol $ubi_root kernel_next
> fi
> fi
> ...
>
> Now, after updating the barebox version to the current one, v2016.09.0, the 'cp' command
> produces an almost endless sequence of failed assertions and stask backtraces:
>
> ...
> UBI assert failed in ubi_eba_read_leb at 359
> Function entered at [<87053010>] from [<87018ce0>]
> Function entered at [<87018ce0>] from [<87017fb4>]
> Function entered at [<87017fb4>] from [<8703f100>]
> Function entered at [<8703f100>] from [<8703f2cc>]
> Function entered at [<8703f2cc>] from [<8703faf8>]
> Function entered at [<8703faf8>] from [<87039e78>]
> Function entered at [<87039e78>] from [<87029178>]
> Function entered at [<87029178>] from [<87003614>]
> Function entered at [<87003614>] from [<87008e0c>]
> Function entered at [<87008e0c>] from [<870083a0>]
> Function entered at [<870083a0>] from [<8700908c>]
> Function entered at [<8700908c>] from [<870011cc>]
> Function entered at [<870011cc>] from [<870515d4>]
> Function entered at [<870515d4>] from [<80052648>]
> UBI assert failed in ubi_eba_read_leb at 359
> Function entered at [<87053010>] from [<87018ce0>]
> Function entered at [<87018ce0>] from [<87017fb4>]
> Function entered at [<87017fb4>] from [<8703f100>]
> Function entered at [<8703f100>] from [<8703f2cc>]
> Function entered at [<8703f2cc>] from [<8703faf8>]
> Function entered at [<8703faf8>] from [<87039e78>]
> ...
Please enable KALLSYMS to make this readable.
>
> After trying different things I realized that 'cp' has problems
> only with UBI volumes that were created by the kernel/userland
> during the firmware update process; if I create a volume within
> barebox it just work as expected.
>
> Here is the source code snippet with the failing assertion:
> (file <barebox_root>/drivers/mtd/ubi/eba.c)
>
> int ubi_eba_read_leb(struct ubi_device *ubi, struct ubi_volume *vol, int lnum,
> void *buf, int offset, int len, int check)
> {
> ...
> pnum = vol->eba_tbl[lnum];
> if (pnum < 0) {
> /*
> * The logical eraseblock is not mapped, fill the whole buffer
> * with 0xFF bytes. The exception is static volumes for which
> * it is an error to read unmapped logical eraseblocks.
> */
> dbg_eba("read %d bytes from offset %d of LEB %d:%d (unmapped)",
> len, offset, vol_id, lnum);
> leb_read_unlock(ubi, vol_id, lnum);
> ubi_assert(vol->vol_type != UBI_STATIC_VOLUME);
> memset(buf, 0xFF, len);
> return 0;
> }
Have you created 'kernel_next' and/or 'userland_next' as static volume
(-t=static)? The comment above states that in static volumes you cannot
read unmapped logical eraseblocks. When wou do not completely fill
'kernel_next' with data then you can only read up to the point to which
it is filled, the remaining LEBs are unmapped and thus unreadable.
Note that when you hit the unmapped LEBs then you have already read all
data; the errors only occur on the free space. This is the reason you
can still boot the new system.
Sascha
--
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* Re: [PATCH 1/2] pbl: console: Make it work with multiple setup_c()
From: Sascha Hauer @ 2016-09-15 7:25 UTC (permalink / raw)
To: Trent Piepho; +Cc: Barebox List
In-Reply-To: <1473875075.4359.7.camel@rtred1test09.kymeta.local>
On Wed, Sep 14, 2016 at 05:41:06PM +0000, Trent Piepho wrote:
> On Wed, 2016-09-14 at 10:21 +0200, Sascha Hauer wrote:
> > +
> > +static void (*__putc)(void *ctx, int c) = INVALID_PTR;
> > +static void *putc_ctx = INVALID_PTR;
>
> There's also __attribute__ ((section(".data"))). U-boot uses that. It
> does make it clear why INVALID_PTR is not NULL.
That looks better indeed, see below.
>
> Also, could use ERR_PTR(-EINVAL).
I tried that before, but it doesn't work because ERR_PTR() is a function
and cannot be used to statically initialize variables.
Sascha
----------------------------8<---------------------------------------
From 80c55cb4837594a7db7f2cedb8e2f177e2697510 Mon Sep 17 00:00:00 2001
From: Sascha Hauer <s.hauer@pengutronix.de>
Date: Tue, 12 Jul 2016 12:18:05 +0200
Subject: [PATCH] pbl: console: Let console pointer survive BSS clearing
The PBL console support may be configured before the BSS segment
is cleared. Put the pointer into the data section so that it is
not affected by the BSS clearing.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
pbl/console.c | 15 ++++++++++-----
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/pbl/console.c b/pbl/console.c
index 4cefe748..007e4e4 100644
--- a/pbl/console.c
+++ b/pbl/console.c
@@ -1,8 +1,13 @@
#include <common.h>
#include <debug_ll.h>
+#include <linux/err.h>
-static void (*__putc)(void *ctx, int c);
-static void *putc_ctx;
+/*
+ * Put these in the data section so that they survive the clearing of the
+ * BSS segment.
+ */
+static __attribute__ ((section(".data"))) void (*__putc)(void *ctx, int c);
+static __attribute__ ((section(".data"))) void *putc_ctx;
/**
* pbl_set_putc() - setup UART used for PBL console
@@ -20,10 +25,10 @@ void pbl_set_putc(void (*putcf)(void *ctx, int c), void *ctx)
void console_putc(unsigned int ch, char c)
{
- if (!__putc)
- putc_ll(c);
- else
+ if (__putc)
__putc(putc_ctx, c);
+ else
+ putc_ll(c);
}
int console_puts(unsigned int ch, const char *str)
--
2.8.1
--
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* Re: [PATCH 2/2] ARM: Fix calling of arm_mem_barebox_image()
From: Sascha Hauer @ 2016-09-15 7:10 UTC (permalink / raw)
To: Trent Piepho; +Cc: Barebox List
In-Reply-To: <1473877833.4359.15.camel@rtred1test09.kymeta.local>
On Wed, Sep 14, 2016 at 06:27:04PM +0000, Trent Piepho wrote:
> On Wed, 2016-09-14 at 10:21 +0200, Sascha Hauer wrote:
> > arm_mem_barebox_image() is used to pick a suitable place where to
> > put the final image to. This is called from both the PBL uncompression
> > code and also from the final image. To make it work properly it is
> > crucial that it's called with the same arguments both times. Currently
>
> This code has changed since I was working with it, but wouldn't
> arm_mem_barebox_image() returning a different value from when the PBL
> code calls it versus barebox_non_pbl_start() just result in an
> unnecessary relocation of the uncompressed barebox from the PBL's choice
> to the main barebox choice?
That may work when both regions do not overlap.
>
>
> > it is called with the wrong image size from the PBL uncompression code.
> > The size passed to arm_mem_barebox_image() has to be the size of the
> > whole uncompressed image including the BSS segment size. The PBL code
> > calls it with the compressed image size instead and without the BSS
> > segment. This patch fixes this by reading the uncompressed image size
> > from the compressed binary (the uncompressed size is appended to the
> > end of the compressed binary by our compression wrappers). The size
> > of the BSS segment is unknown though by the PBL uncompression code,
> > so we introduce a maximum BSS size which is used instead.
>
> Could the size including BSS be appended? Seems like putting:
> size -A barebox | awk '$1==".bss"{print $2}'
> in the size_append function would do that pretty simply.
I already tried. Somehow I didn't like the result that much, see the
patch below. The patch also still misses the single pbl handling.
Sascha
--------------------8<--------------------
From ea6cf2609ee1285cf415f28ded2317f31ddec7b2 Mon Sep 17 00:00:00 2001
From: Sascha Hauer <s.hauer@pengutronix.de>
Date: Tue, 12 Jul 2016 12:45:42 +0200
Subject: [PATCH] wip
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/cpu/start.c | 19 +++++++++----------
arch/arm/cpu/uncompress.c | 11 +++++++++--
arch/arm/lib32/barebox.lds.S | 1 +
images/Makefile | 13 +++++++++++++
4 files changed, 32 insertions(+), 12 deletions(-)
diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
index f25e592..1ee669b 100644
--- a/arch/arm/cpu/start.c
+++ b/arch/arm/cpu/start.c
@@ -34,6 +34,7 @@
#include "mmu-early.h"
unsigned long arm_stack_top;
+static unsigned long arm_barebox_base;
static unsigned long arm_barebox_size;
static void *barebox_boarddata;
static unsigned long barebox_boarddata_size;
@@ -116,7 +117,7 @@ static inline unsigned long arm_mem_boarddata(unsigned long membase,
{
unsigned long mem;
- mem = arm_mem_barebox_image(membase, endmem, barebox_image_size);
+ mem = arm_barebox_base;
mem -= ALIGN(size, 64);
return mem;
@@ -143,15 +144,13 @@ __noreturn void barebox_non_pbl_start(unsigned long membase,
{
unsigned long endmem = membase + memsize;
unsigned long malloc_start, malloc_end;
- unsigned long barebox_size = barebox_image_size +
- ((unsigned long)&__bss_stop - (unsigned long)&__bss_start);
+ unsigned long barebox_size = ld_var(__bss_stop) - ld_var(_text);
+ unsigned long barebox_base;
- if (IS_ENABLED(CONFIG_RELOCATABLE)) {
- unsigned long barebox_base = arm_mem_barebox_image(membase,
- endmem,
- barebox_size);
+ barebox_base = arm_mem_barebox_image(membase, endmem, barebox_size);
+
+ if (IS_ENABLED(CONFIG_RELOCATABLE))
relocate_to_adr(barebox_base);
- }
setup_c();
@@ -161,8 +160,8 @@ __noreturn void barebox_non_pbl_start(unsigned long membase,
arm_stack_top = endmem;
arm_barebox_size = barebox_size;
- malloc_end = arm_mem_barebox_image(membase, endmem,
- arm_barebox_size);
+ arm_barebox_base = barebox_base;
+ malloc_end = barebox_base;
if (IS_ENABLED(CONFIG_MMU_EARLY)) {
unsigned long ttb = arm_mem_ttb(membase, endmem);
diff --git a/arch/arm/cpu/uncompress.c b/arch/arm/cpu/uncompress.c
index b8e2e9f..0c54bc5 100644
--- a/arch/arm/cpu/uncompress.c
+++ b/arch/arm/cpu/uncompress.c
@@ -29,6 +29,7 @@
#include <asm/sections.h>
#include <asm/pgtable.h>
#include <asm/cache.h>
+#include <asm/unaligned.h>
#include <debug_ll.h>
@@ -49,6 +50,7 @@ void __noreturn barebox_multi_pbl_start(unsigned long membase,
uint32_t endmem = membase + memsize;
unsigned long barebox_base;
uint32_t *image_end;
+ uint32_t full_size;
void *pg_start;
unsigned long pc = get_pc();
@@ -69,19 +71,24 @@ void __noreturn barebox_multi_pbl_start(unsigned long membase,
/*
* image_end is the first location after the executable. It contains
* the size of the appended compressed binary followed by the binary.
+ * The last 32bit word of the compressed binary contains the full size
+ * of the uncompressed barebox image including bss.
*/
pg_start = image_end + 1;
- pg_len = *(image_end);
+ pg_len = *(image_end) - sizeof(uint32_t);
+ full_size = get_unaligned_le32((void *)(pg_start + pg_len));
if (IS_ENABLED(CONFIG_RELOCATABLE))
barebox_base = arm_mem_barebox_image(membase, endmem,
- pg_len);
+ full_size);
else
barebox_base = TEXT_BASE;
setup_c();
pr_debug("memory at 0x%08lx, size 0x%08lx\n", membase, memsize);
+ pr_debug("barebox image has full size 0x%08x, putting image to 0x%08lx\n",
+ full_size, barebox_base);
if (IS_ENABLED(CONFIG_MMU_EARLY)) {
unsigned long ttb = arm_mem_ttb(membase, endmem);
diff --git a/arch/arm/lib32/barebox.lds.S b/arch/arm/lib32/barebox.lds.S
index 6dc8bd2..170b3b1 100644
--- a/arch/arm/lib32/barebox.lds.S
+++ b/arch/arm/lib32/barebox.lds.S
@@ -123,4 +123,5 @@ SECTIONS
__bss_stop = .;
_end = .;
_barebox_image_size = __bss_start - TEXT_BASE;
+ _barebox_full_size = __bss_stop - TEXT_BASE;
}
diff --git a/images/Makefile b/images/Makefile
index da9cc8d..98812ed 100644
--- a/images/Makefile
+++ b/images/Makefile
@@ -67,6 +67,18 @@ $(obj)/%.pbl: $(pbl-lds) $(barebox-pbl-common) FORCE
$(obj)/%.pblb: $(obj)/%.pbl FORCE
$(call if_changed,objcopy_bin,$(*F))
+barebox_full_size = printf $(shell \
+ hex_size=$$($(NM) $1 | awk '$$3 == "_barebox_full_size" { print $$1 }'); \
+ \
+echo $$hex_size | \
+ sed 's/\(..\)/\1 /g' | { \
+ read ch0 ch1 ch2 ch3; \
+ for ch in $$ch3 $$ch2 $$ch1 $$ch0; do \
+ printf '%s%03o' '\\' $$((0x$$ch)); \
+ done; \
+ } \
+)
+
quiet_cmd_pblx ?= PBLX $@
cmd_pblx ?= cat $(obj)/$(patsubst %.pblx,%.pblb,$(2)) > $@; \
$(call size_append, $(obj)/barebox.z) >> $@; \
@@ -91,6 +103,7 @@ suffix_$(CONFIG_IMAGE_COMPRESSION_NONE) = shipped
# ----------------------------------------------------------------
$(obj)/barebox.z: $(obj)/../barebox.bin FORCE
$(call if_changed,$(suffix_y))
+ $(call barebox_full_size, $(obj)/../barebox) >> $@
# %.img - create a copy from another file
# ----------------------------------------------------------------
--
2.8.1
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
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^ permalink raw reply related
* [PATCH 1/2] state: don't keep pointers to any device tree data
From: Michael Olbrich @ 2016-09-15 6:10 UTC (permalink / raw)
To: barebox; +Cc: Michael Olbrich
Caching pointers to device tree nodes or names is not save. The barebox
internal device tree may be changed by loading a new device tree or through
fixup handlers.
Use local copies of the full path instead and resolve the node as needed.
Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de>
---
common/state/backend.c | 3 ++-
common/state/state.c | 19 ++++++++++++-------
common/state/state.h | 4 ++--
3 files changed, 16 insertions(+), 10 deletions(-)
diff --git a/common/state/backend.c b/common/state/backend.c
index 2f2e6dfd32d1..5235bb0283dd 100644
--- a/common/state/backend.c
+++ b/common/state/backend.c
@@ -164,7 +164,7 @@ int state_backend_init(struct state_backend *backend, struct device_d *dev,
if (ret)
goto out_free_format;
- backend->of_path = of_path;
+ backend->of_path = xstrdup(of_path);
return 0;
@@ -185,4 +185,5 @@ void state_backend_free(struct state_backend *backend)
state_storage_free(&backend->storage);
if (backend->format)
state_format_free(backend->format);
+ free(backend->of_path);
}
diff --git a/common/state/state.c b/common/state/state.c
index 9b1d4edef132..0c329cd67548 100644
--- a/common/state/state.c
+++ b/common/state/state.c
@@ -202,15 +202,19 @@ struct device_node *state_to_node(struct state *state,
enum state_convert conv)
{
struct device_node *child;
- struct device_node *root;
+ struct device_node *root, *state_root;
int ret;
- root = of_new_node(parent, state->root->name);
+ state_root = of_find_node_by_path(state->of_path);
+ if (!state_root)
+ return ERR_PTR(-ENODEV);
+
+ root = of_new_node(parent, state_root->name);
ret = of_property_write_u32(root, "magic", state->magic);
if (ret)
goto out;
- for_each_child_of_node(state->root, child) {
+ for_each_child_of_node(state_root, child) {
ret = state_convert_node_variable(state, child, root, "", conv);
if (ret)
goto out;
@@ -234,7 +238,7 @@ int state_from_node(struct state *state, struct device_node *node, bool create)
if (create) {
conv = STATE_CONVERT_FROM_NODE_CREATE;
- state->root = node;
+ state->of_path = xstrdup(node->full_name);
state->magic = magic;
} else {
conv = STATE_CONVERT_FROM_NODE;
@@ -291,7 +295,7 @@ static int of_state_fixup(struct device_node *root, void *ctx)
int ret;
phandle phandle;
- node = of_find_node_by_path_from(root, state->root->full_name);
+ node = of_find_node_by_path_from(root, state->of_path);
if (node) {
/* replace existing node - it will be deleted later */
parent = node->parent;
@@ -299,7 +303,7 @@ static int of_state_fixup(struct device_node *root, void *ctx)
char *of_path, *c;
/* look for parent, remove last '/' from path */
- of_path = xstrdup(state->root->full_name);
+ of_path = xstrdup(state->of_path);
c = strrchr(of_path, '/');
if (!c)
return -ENODEV;
@@ -406,6 +410,7 @@ void state_release(struct state *state)
list_del(&state->list);
unregister_device(&state->dev);
state_backend_free(&state->backend);
+ free(state->of_path);
free(state);
}
@@ -545,7 +550,7 @@ struct state *state_by_node(const struct device_node *node)
struct state *state;
list_for_each_entry(state, &state_list, list) {
- if (state->root == node)
+ if (!strcmp(state->of_path, node->full_name))
return state;
}
diff --git a/common/state/state.h b/common/state/state.h
index 32146ca1bbc7..7b3e49512e37 100644
--- a/common/state/state.h
+++ b/common/state/state.h
@@ -87,14 +87,14 @@ struct state_backend_storage {
struct state_backend {
struct state_backend_format *format;
struct state_backend_storage storage;
- const char *of_path;
+ char *of_path;
};
struct state {
struct list_head list; /* Entry to enqueue on list of states */
struct device_d dev;
- struct device_node *root;
+ char *of_path;
const char *name;
uint32_t magic;
--
2.9.3
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^ permalink raw reply related
* [PATCH 2/2] state: fix finding the correct parent node
From: Michael Olbrich @ 2016-09-15 6:10 UTC (permalink / raw)
To: barebox; +Cc: Michael Olbrich
In-Reply-To: <20160915061014.16943-1-m.olbrich@pengutronix.de>
Looking for the parent node during fixup is broken. The path of the parent
node is not correctly terminated ('0' vs '\0'). Also, the new state node
should be added to the supplied device tree not the barebox device tree
used by of_find_node_by_path().
Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de>
---
common/state/state.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/common/state/state.c b/common/state/state.c
index 0c329cd67548..075618e5bb8f 100644
--- a/common/state/state.c
+++ b/common/state/state.c
@@ -307,8 +307,8 @@ static int of_state_fixup(struct device_node *root, void *ctx)
c = strrchr(of_path, '/');
if (!c)
return -ENODEV;
- *c = '0';
- parent = of_find_node_by_path(of_path);
+ *c = '\0';
+ parent = of_find_node_by_path_from(root, of_path);
if (!parent)
parent = root;
--
2.9.3
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^ permalink raw reply related
* [PATCH] mtd: make sure address-cells/size-cells are set when adding partition nodes
From: Michael Olbrich @ 2016-09-15 6:03 UTC (permalink / raw)
To: barebox; +Cc: Michael Olbrich
address-cells/size-cells can either be set to 1 or 2 for 32 or 63 bit
addresses respectively. Barebox currently writes 32 bit addresses.
This makes sure that address-cells/size-cells are both set and have the
correct value.
Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de>
---
Hi,
this is just a minor fix. What is really needed it support for 64 bit
addressing. Also, the bindings documentation says that all partitions
should be in a 'partitions' sub node. The main question here is probably
which kernel version introduced these features and what should be supported
by barebox.
Michael
drivers/mtd/core.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/mtd/core.c b/drivers/mtd/core.c
index 6d04b8855387..8d0e83415ae7 100644
--- a/drivers/mtd/core.c
+++ b/drivers/mtd/core.c
@@ -575,6 +575,14 @@ static int of_mtd_fixup(struct device_node *root, void *ctx)
of_delete_node(part);
}
+ ret = of_property_write_u32(np, "#address-cells", 1);
+ if (ret)
+ return ret;
+
+ ret = of_property_write_u32(np, "#size-cells", 1);
+ if (ret)
+ return ret;
+
list_for_each_entry(partmtd, &mtd->partitions, partitions_entry) {
int na, ns, len = 0;
char *name = basprintf("partition@%0llx",
--
2.8.1
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^ permalink raw reply related
* Re: [PATCH 2/2] ARM: Fix calling of arm_mem_barebox_image()
From: Trent Piepho @ 2016-09-14 18:27 UTC (permalink / raw)
To: Sascha Hauer; +Cc: Barebox List
In-Reply-To: <1473841313-4204-2-git-send-email-s.hauer@pengutronix.de>
On Wed, 2016-09-14 at 10:21 +0200, Sascha Hauer wrote:
> arm_mem_barebox_image() is used to pick a suitable place where to
> put the final image to. This is called from both the PBL uncompression
> code and also from the final image. To make it work properly it is
> crucial that it's called with the same arguments both times. Currently
This code has changed since I was working with it, but wouldn't
arm_mem_barebox_image() returning a different value from when the PBL
code calls it versus barebox_non_pbl_start() just result in an
unnecessary relocation of the uncompressed barebox from the PBL's choice
to the main barebox choice?
> it is called with the wrong image size from the PBL uncompression code.
> The size passed to arm_mem_barebox_image() has to be the size of the
> whole uncompressed image including the BSS segment size. The PBL code
> calls it with the compressed image size instead and without the BSS
> segment. This patch fixes this by reading the uncompressed image size
> from the compressed binary (the uncompressed size is appended to the
> end of the compressed binary by our compression wrappers). The size
> of the BSS segment is unknown though by the PBL uncompression code,
> so we introduce a maximum BSS size which is used instead.
Could the size including BSS be appended? Seems like putting:
size -A barebox | awk '$1==".bss"{print $2}'
in the size_append function would do that pretty simply.
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^ permalink raw reply
* Re: [PATCH 1/2] pbl: console: Make it work with multiple setup_c()
From: Trent Piepho @ 2016-09-14 17:41 UTC (permalink / raw)
To: Sascha Hauer; +Cc: Barebox List
In-Reply-To: <1473841290-3935-1-git-send-email-s.hauer@pengutronix.de>
On Wed, 2016-09-14 at 10:21 +0200, Sascha Hauer wrote:
> +
> +static void (*__putc)(void *ctx, int c) = INVALID_PTR;
> +static void *putc_ctx = INVALID_PTR;
There's also __attribute__ ((section(".data"))). U-boot uses that. It
does make it clear why INVALID_PTR is not NULL.
Also, could use ERR_PTR(-EINVAL).
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^ permalink raw reply
* Re: errors copying UBI volumes
From: Alexander Shiyan @ 2016-09-14 16:36 UTC (permalink / raw)
To: iw3gtf; +Cc: barebox
In-Reply-To: <1875844407.837557.1473868352073.JavaMail.ngmail@webmail09.arcor-online.net>
>Среда, 14 сентября 2016, 18:52 +03:00 от iw3gtf@arcor.de:
>
>Hi,
>
>I'm working on an embedded board with an iMX25 arm CPU and a nand flash.
>
>The board runs a linux kernel/userland.
>
>When the user updates the firmware, the running userland/kernel creates some
>new ubi volumes on the nand, let's say 'kernel_next' and 'userland_next'.
>On the next system reboot barebox looks if it finds, lets say, the 'kernel_next' volume
>and, in this case, it removes the old one ('kernel'), creates a new, empty one ('kernel'),
>copies 'kernel_next' to the just created 'kernel' and finally removes the 'kernel_next'
>to complete the update.
My comment is not related to this error,
but you may need to consider using ubiupdatevol command.
---
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^ permalink raw reply
* errors copying UBI volumes
From: iw3gtf @ 2016-09-14 15:52 UTC (permalink / raw)
To: barebox
Hi,
I'm working on an embedded board with an iMX25 arm CPU and a nand flash.
The board runs a linux kernel/userland.
When the user updates the firmware, the running userland/kernel creates some
new ubi volumes on the nand, let's say 'kernel_next' and 'userland_next'.
On the next system reboot barebox looks if it finds, lets say, the 'kernel_next' volume
and, in this case, it removes the old one ('kernel'), creates a new, empty one ('kernel'),
copies 'kernel_next' to the just created 'kernel' and finally removes the 'kernel_next'
to complete the update.
Here the relevant part of the init script:
...
if [ -e $kernel_next ]; then
echo "Update the kernel... "
ubirmvol $ubi_root kernel
ubimkvol $ubi_root kernel 8M
cp $kernel_next $kernel
if [ $? != 0 ]; then
echo "***Errors copying $kernel_next to $kernel"
sleep 2
else
echo "Update OK."
ubirmvol $ubi_root kernel_next
fi
fi
...
Now, after updating the barebox version to the current one, v2016.09.0, the 'cp' command
produces an almost endless sequence of failed assertions and stask backtraces:
...
UBI assert failed in ubi_eba_read_leb at 359
Function entered at [<87053010>] from [<87018ce0>]
Function entered at [<87018ce0>] from [<87017fb4>]
Function entered at [<87017fb4>] from [<8703f100>]
Function entered at [<8703f100>] from [<8703f2cc>]
Function entered at [<8703f2cc>] from [<8703faf8>]
Function entered at [<8703faf8>] from [<87039e78>]
Function entered at [<87039e78>] from [<87029178>]
Function entered at [<87029178>] from [<87003614>]
Function entered at [<87003614>] from [<87008e0c>]
Function entered at [<87008e0c>] from [<870083a0>]
Function entered at [<870083a0>] from [<8700908c>]
Function entered at [<8700908c>] from [<870011cc>]
Function entered at [<870011cc>] from [<870515d4>]
Function entered at [<870515d4>] from [<80052648>]
UBI assert failed in ubi_eba_read_leb at 359
Function entered at [<87053010>] from [<87018ce0>]
Function entered at [<87018ce0>] from [<87017fb4>]
Function entered at [<87017fb4>] from [<8703f100>]
Function entered at [<8703f100>] from [<8703f2cc>]
Function entered at [<8703f2cc>] from [<8703faf8>]
Function entered at [<8703faf8>] from [<87039e78>]
...
After trying different things I realized that 'cp' has problems
only with UBI volumes that were created by the kernel/userland
during the firmware update process; if I create a volume within
barebox it just work as expected.
Here is the source code snippet with the failing assertion:
(file <barebox_root>/drivers/mtd/ubi/eba.c)
int ubi_eba_read_leb(struct ubi_device *ubi, struct ubi_volume *vol, int lnum,
void *buf, int offset, int len, int check)
{
...
pnum = vol->eba_tbl[lnum];
if (pnum < 0) {
/*
* The logical eraseblock is not mapped, fill the whole buffer
* with 0xFF bytes. The exception is static volumes for which
* it is an error to read unmapped logical eraseblocks.
*/
dbg_eba("read %d bytes from offset %d of LEB %d:%d (unmapped)",
len, offset, vol_id, lnum);
leb_read_unlock(ubi, vol_id, lnum);
ubi_assert(vol->vol_type != UBI_STATIC_VOLUME);
memset(buf, 0xFF, len);
return 0;
}
...
Strange enough if I try to directly boot the system with:
# bootm -o /dev/nand0.ubi_volumes.ubi.dtb_next /dev/nand0.ubi_volumes.ubi.kernel_next
Loading ARM Linux zImage '/dev/nand0.ubi_volumes.ubi.kernel_next'
Loading devicetree from '/dev/nand0.ubi_volumes.ubi.dtb_next'
commandline: <NULL>
Booting Linux on physical CPU 0x0
...
then it works and the system boots correctly.
giorgio
Giorgio, iw3gtf@arcor.de
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^ permalink raw reply
* Re: [PATCH 1/6] ARM: add common definitions for i.MX50 SOC
From: Sascha Hauer @ 2016-09-14 13:07 UTC (permalink / raw)
To: Jason Cooper; +Cc: barebox, Alexander Kurz
In-Reply-To: <20160913130405.GK12916@io.lakedaemon.net>
On Tue, Sep 13, 2016 at 01:04:05PM +0000, Jason Cooper wrote:
> Hi Sascha, Alexander,
>
> On Tue, Sep 13, 2016 at 09:06:04AM +0200, Sascha Hauer wrote:
> > On Mon, Sep 12, 2016 at 10:17:18AM +0200, Alexander Kurz wrote:
> > > On Mon, 12 Sep 2016, Sascha Hauer wrote:
> > > > On Fri, Sep 09, 2016 at 05:43:39PM +0200, Alexander Kurz wrote:
> > > > > Signed-off-by: Alexander Kurz <akurz@blala.de>
> > > > > ---
> > > > > Documentation/boards/imx.rst | 1 +
> > > > > arch/arm/mach-imx/include/mach/generic.h | 13 +++++++++++++
> > > > > arch/arm/mach-imx/include/mach/imx_cpu_types.h | 1 +
> > > > > 3 files changed, 15 insertions(+)
> > > >
> > > > Seems to be straight forward to add i.MX50 support. I have nothing to
> > > > add, except: Applied, thanks
> > > >
> > > > Out of curiosity: What device do you use with i.MX50? Is it some E-Book
> > > > reader again?
> > > The imx50 has a build-in e-ink driver, so it is more or less a SOC
> > > tailored on e-books. It is used in some already outdated e-books like the
> > > 4th and 5th generation Kindles, some Kobos and Tolinos.
> > > The successor for the imx50 became the e-ink driver equiped variants
> > > of the imx6sl, which is used in most current generation e-book readers.
> > >
> > > While the current patchsets will enable barebox to run on different
> > > e-books e.g. when beeing booted via an installed bootloader, there is
> > > still an open issue: RAM initialization.
> > > Freescale used a "DRAMMC" which seems to be very unique to this SOC.
> > > Documentation on it is available in the Reference Manual, but it covers
> > > some details quite briefly.
> > > Related on barebox:
> > > it is not clear, whether DRAMMC initialization via imximg-DCD is possible
> > > at all. All existing bootloaders I have seen so far used some
> > > imximg-plugin code (which is currently not supported by barebox).
> > > A two-stage bootloader implementation via xload may be an alternative.
> >
> > Yes, that could work. How I understand it the plugin image is
> > responsible for initializing SDRAM and for loading the final image.
> > Then the job of the ROM is done anyway, so normally I do not see a
> > reason for plugin images. The only usecase seems to be HAB when the
> > final image is checked by the HAB code when returning to ROM.
>
> So, I found my Sandisk Connect WMD (Wireless Media Drive) and I also
> re-located the open source dump by Sandisk [1].
>
> The first problem I need to solve is the DDR training code. The device
> shipped with U-boot, and the training code seems to be in flash_header.S
> [2]. There's a large number of lines preceded by comments of the form
>
> /* setmem /32 0x140000f8 = 0x00010101 */
>
> which lends itself to a conversion into .imxcfg format. However,
> there's quite a bit of code that doesn't appear to be doing simple
> writes. Additionally, there's a lowlevel_init.S in the same directory.
>
> There is a linker script putting flash_header.o at the beginning of the
> binary image. Is it easier to just do that, bypassing imx-image? Or,
> is there a conversion utility my google fu isn't pulling up?
The code looks like they tried to initialize the SDRAM using the DCD
table but at some point realized that they can't do the necessary
calibration, so it was converted to Assembly code.
I would probably convert this to C and put it into the board specific
lowlevel.c without doing the plugin stuff.
I think you can forget the code in lowvel_init.S, this looks like the
standard i.MX5 setup code that barebox has in imx5.c. There may be
some i.MX50 specifics, but you'll need that only when the SDRAM is
already configured.
Sascha
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* Re: [PATCH] ARM: i.MX6: Enable parent propagation for clk_gate2
From: Sascha Hauer @ 2016-09-14 12:46 UTC (permalink / raw)
To: Sam Ravnborg; +Cc: Barebox List
In-Reply-To: <20160914111114.GA15884@ravnborg.org>
On Wed, Sep 14, 2016 at 01:11:14PM +0200, Sam Ravnborg wrote:
> Hi Sascha.
>
> On Tue, Sep 13, 2016 at 04:08:09PM +0200, Sascha Hauer wrote:
> > Enable parent rate propagation for clk_gate2 to allow the
> > clock consumers to adjust their rates.
> > One effect of this is that the i.MX6 NAND controller now can adjust
> > its rate. It already called a clk_set_rate(rate, 96000000), but this
> > had no effect, so the clock stayed at reset default 24MHz resulting
> > in a rather slow timing. This became a problem when commit
> > "1daa3bc mtd: nand_mxs: Setup timing" introduced EDO timing mode for
> > faster NAND chips. EDO mode can only work properly for cycle times
> > < 30ns (at least that's specified in the ONFI spec). 1daa3bc resulted
> > in sporadic NAND read errors on some boards.
>
> Nice work!
>
> We have tested this patch on ~10 boards that failed
> with DMA errors before.
> None of these boards failed after applying this patch.
Great :)
Have you noticed the NAND is much faster now?
Sascha
--
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* Re: [PATCH] ARM: i.MX6: Enable parent propagation for clk_gate2
From: Sam Ravnborg @ 2016-09-14 11:11 UTC (permalink / raw)
To: Sascha Hauer; +Cc: Barebox List
In-Reply-To: <1473775689-8969-1-git-send-email-s.hauer@pengutronix.de>
Hi Sascha.
On Tue, Sep 13, 2016 at 04:08:09PM +0200, Sascha Hauer wrote:
> Enable parent rate propagation for clk_gate2 to allow the
> clock consumers to adjust their rates.
> One effect of this is that the i.MX6 NAND controller now can adjust
> its rate. It already called a clk_set_rate(rate, 96000000), but this
> had no effect, so the clock stayed at reset default 24MHz resulting
> in a rather slow timing. This became a problem when commit
> "1daa3bc mtd: nand_mxs: Setup timing" introduced EDO timing mode for
> faster NAND chips. EDO mode can only work properly for cycle times
> < 30ns (at least that's specified in the ONFI spec). 1daa3bc resulted
> in sporadic NAND read errors on some boards.
Nice work!
We have tested this patch on ~10 boards that failed
with DMA errors before.
None of these boards failed after applying this patch.
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Sam Ravnborg <sam@ravnborg.org>
Sam
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* Re: [PATCH] ARM: imx6: reset PLL2's PFD2 on i.MX6D
From: Lucas Stach @ 2016-09-14 11:05 UTC (permalink / raw)
To: Uwe Kleine-König; +Cc: barebox
In-Reply-To: <1473846672.2243.39.camel@pengutronix.de>
Am Mittwoch, den 14.09.2016, 11:51 +0200 schrieb Lucas Stach:
> Am Mittwoch, den 14.09.2016, 09:56 +0200 schrieb Uwe Kleine-König:
> > The check for is_imx6q was introduced initially in
> >
> > f1f6d76370b3 ("ARM: i.MX6: correct work flow of PFDs from uboot-sources")
> >
> > to differentiate between i.MX6DL+i.MX6SL and i.MX6Q. The i.MX6D must be
> > handled like the latter, so drop the check. i.MX6DL+i.MX6SL can be
> > ignored here since since
> >
> > a66596282413 ("imx6: lowlevel_init: Fix workaround for new i.MX6s chips")
> >
> > the PFD handling is only done for i.MX6DQ.
> >
> > Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
> > ---
> > arch/arm/mach-imx/imx6.c | 4 ++--
> > 1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c
> > index ba8fb8964ac8..4391839a0b7e 100644
> > --- a/arch/arm/mach-imx/imx6.c
> > +++ b/arch/arm/mach-imx/imx6.c
> > @@ -77,7 +77,7 @@ void imx6_init_lowlevel(void)
>
> The comment right above this code block isn't reflecting reality anymore
> after this change. Please fix it up.
FTR: Please, disregard my comment. It's wrong and this patch is just
fine.
>
> > BM_ANADIG_PFD_480_PFD0_CLKGATE,
> > MX6_ANATOP_BASE_ADDR + HW_ANADIG_PFD_480_SET);
> > writel(BM_ANADIG_PFD_528_PFD3_CLKGATE |
> > - (is_imx6q ? BM_ANADIG_PFD_528_PFD2_CLKGATE : 0) |
> > + BM_ANADIG_PFD_528_PFD2_CLKGATE |
> > BM_ANADIG_PFD_528_PFD1_CLKGATE |
> > BM_ANADIG_PFD_528_PFD0_CLKGATE,
> > MX6_ANATOP_BASE_ADDR + HW_ANADIG_PFD_528_SET);
> > @@ -88,7 +88,7 @@ void imx6_init_lowlevel(void)
> > BM_ANADIG_PFD_480_PFD0_CLKGATE,
> > MX6_ANATOP_BASE_ADDR + HW_ANADIG_PFD_480_CLR);
> > writel(BM_ANADIG_PFD_528_PFD3_CLKGATE |
> > - (is_imx6q ? BM_ANADIG_PFD_528_PFD2_CLKGATE : 0) |
> > + BM_ANADIG_PFD_528_PFD2_CLKGATE |
> > BM_ANADIG_PFD_528_PFD1_CLKGATE |
> > BM_ANADIG_PFD_528_PFD0_CLKGATE,
> > MX6_ANATOP_BASE_ADDR + HW_ANADIG_PFD_528_CLR);
>
>
>
> _______________________________________________
> barebox mailing list
> barebox@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
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* [PATCH v2] ARM: imx6: reset PLL2's PFD2 on i.MX6D
From: Uwe Kleine-König @ 2016-09-14 10:17 UTC (permalink / raw)
To: barebox
In-Reply-To: <1473846672.2243.39.camel@pengutronix.de>
The check for is_imx6q was introduced initially in
f1f6d76370b3 ("ARM: i.MX6: correct work flow of PFDs from uboot-sources")
to differentiate between i.MX6DL+i.MX6SL and i.MX6Q. The i.MX6D must be
handled like the latter, so drop the check. i.MX6DL+i.MX6SL can be
ignored here since since
a66596282413 ("imx6: lowlevel_init: Fix workaround for new i.MX6s chips")
the PFD handling is only done for i.MX6DQ.
Update the comment to be not only logically correct but also helpful.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
arch/arm/mach-imx/imx6.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c
index ba8fb8964ac8..18509a7b51db 100644
--- a/arch/arm/mach-imx/imx6.c
+++ b/arch/arm/mach-imx/imx6.c
@@ -65,10 +65,10 @@ void imx6_init_lowlevel(void)
writel(0xffffffff, 0x020c407c);
writel(0xffffffff, 0x020c4080);
- /* Due to hardware limitation, on MX6Q we need to gate/ungate all PFDs
- * to make sure PFD is working right, otherwise, PFDs may
- * not output clock after reset, MX6DL and MX6SL have added 396M pfd
- * workaround in ROM code, as bus clock need it
+ /*
+ * Due to a hardware bug (related to errata ERR006282) on i.MX6DQ we
+ * need to gate/ungate all PFDs to make sure PFD is working right,
+ * otherwise PFDs may not output clock after reset.
*/
if (is_imx6q || is_imx6d) {
writel(BM_ANADIG_PFD_480_PFD3_CLKGATE |
@@ -77,7 +77,7 @@ void imx6_init_lowlevel(void)
BM_ANADIG_PFD_480_PFD0_CLKGATE,
MX6_ANATOP_BASE_ADDR + HW_ANADIG_PFD_480_SET);
writel(BM_ANADIG_PFD_528_PFD3_CLKGATE |
- (is_imx6q ? BM_ANADIG_PFD_528_PFD2_CLKGATE : 0) |
+ BM_ANADIG_PFD_528_PFD2_CLKGATE |
BM_ANADIG_PFD_528_PFD1_CLKGATE |
BM_ANADIG_PFD_528_PFD0_CLKGATE,
MX6_ANATOP_BASE_ADDR + HW_ANADIG_PFD_528_SET);
@@ -88,7 +88,7 @@ void imx6_init_lowlevel(void)
BM_ANADIG_PFD_480_PFD0_CLKGATE,
MX6_ANATOP_BASE_ADDR + HW_ANADIG_PFD_480_CLR);
writel(BM_ANADIG_PFD_528_PFD3_CLKGATE |
- (is_imx6q ? BM_ANADIG_PFD_528_PFD2_CLKGATE : 0) |
+ BM_ANADIG_PFD_528_PFD2_CLKGATE |
BM_ANADIG_PFD_528_PFD1_CLKGATE |
BM_ANADIG_PFD_528_PFD0_CLKGATE,
MX6_ANATOP_BASE_ADDR + HW_ANADIG_PFD_528_CLR);
--
2.8.1
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^ permalink raw reply related
* Re: [PATCH] ARM: imx6: reset PLL2's PFD2 on i.MX6D
From: Lucas Stach @ 2016-09-14 9:51 UTC (permalink / raw)
To: Uwe Kleine-König; +Cc: barebox
In-Reply-To: <1473839813-11206-1-git-send-email-u.kleine-koenig@pengutronix.de>
Am Mittwoch, den 14.09.2016, 09:56 +0200 schrieb Uwe Kleine-König:
> The check for is_imx6q was introduced initially in
>
> f1f6d76370b3 ("ARM: i.MX6: correct work flow of PFDs from uboot-sources")
>
> to differentiate between i.MX6DL+i.MX6SL and i.MX6Q. The i.MX6D must be
> handled like the latter, so drop the check. i.MX6DL+i.MX6SL can be
> ignored here since since
>
> a66596282413 ("imx6: lowlevel_init: Fix workaround for new i.MX6s chips")
>
> the PFD handling is only done for i.MX6DQ.
>
> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
> ---
> arch/arm/mach-imx/imx6.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c
> index ba8fb8964ac8..4391839a0b7e 100644
> --- a/arch/arm/mach-imx/imx6.c
> +++ b/arch/arm/mach-imx/imx6.c
> @@ -77,7 +77,7 @@ void imx6_init_lowlevel(void)
The comment right above this code block isn't reflecting reality anymore
after this change. Please fix it up.
Regards,
Lucas
> BM_ANADIG_PFD_480_PFD0_CLKGATE,
> MX6_ANATOP_BASE_ADDR + HW_ANADIG_PFD_480_SET);
> writel(BM_ANADIG_PFD_528_PFD3_CLKGATE |
> - (is_imx6q ? BM_ANADIG_PFD_528_PFD2_CLKGATE : 0) |
> + BM_ANADIG_PFD_528_PFD2_CLKGATE |
> BM_ANADIG_PFD_528_PFD1_CLKGATE |
> BM_ANADIG_PFD_528_PFD0_CLKGATE,
> MX6_ANATOP_BASE_ADDR + HW_ANADIG_PFD_528_SET);
> @@ -88,7 +88,7 @@ void imx6_init_lowlevel(void)
> BM_ANADIG_PFD_480_PFD0_CLKGATE,
> MX6_ANATOP_BASE_ADDR + HW_ANADIG_PFD_480_CLR);
> writel(BM_ANADIG_PFD_528_PFD3_CLKGATE |
> - (is_imx6q ? BM_ANADIG_PFD_528_PFD2_CLKGATE : 0) |
> + BM_ANADIG_PFD_528_PFD2_CLKGATE |
> BM_ANADIG_PFD_528_PFD1_CLKGATE |
> BM_ANADIG_PFD_528_PFD0_CLKGATE,
> MX6_ANATOP_BASE_ADDR + HW_ANADIG_PFD_528_CLR);
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* Re: [PATCH 04/12] ARM: i.MX53 Vincell: Add PBL console support
From: Michael Grzeschik @ 2016-09-14 9:24 UTC (permalink / raw)
To: Sascha Hauer; +Cc: Barebox List
In-Reply-To: <1473844368-13030-4-git-send-email-s.hauer@pengutronix.de>
On Wed, Sep 14, 2016 at 11:12:40AM +0200, Sascha Hauer wrote:
> PBL console support is more useful than debug_ll. Add support
> for it to the Vincell Board.
>
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> ---
> arch/arm/boards/guf-vincell/lowlevel.c | 50 ++++++++++++++++++++--------------
> 1 file changed, 29 insertions(+), 21 deletions(-)
>
> diff --git a/arch/arm/boards/guf-vincell/lowlevel.c b/arch/arm/boards/guf-vincell/lowlevel.c
> index af7c65d..3985dd7 100644
> --- a/arch/arm/boards/guf-vincell/lowlevel.c
> +++ b/arch/arm/boards/guf-vincell/lowlevel.c
> @@ -11,6 +11,7 @@
> #include <mach/generic.h>
> #include <asm/barebox-arm.h>
> #include <asm/barebox-arm-head.h>
> +#include <asm/cache.h>
>
> #define IOMUX_PADCTL_DDRI_DDR (1 << 9)
>
> @@ -123,12 +124,16 @@ void disable_watchdog(void)
> writew(0x0, MX53_WDOG2_BASE_ADDR + 8);
> }
>
> -static noinline void imx53_guf_vincell_init(void *fdt)
> +extern char __dtb_imx53_guf_vincell_lt_start[];
> +extern char __dtb_imx53_guf_vincell_start[];
> +
> +static noinline void imx53_guf_vincell_init(int is_lt)
> {
> void __iomem *ccm = (void *)MX53_CCM_BASE_ADDR;
> + void __iomem *uart = IOMEM(MX53_UART4_BASE_ADDR);
This should be MX53_UART2_BASE_ADDR to be consistent with
linux,stdout-path in imx53-guf-vincell.dts and imx53-guf-vincell-lt.dts.
> + void *fdt;
> u32 r;
>
> - imx5_cpu_lowlevel_init();
> arm_setup_stack(MX53_IRAM_BASE_ADDR + MX53_IRAM_SIZE - 8);
>
> writel(0x0088494c, ccm + MX5_CCM_CBCDR);
> @@ -137,12 +142,11 @@ static noinline void imx53_guf_vincell_init(void *fdt)
>
> imx53_init_lowlevel_early(800);
>
> - if (IS_ENABLED(CONFIG_DEBUG_LL)) {
> - writel(0x3, MX53_IOMUXC_BASE_ADDR + 0x27c);
> - writel(0x3, MX53_IOMUXC_BASE_ADDR + 0x278);
> - imx53_uart_setup_ll();
> - putc_ll('>');
> - }
> + writel(0x3, MX53_IOMUXC_BASE_ADDR + 0x27c);
> + writel(0x3, MX53_IOMUXC_BASE_ADDR + 0x278);
> + imx53_uart_setup(uart);
> + pbl_set_putc(imx_uart_putc, uart);
> + pr_debug("GuF Vincell\n");
>
> /* Skip SDRAM initialization if we run from RAM */
> r = get_pc();
> @@ -152,27 +156,31 @@ static noinline void imx53_guf_vincell_init(void *fdt)
> imx_esdctlv4_init();
> }
>
> + if (is_lt)
> + fdt = __dtb_imx53_guf_vincell_lt_start;
> + else
> + fdt = __dtb_imx53_guf_vincell_start;
> +
> imx53_barebox_entry(fdt);
> }
>
> -extern char __dtb_imx53_guf_vincell_lt_start[];
> -
> -ENTRY_FUNCTION(start_imx53_guf_vincell_lt, r0, r1, r2)
> +static void __imx53_guf_vincell_init(int is_lt)
> {
> - void *fdt;
> -
> - fdt = __dtb_imx53_guf_vincell_lt_start - get_runtime_offset();
> + arm_early_mmu_cache_invalidate();
> + imx5_cpu_lowlevel_init();
> + relocate_to_current_adr();
> + setup_c();
> + barrier();
>
> - imx53_guf_vincell_init(fdt);
> + imx53_guf_vincell_init(is_lt);
> }
>
> -extern char __dtb_imx53_guf_vincell_start[];
> +ENTRY_FUNCTION(start_imx53_guf_vincell_lt, r0, r1, r2)
> +{
> + __imx53_guf_vincell_init(1);
> +}
>
> ENTRY_FUNCTION(start_imx53_guf_vincell, r0, r1, r2)
> {
> - void *fdt;
> -
> - fdt = __dtb_imx53_guf_vincell_start - get_runtime_offset();
> -
> - imx53_guf_vincell_init(fdt);
> + __imx53_guf_vincell_init(0);
> }
> --
> 2.8.1
>
>
> _______________________________________________
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> http://lists.infradead.org/mailman/listinfo/barebox
>
--
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Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
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* [PATCH 09/12] ARM: i.MX53: Implement NAND xload
From: Sascha Hauer @ 2016-09-14 9:12 UTC (permalink / raw)
To: Barebox List
In-Reply-To: <1473844368-13030-1-git-send-email-s.hauer@pengutronix.de>
Some i.MX53 want to setup the SDRAM from C code rather than
from DCD tables. The image size for these boards is limited
to the internal SRAM size. To overcome this limitation for
i.MX53 boards booting from NAND implement an xload mechanism
to load only the PBL to SRAM and let barebox load the rest
of the image itself after SDRAM has been initialized.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/mach-imx/Makefile | 2 +-
arch/arm/mach-imx/include/mach/xload.h | 1 +
arch/arm/mach-imx/xload-imx-nand.c | 308 +++++++++++++++++++++++++++++++++
3 files changed, 310 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/mach-imx/xload-imx-nand.c
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index 0763944..a216c9b 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -25,4 +25,4 @@ obj-pbl-y += esdctl.o boot.o
obj-$(CONFIG_BAREBOX_UPDATE) += imx-bbu-internal.o
obj-$(CONFIG_BAREBOX_UPDATE_IMX_EXTERNAL_NAND) += imx-bbu-external-nand.o
lwl-y += cpu_init.o
-pbl-y += xload-spi.o xload-esdhc.o xload-common.o
+pbl-y += xload-spi.o xload-esdhc.o xload-common.o xload-imx-nand.o
diff --git a/arch/arm/mach-imx/include/mach/xload.h b/arch/arm/mach-imx/include/mach/xload.h
index 997522e..3898d66 100644
--- a/arch/arm/mach-imx/include/mach/xload.h
+++ b/arch/arm/mach-imx/include/mach/xload.h
@@ -1,6 +1,7 @@
#ifndef __MACH_XLOAD_H
#define __MACH_XLOAD_H
+int imx53_nand_start_image(void);
int imx6_spi_load_image(int instance, unsigned int flash_offset, void *buf, int len);
int imx6_spi_start_image(int instance);
int imx6_esdhc_load_image(int instance, void *buf, int len);
diff --git a/arch/arm/mach-imx/xload-imx-nand.c b/arch/arm/mach-imx/xload-imx-nand.c
new file mode 100644
index 0000000..22e41fa
--- /dev/null
+++ b/arch/arm/mach-imx/xload-imx-nand.c
@@ -0,0 +1,308 @@
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+#define pr_fmt(fmt) "imx-nand-boot: " fmt
+
+#include <common.h>
+#include <init.h>
+#include <io.h>
+#include <linux/mtd/nand.h>
+#include <mach/imx-nand.h>
+#include <mach/generic.h>
+#include <mach/imx53-regs.h>
+#include <mach/xload.h>
+
+struct imx_nand {
+ void __iomem *base;
+ void __iomem *main_area0;
+ void __iomem *regs_ip;
+ void __iomem *regs_axi;
+ void *spare0;
+ int pagesize;
+ int v1;
+ int pages_per_block;
+};
+
+static void wait_op_done(struct imx_nand *host)
+{
+ u32 r;
+
+ while (1) {
+ r = readl(NFC_V3_IPC);
+ if (r & NFC_V3_IPC_INT)
+ break;
+ };
+
+ r &= ~NFC_V3_IPC_INT;
+
+ writel(r, NFC_V3_IPC);
+}
+
+/*
+ * This function issues the specified command to the NAND device and
+ * waits for completion.
+ *
+ * @param cmd command for NAND Flash
+ */
+static void imx_nandboot_send_cmd(struct imx_nand *host, u16 cmd)
+{
+ /* fill command */
+ writel(cmd, NFC_V3_FLASH_CMD);
+
+ /* send out command */
+ writel(NFC_CMD, NFC_V3_LAUNCH);
+
+ /* Wait for operation to complete */
+ wait_op_done(host);
+}
+
+/*
+ * This function sends an address (or partial address) to the
+ * NAND device. The address is used to select the source/destination for
+ * a NAND command.
+ *
+ * @param addr address to be written to NFC.
+ * @param islast True if this is the last address cycle for command
+ */
+static void imx_nandboot_send_addr(struct imx_nand *host, u16 addr)
+{
+ /* fill address */
+ writel(addr, NFC_V3_FLASH_ADDR0);
+
+ /* send out address */
+ writel(NFC_ADDR, NFC_V3_LAUNCH);
+
+ wait_op_done(host);
+}
+
+static void imx_nandboot_nfc_addr(struct imx_nand *host, int page)
+{
+ imx_nandboot_send_addr(host, 0);
+
+ if (host->pagesize == 2048)
+ imx_nandboot_send_addr(host, 0);
+
+ imx_nandboot_send_addr(host, page & 0xff);
+ imx_nandboot_send_addr(host, (page >> 8) & 0xff);
+ imx_nandboot_send_addr(host, (page >> 16) & 0xff);
+
+ if (host->pagesize == 2048)
+ imx_nandboot_send_cmd(host, NAND_CMD_READSTART);
+}
+
+static void imx_nandboot_send_page(struct imx_nand *host, unsigned int ops)
+{
+ uint32_t tmp;
+
+ tmp = readl(NFC_V3_CONFIG1);
+ tmp &= ~(7 << 4);
+ writel(tmp, NFC_V3_CONFIG1);
+
+ /* transfer data from NFC ram to nand */
+ writel(ops, NFC_V3_LAUNCH);
+
+ wait_op_done(host);
+}
+
+static void __memcpy32(void *trg, const void *src, int size)
+{
+ int i;
+ unsigned int *t = trg;
+ unsigned const int *s = src;
+
+ for (i = 0; i < (size >> 2); i++)
+ *t++ = *s++;
+}
+
+static void imx_nandboot_get_page(struct imx_nand *host, unsigned int page)
+{
+ imx_nandboot_send_cmd(host, NAND_CMD_READ0);
+ imx_nandboot_nfc_addr(host, page);
+ imx_nandboot_send_page(host, NFC_OUTPUT);
+}
+
+static int imx_nandboot_read_page(struct imx_nand *host, unsigned int page,
+ void *buf)
+{
+ int nsubpages;
+ u32 eccstat, err;
+
+ imx_nandboot_get_page(host, page);
+
+ __memcpy32(buf, host->main_area0, host->pagesize);
+
+ eccstat = readl(NFC_V3_ECC_STATUS_RESULT);
+ nsubpages = host->pagesize / 512;
+
+ do {
+ err = eccstat & 0xf;
+ if (err == 0xf)
+ return -EBADMSG;
+ eccstat >>= 4;
+ } while (--nsubpages);
+
+ return 0;
+}
+
+static int dbbt_block_is_bad(void *_dbbt, int block)
+{
+ int i;
+ u32 *dbbt = _dbbt;
+ int num_bad_blocks;
+
+ if (!_dbbt)
+ return false;
+
+ dbbt++; /* reserved */
+
+ num_bad_blocks = *dbbt++;
+
+ for (i = 0; i < num_bad_blocks; i++) {
+ if (*dbbt == block)
+ return true;
+ dbbt++;
+ }
+
+ return false;
+}
+
+static int read_firmware(struct imx_nand *host, void *dbbt, int page, void *buf,
+ int npages)
+{
+ int ret;
+
+ if (dbbt_block_is_bad(dbbt, page / host->pages_per_block))
+ page = ALIGN(page, host->pages_per_block);
+
+ while (npages) {
+ if (!(page % host->pages_per_block)) {
+ if (dbbt_block_is_bad(NULL, page / host->pages_per_block)) {
+ page += host->pages_per_block;
+ continue;
+ }
+ }
+
+ ret = imx_nandboot_read_page(host, page, buf);
+ if (ret)
+ return ret;
+
+ buf += host->pagesize;
+ page++;
+ npages--;
+ }
+
+ return 0;
+}
+
+int imx53_nand_start_image(void)
+{
+ struct imx_nand host;
+ void *buf = IOMEM(MX53_CSD0_BASE_ADDR);
+ void *dbbt = NULL;
+ int page_firmware1, page_firmware2, page_dbbt, image_size, npages;
+ void (*firmware)(void);
+ int ret;
+ u32 cfg1 = readl(IOMEM(MX53_SRC_BASE_ADDR) + 0x4);
+
+ host.base = IOMEM(MX53_NFC_AXI_BASE_ADDR);
+ host.main_area0 = host.base;
+ host.regs_ip = IOMEM(MX53_NFC_BASE_ADDR);
+ host.regs_axi = host.base + 0x1e00;
+ host.spare0 = host.base + 0x1000;
+
+ switch ((cfg1 >> 14) & 0x3) {
+ case 0:
+ host.pagesize = 512;
+ break;
+ case 1:
+ host.pagesize = 2048;
+ break;
+ case 2:
+ case 3:
+ host.pagesize = 4096;
+ break;
+ }
+
+ switch ((cfg1 >> 17) & 0x3) {
+ case 0:
+ host.pages_per_block = 32;
+ break;
+ case 1:
+ host.pages_per_block = 64;
+ break;
+ case 2:
+ host.pages_per_block = 128;
+ break;
+ case 3:
+ host.pages_per_block = 256;
+ break;
+ }
+
+ pr_debug("Using pagesize %d, %d pages per block\n",
+ host.pagesize, host.pages_per_block);
+
+ ret = imx_nandboot_read_page(&host, 0, buf);
+ if (ret)
+ return ret;
+
+ if (*(u32 *)(buf + 0x4) != 0x20424346) {
+ pr_err("No FCB Found on flash\n");
+ return -EINVAL;
+ }
+
+ page_firmware1 = *(u32 *)(buf + 0x68);
+ page_firmware2 = *(u32 *)(buf + 0x6c);
+ page_dbbt = *(u32 *)(buf + 0x78);
+
+ image_size = ALIGN(imx_image_size(), host.pagesize);
+ npages = image_size / host.pagesize;
+
+ if (page_dbbt) {
+ ret = imx_nandboot_read_page(&host, page_dbbt, buf);
+ if (!ret && *(u32 *)(buf + 0x4) == 0x44424254) {
+ ret = imx_nandboot_read_page(&host, page_dbbt + 4, buf);
+ if (!ret) {
+ pr_debug("Using DBBT from page %d\n", page_dbbt + 4);
+ dbbt = buf;
+ buf += host.pagesize;
+ }
+ }
+ }
+
+ pr_debug("Reading firmware from page %d, size %d\n",
+ page_firmware1, image_size);
+
+ ret = read_firmware(&host, dbbt, page_firmware1, buf, npages);
+ if (ret) {
+ pr_debug("Reading primary firmware failed\n");
+ if (page_firmware2) {
+ pr_debug("Reading firmware from page %d, size %d\n",
+ page_firmware2, image_size);
+ ret = read_firmware(&host, dbbt, page_firmware2, buf, npages);
+ if (ret) {
+ pr_err("Could not read firmware\n");
+ return -EINVAL;
+ }
+ } else {
+ pr_err("Reading primary firmware failed, no secondary firmware found\n");
+ return -EINVAL;
+ }
+ }
+
+ pr_debug("Firmware read, starting it\n");
+
+ firmware = buf;
+
+ firmware();
+
+ return 0;
+}
--
2.8.1
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* [PATCH 02/12] ARM: i.MX53 Vincell: Reset phy consistently from device tree
From: Sascha Hauer @ 2016-09-14 9:12 UTC (permalink / raw)
To: Barebox List
In-Reply-To: <1473844368-13030-1-git-send-email-s.hauer@pengutronix.de>
The phy reset for the Vincell board is done from device tree whereas
the Vincell-LT resets the phy from board init code. Since both boards
share the same code base the regular Vincell board ends up with a
duplicated phy reset, with the second reset being done after the
FEC has been initialized.
Fix this by removing the phy reset from the board code and adding the
phy reset to the Vincell-LT dts file.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/boards/guf-vincell/board.c | 11 -----------
arch/arm/dts/imx53-guf-vincell-lt.dts | 1 +
2 files changed, 1 insertion(+), 11 deletions(-)
diff --git a/arch/arm/boards/guf-vincell/board.c b/arch/arm/boards/guf-vincell/board.c
index 43c1952..ee5be10 100644
--- a/arch/arm/boards/guf-vincell/board.c
+++ b/arch/arm/boards/guf-vincell/board.c
@@ -29,15 +29,6 @@
#include <mach/bbu.h>
#include <mach/imx5.h>
-#define LOCO_FEC_PHY_RST IMX_GPIO_NR(7, 6)
-
-static void vincell_fec_reset(void)
-{
- gpio_direction_output(LOCO_FEC_PHY_RST, 0);
- mdelay(1);
- gpio_set_value(LOCO_FEC_PHY_RST, 1);
-}
-
static int vincell_devices_init(void)
{
if (!of_machine_is_compatible("guf,imx53-vincell") &&
@@ -49,8 +40,6 @@ static int vincell_devices_init(void)
clk_set_rate(clk_lookup("emi_slow_podf"), 133333334);
clk_set_rate(clk_lookup("nfc_podf"), 33333334);
- vincell_fec_reset();
-
imx53_bbu_internal_nand_register_handler("nand",
BBU_HANDLER_FLAG_DEFAULT, SZ_512K);
diff --git a/arch/arm/dts/imx53-guf-vincell-lt.dts b/arch/arm/dts/imx53-guf-vincell-lt.dts
index bcc378d..67a4133 100644
--- a/arch/arm/dts/imx53-guf-vincell-lt.dts
+++ b/arch/arm/dts/imx53-guf-vincell-lt.dts
@@ -136,6 +136,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec>;
phy-mode = "rmii";
+ phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_HIGH>;
status = "okay";
};
--
2.8.1
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