* [PATCH 04/10] globalvar: Fix compiler warning
From: Sascha Hauer @ 2016-11-23 9:39 UTC (permalink / raw)
To: Barebox List
In-Reply-To: <20161123093937.15711-1-s.hauer@pengutronix.de>
Fixes:
common/globalvar.c:393:7: warning: 'pname' may be used uninitialized in this function [-Wmaybe-uninitialized]
This is a false positive, pname cannot be uninitialized. Silence this
warning.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
common/globalvar.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/common/globalvar.c b/common/globalvar.c
index 85d0795..52808f8 100644
--- a/common/globalvar.c
+++ b/common/globalvar.c
@@ -382,7 +382,7 @@ void globalvar_set_match(const char *match, const char *val)
static int globalvar_simple_set(struct device_d *dev, struct param_d *p, const char *val)
{
struct device_d *rdev;
- const char *pname;
+ const char *pname = NULL;
int ret;
ret = nvvar_device_dispatch(p->name, &rdev, &pname);
--
2.10.2
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* [PATCH 07/10] ARM: socfpga: fix compiler warning
From: Sascha Hauer @ 2016-11-23 9:39 UTC (permalink / raw)
To: Barebox List
In-Reply-To: <20161123093937.15711-1-s.hauer@pengutronix.de>
Fixes:
arch/arm/mach-socfpga/xload.c:121:13: warning: assignment discards 'const' qualifier from pointer target type
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/mach-socfpga/xload.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-socfpga/xload.c b/arch/arm/mach-socfpga/xload.c
index 0e584c3..d24944b 100644
--- a/arch/arm/mach-socfpga/xload.c
+++ b/arch/arm/mach-socfpga/xload.c
@@ -111,7 +111,7 @@ static void socfpga_timer_init(void)
static __noreturn int socfpga_xload(void)
{
enum bootsource bootsource = bootsource_get();
- struct socfpga_barebox_part *part;
+ const struct socfpga_barebox_part *part;
void *buf = NULL;
switch (bootsource) {
--
2.10.2
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* Re: [PATCHv2] ARM: i.MX25/35: Fix bootsource detection
From: Sascha Hauer @ 2016-11-23 9:44 UTC (permalink / raw)
To: Daniel Krüger; +Cc: barebox
In-Reply-To: <7189a1ce-2633-97a4-464d-ae95736135bc@systec-electronic.com>
On Tue, Nov 22, 2016 at 12:08:45PM +0100, Daniel Krüger wrote:
> This fixes commit 0b47f95340d801a26643e5e1f4ee05287e8ae90e for i.MX25/35.
> Otherwise the bootsource was just "unknown".
>
> Signed-off-by: Daniel Krueger <daniel.krueger@systec-electronic.com>
Applied, thanks
Sascha
> ---
> arch/arm/mach-imx/boot.c | 12 ++++++------
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm/mach-imx/boot.c b/arch/arm/mach-imx/boot.c
> index b66c29d..4893060 100644
> --- a/arch/arm/mach-imx/boot.c
> +++ b/arch/arm/mach-imx/boot.c
> @@ -69,13 +69,13 @@ static const enum bootsource locations[4][4] = {
> * Note also that I suspect that the boot source pins are only sampled at
> * power up.
> */
> -static void imx25_35_boot_save_loc(unsigned int ctrl, unsigned int type)
> +static enum bootsource imx25_35_boot_source(unsigned int ctrl, unsigned int type)
> {
> enum bootsource src;
>
> src = locations[ctrl][type];
>
> - bootsource_set(src);
> + return src;
> }
>
> void imx25_get_boot_source(enum bootsource *src, int *instance)
> @@ -84,8 +84,8 @@ void imx25_get_boot_source(enum bootsource *src, int *instance)
> uint32_t val;
>
> val = readl(ccm_base + MX25_CCM_RCSR);
> - imx25_35_boot_save_loc((val >> MX25_CCM_RCSR_MEM_CTRL_SHIFT) & 0x3,
> - (val >> MX25_CCM_RCSR_MEM_TYPE_SHIFT) & 0x3);
> + *src = imx25_35_boot_source((val >> MX25_CCM_RCSR_MEM_CTRL_SHIFT) & 0x3,
> + (val >> MX25_CCM_RCSR_MEM_TYPE_SHIFT) & 0x3);
> }
>
> void imx25_boot_save_loc(void)
> @@ -105,8 +105,8 @@ void imx35_get_boot_source(enum bootsource *src, int *instance)
> uint32_t val;
>
> val = readl(ccm_base + MX35_CCM_RCSR);
> - imx25_35_boot_save_loc((val >> MX35_CCM_RCSR_MEM_CTRL_SHIFT) & 0x3,
> - (val >> MX35_CCM_RCSR_MEM_TYPE_SHIFT) & 0x3);
> + *src = imx25_35_boot_source((val >> MX35_CCM_RCSR_MEM_CTRL_SHIFT) & 0x3,
> + (val >> MX35_CCM_RCSR_MEM_TYPE_SHIFT) & 0x3);
> }
>
> void imx35_boot_save_loc(void)
> --
> 1.7.9.5
>
>
--
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Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
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* Re: [PATCH] ubi: Only read necessary size when reading the VID header
From: Sascha Hauer @ 2016-11-23 9:44 UTC (permalink / raw)
To: Ulrich Ölmann; +Cc: Barebox List
In-Reply-To: <20161122152121.25568-1-u.oelmann@pengutronix.de>
On Tue, Nov 22, 2016 at 04:21:21PM +0100, Ulrich Ölmann wrote:
> Based on kernel commit 8a8e8d2fdbab ("ubi: Only read necessary size when reading
> the VID header") by Sascha Hauer <s.hauer@pengutronix.de>:
>
> When reading the vid hdr from the device UBI always reads a whole
> page. Instead, read only the data we actually need and speed up
> attachment of UBI devices by potentially making use of reading
> subpages if the NAND driver supports it.
>
> Since the VID header may be at offset vid_hdr_shift in the page and
> we can only read from the beginning of a page we have to add that
> offset to the read size.
>
> Signed-off-by: Ulrich Ölmann <u.oelmann@pengutronix.de>
Applied, thanks
Sascha
> ---
> drivers/mtd/ubi/io.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/mtd/ubi/io.c b/drivers/mtd/ubi/io.c
> index 43af4a52dff9..6d08f92ea647 100644
> --- a/drivers/mtd/ubi/io.c
> +++ b/drivers/mtd/ubi/io.c
> @@ -711,7 +711,7 @@ int ubi_io_read_vid_hdr(struct ubi_device *ubi, int pnum,
>
> p = (char *)vid_hdr - ubi->vid_hdr_shift;
> read_err = ubi_io_read(ubi, p, pnum, ubi->vid_hdr_aloffset,
> - ubi->vid_hdr_alsize);
> + ubi->vid_hdr_shift + UBI_VID_HDR_SIZE);
> if (read_err && read_err != UBI_IO_BITFLIPS && !mtd_is_eccerr(read_err))
> return read_err;
>
> --
> 2.10.2
>
>
> _______________________________________________
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> barebox@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
--
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Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
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* Re: [PATCH] Documentation: bootchooser: fix typos
From: Sascha Hauer @ 2016-11-23 9:45 UTC (permalink / raw)
To: Ulrich Ölmann; +Cc: Barebox List
In-Reply-To: <20161123073859.18101-1-u.oelmann@pengutronix.de>
On Wed, Nov 23, 2016 at 08:38:59AM +0100, Ulrich Ölmann wrote:
> Signed-off-by: Ulrich Ölmann <u.oelmann@pengutronix.de>
> ---
> Documentation/user/bootchooser.rst | 57 +++++++++++++++++++++-----------------
> 1 file changed, 31 insertions(+), 26 deletions(-)
Applied, thanks
Sascha
>
> diff --git a/Documentation/user/bootchooser.rst b/Documentation/user/bootchooser.rst
> index 5baa66d9b9f9..cef1d4abb090 100644
> --- a/Documentation/user/bootchooser.rst
> +++ b/Documentation/user/bootchooser.rst
> @@ -67,7 +67,7 @@ Additionally the remaining_attempts counter can be reset manually using the
> :ref:`command_bootchooser` command. This allows for custom conditions under which
> a system is marked as good.
> In case only the booted system itself knows when it is in a good state, the
> -barebox-state tool from the dt-utils_ package can used to reset the remaining_attempts
> +barebox-state tool from the dt-utils_ package can be used to reset the remaining_attempts
> counter from the currently running system.
>
> .. _dt-utils: http://git.pengutronix.de/?p=tools/dt-utils.git;a=summary
> @@ -79,8 +79,8 @@ Additionally to the target options described above, bootchooser has some general
> options not specific to any target.
>
> ``global.bootchooser.disable_on_zero_attempts``
> - Boolean flag. if 1, bootchooser disables a target (sets priority to 0) whenever the
> - remaining attempts counter reaches 0.
> + Boolean flag. If set to 1, bootchooser disables a target (sets priority to 0) whenever
> + the remaining attempts counter reaches 0.
> ``global.bootchooser.default_attempts``
> The default number of attempts that a target shall be tried starting, used when not
> overwritten with the target specific variable of the same name.
> @@ -89,25 +89,28 @@ options not specific to any target.
> of the same name.
> ``global.bootchooser.reset_attempts``
> A space separated list of events that cause bootchooser to reset the
> - remaining_attempts counters of each target that has a non zero priority. possible values:
> - * empty: counters will never be reset``
> + remaining_attempts counters of each target that has a non zero priority. Possible values:
> +
> + * empty: counters will never be reset``
> * power-on: counters will be reset after power-on-reset
> * all-zero: counters will be reset when all targets have zero remaining attempts
> ``global.bootchooser.reset_priorities``
> A space separated list of events that cause bootchooser to reset the priorities of
> all targets. Possible values:
> +
> * empty: priorities will never be reset
> * all-zero: priorities will be reset when all targets have zero priority
> ``global.bootchooser.retry``
> - If 1, bootchooser retries booting until one succeeds or no more valid targets exist.
> + If set to 1, bootchooser retries booting until one succeeds or no more valid targets
> + exist.
> ``global.bootchooser.state_prefix``
> - Variable prefix when bootchooser used with state framework as backend for storing runtime
> - data, see below.
> + Variable prefix when bootchooser is used with the state framework as backend for storing
> + runtime data, see below.
> ``global.bootchooser.targets``
> Space separated list of targets that are used. For each entry in the list a corresponding
> - set of ``global.bootchooser.<name>``. variables must exist.
> + set of ``global.bootchooser.<targetname>.<variablename>`` variables must exist.
> ``global.bootchooser.last_chosen``
> - bootchooser sets this to the target that was chosen on last boot (index)
> + bootchooser sets this to the target that was chosen on last boot (index).
>
> Using the State Framework as Backend for Runtime Variable Data
> --------------------------------------------------------------
> @@ -178,7 +181,7 @@ Settings
> - ``global.bootchooser.disable_on_zero_attempts=0``
> - ``global.bootchooser.retry=1``
> - ``global.boot.default="bootchooser recovery"``
> -- Userspace marks as good
> +- Userspace marks as good.
>
> Deployment
> ^^^^^^^^^^
> @@ -208,21 +211,22 @@ Settings
> - ``global.bootchooser.disable_on_zero_attempts=0``
> - ``global.bootchooser.retry=1``
> - ``global.boot.default="bootchooser recovery"``
> -- Userspace marks as good
> +- Userspace marks as good.
>
> Deployment
> ^^^^^^^^^^
>
> -#. barebox or flash robot fills all slots with valid systems
> +#. barebox or flash robot fills all slots with valid systems.
> #. barebox or flash robot marks slots as good or state contains non zero
> - defaults for the remaining_attempts / priorities
> + defaults for the remaining_attempts/priorities.
>
> Recovery
> ^^^^^^^^
> done by 'recovery' boot target which is booted after the bootchooser falls through due to
> the lack of bootable targets. This target can be:
> -- A system that will be booted as recovery
> -- A barebox script that will be started
> +
> +- A system that will be booted as recovery.
> +- A barebox script that will be started.
>
> Scenario 3
> ##########
> @@ -238,21 +242,22 @@ Settings
> - ``global.bootchooser.disable_on_zero_attempts=1``
> - ``global.bootchooser.retry=1``
> - ``global.boot.default="bootchooser recovery"``
> -- Userspace marks as good
> +- Userspace marks as good.
>
> Deployment
> ^^^^^^^^^^
>
> -- barebox or flash robot fills all slots with valid systems
> -- barebox or flash robot marks slots as good
> +#. barebox or flash robot fills all slots with valid systems.
> +#. barebox or flash robot marks slots as good.
>
> Recovery
> ^^^^^^^^
>
> Done by 'recovery' boot target which is booted after the bootchooser falls through
> due to the lack of bootable targets. This target can be:
> -- A system that will be booted as recovery
> -- A barebox script that will be started
> +
> +- A system that will be booted as recovery.
> +- A barebox script that will be started.
>
> Updating systems
> ----------------
> @@ -262,11 +267,11 @@ update is done under a running Linux system which can be one of the regular boot
> slots or a dedicated recovery system. For the regular slots updating is done like:
>
> - Set the priority of the inactive slot to 0.
> -- Update the inactive slot
> -- Set priority of the inactive slot to a higher value than the active slot
> -- Set remaining_attempts of the inactive slot to nonzero
> -- Reboot
> -- If necessary update the now inactive, not yet updated slot the same way
> +- Update the inactive slot.
> +- Set priority of the inactive slot to a higher value than the active slot.
> +- Set remaining_attempts of the inactive slot to nonzero.
> +- Reboot.
> +- If necessary update the now inactive, not yet updated slot the same way.
>
> One way of updating systems is using RAUC_ which integrates well with the bootchooser
> in barebox.
> --
> 2.10.2
>
>
> _______________________________________________
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> http://lists.infradead.org/mailman/listinfo/barebox
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Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
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* Re: [PATCH] environment: fix typo
From: Sascha Hauer @ 2016-11-23 9:46 UTC (permalink / raw)
To: Ulrich Ölmann; +Cc: Barebox List
In-Reply-To: <20161123075852.20882-1-u.oelmann@pengutronix.de>
On Wed, Nov 23, 2016 at 08:58:52AM +0100, Ulrich Ölmann wrote:
> Signed-off-by: Ulrich Ölmann <u.oelmann@pengutronix.de>
> ---
> common/environment.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Applied, thanks
Sascha
>
> diff --git a/common/environment.c b/common/environment.c
> index c9cef6322a06..0edf34b661d9 100644
> --- a/common/environment.c
> +++ b/common/environment.c
> @@ -382,7 +382,7 @@ EXPORT_SYMBOL(envfs_save);
> static int envfs_check_super(struct envfs_super *super, size_t *size)
> {
> if (ENVFS_32(super->magic) != ENVFS_MAGIC) {
> - printf("envfs: no envfs (magic mismatch) - envfs newer written?\n");
> + printf("envfs: no envfs (magic mismatch) - envfs never written?\n");
> return -EIO;
> }
>
> --
> 2.10.2
>
>
> _______________________________________________
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> http://lists.infradead.org/mailman/listinfo/barebox
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Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
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* [PATCH] mtd: m25p80: add support for Everspin MR25H40
From: Uwe Kleine-König @ 2016-11-24 20:59 UTC (permalink / raw)
To: barebox
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
drivers/mtd/devices/m25p80.c | 2 +-
drivers/mtd/spi-nor/spi-nor.c | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c
index 656a7f5ef045..8a67792125e3 100644
--- a/drivers/mtd/devices/m25p80.c
+++ b/drivers/mtd/devices/m25p80.c
@@ -179,7 +179,7 @@ static const struct platform_device_id m25p_ids[] = {
{"en25f32"}, {"en25p32"}, {"en25q32b"}, {"en25p64"},
{"en25q64"}, {"en25qh128"}, {"en25qh256"},
{"f25l32pa"},
- {"mr25h256"}, {"mr25h10"},
+ {"mr25h256"}, {"mr25h10"}, {"mr25h40"},
{"gd25q32"}, {"gd25q64"},
{"160s33b"}, {"320s33b"}, {"640s33b"},
{"mx25l2005a"}, {"mx25l4005a"}, {"mx25l8005"}, {"mx25l1606e"},
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 45be58623839..faeafe1bfb6a 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -504,6 +504,7 @@ static const struct spi_device_id spi_nor_ids[] = {
/* Everspin */
{ "mr25h256", CAT25_INFO( 32 * 1024, 1, 256, 2, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },
{ "mr25h10", CAT25_INFO(128 * 1024, 1, 256, 3, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },
+ { "mr25h40", CAT25_INFO(512 * 1024, 1, 256, 3, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },
/* Fujitsu */
{ "mb85rs1mt", INFO(0x047f27, 0, 128 * 1024, 1, SPI_NOR_NO_ERASE) },
--
2.10.2
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* [PATCH 4/6] fs: Remove O_TRUNC check for devices when open files
From: Teresa Remmet @ 2016-11-25 8:06 UTC (permalink / raw)
To: barebox
In-Reply-To: <1480061167-21590-1-git-send-email-t.remmet@phytec.de>
Don't check for the file type here. Devices may have truncate
callbacks. Otherwise the caller should check if O_TRUNC is possible.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
---
fs/fs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/fs/fs.c b/fs/fs.c
index b7e7c63..2b4659c 100644
--- a/fs/fs.c
+++ b/fs/fs.c
@@ -682,7 +682,7 @@ int open(const char *pathname, int flags, ...)
if (ret)
goto out;
- if (!(s.st_mode & S_IFCHR) && (flags & O_TRUNC)) {
+ if (flags & O_TRUNC) {
ret = fsdrv->truncate(&fsdev->dev, f, 0);
f->size = 0;
if (ret)
--
1.9.1
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* [PATCH 1/6] libfile: copy_file: Only open regular files with O_TRUNC
From: Teresa Remmet @ 2016-11-25 8:06 UTC (permalink / raw)
To: barebox
In-Reply-To: <1480061167-21590-1-git-send-email-t.remmet@phytec.de>
Device files can not truncate in the most cases. Check if the
destination is a regular file and open only those with O_TRUNC.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
---
lib/libfile.c | 22 ++++++++++++++++------
1 file changed, 16 insertions(+), 6 deletions(-)
diff --git a/lib/libfile.c b/lib/libfile.c
index cba2f02..049ec32 100644
--- a/lib/libfile.c
+++ b/lib/libfile.c
@@ -263,9 +263,10 @@ int copy_file(const char *src, const char *dst, int verbose)
int srcfd = 0, dstfd = 0;
int r, w;
int ret = 1, err1 = 0;
+ int mode;
void *buf;
int total = 0;
- struct stat statbuf;
+ struct stat srcstat, dststat;
rw_buf = xmalloc(RW_BUF_SIZE);
@@ -275,17 +276,26 @@ int copy_file(const char *src, const char *dst, int verbose)
goto out;
}
- dstfd = open(dst, O_WRONLY | O_CREAT | O_TRUNC);
+ ret = stat(dst, &dststat);
+ if (ret)
+ goto out;
+
+ mode = O_WRONLY | O_CREAT;
+
+ if (S_ISREG(dststat.st_mode))
+ mode |= O_TRUNC;
+
+ dstfd = open(dst, mode);
if (dstfd < 0) {
printf("could not open %s: %s\n", dst, errno_str());
goto out;
}
if (verbose) {
- if (stat(src, &statbuf) < 0)
- statbuf.st_size = 0;
+ if (stat(src, &srcstat) < 0)
+ srcstat.st_size = 0;
- init_progression_bar(statbuf.st_size);
+ init_progression_bar(srcstat.st_size);
}
while (1) {
@@ -310,7 +320,7 @@ int copy_file(const char *src, const char *dst, int verbose)
}
if (verbose) {
- if (statbuf.st_size && statbuf.st_size != FILESIZE_MAX)
+ if (srcstat.st_size && srcstat.st_size != FILESIZE_MAX)
show_progress(total);
else
show_progress(total / 16384);
--
1.9.1
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* [PATCH 0/6] ubi: remove character device flag from static volumes
From: Teresa Remmet @ 2016-11-25 8:06 UTC (permalink / raw)
To: barebox
Instead of marking static volume device files as character devices
introduced a truncate callback for device files.
This makes it possible to dump static ubi volumes from flash.
Teresa Remmet (6):
libfile: copy_file: Only open regular files with O_TRUNC
devfs: Add optional truncate callback for device files
ubi: Add truncate callback
fs: Remove O_TRUNC check for devices when open files
commands: ubi: ubiupdatevol: Open device with O_TRUNC
ubi: barebox: Remove character device flag from static volumes
commands/ubi.c | 2 +-
drivers/mtd/ubi/barebox.c | 19 ++++++++++++++++---
fs/devfs.c | 5 +++++
fs/fs.c | 2 +-
include/driver.h | 1 +
lib/libfile.c | 22 ++++++++++++++++------
6 files changed, 40 insertions(+), 11 deletions(-)
--
1.9.1
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* [PATCH 3/6] ubi: Add truncate callback
From: Teresa Remmet @ 2016-11-25 8:06 UTC (permalink / raw)
To: barebox
In-Reply-To: <1480061167-21590-1-git-send-email-t.remmet@phytec.de>
The size of static ubi volumes changes depending on the content.
Add truncate callback to handle resizes.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
---
drivers/mtd/ubi/barebox.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/drivers/mtd/ubi/barebox.c b/drivers/mtd/ubi/barebox.c
index 329cf45..2ad731a 100644
--- a/drivers/mtd/ubi/barebox.c
+++ b/drivers/mtd/ubi/barebox.c
@@ -162,6 +162,21 @@ static loff_t ubi_volume_cdev_lseek(struct cdev *cdev, loff_t ofs)
return ofs;
}
+static int ubi_volume_cdev_truncate(struct cdev *cdev, size_t size)
+{
+ struct ubi_volume_cdev_priv *priv = cdev->priv;
+ struct ubi_device *ubi = priv->ubi;
+ struct ubi_volume *vol = priv->vol;
+ uint64_t rsvd_bytes;
+
+ rsvd_bytes = (long long)vol->reserved_pebs *
+ ubi->leb_size - vol->data_pad;
+ if (size > rsvd_bytes)
+ return -ENOSPC;
+
+ return 0;
+}
+
static int ubi_volume_cdev_ioctl(struct cdev *cdev, int cmd, void *buf)
{
struct ubi_volume_cdev_priv *priv = cdev->priv;
@@ -210,6 +225,7 @@ static struct file_operations ubi_volume_fops = {
.write = ubi_volume_cdev_write,
.lseek = ubi_volume_cdev_lseek,
.ioctl = ubi_volume_cdev_ioctl,
+ .truncate = ubi_volume_cdev_truncate,
};
int ubi_volume_cdev_add(struct ubi_device *ubi, struct ubi_volume *vol)
--
1.9.1
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* [PATCH 2/6] devfs: Add optional truncate callback for device files
From: Teresa Remmet @ 2016-11-25 8:06 UTC (permalink / raw)
To: barebox
In-Reply-To: <1480061167-21590-1-git-send-email-t.remmet@phytec.de>
Not all device files have trivial fix device sizes like static
ubi volumes. Here the device file size equals the image size it contains.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
---
fs/devfs.c | 5 +++++
include/driver.h | 1 +
2 files changed, 6 insertions(+)
diff --git a/fs/devfs.c b/fs/devfs.c
index 6fabcf8..2a7b1b3 100644
--- a/fs/devfs.c
+++ b/fs/devfs.c
@@ -168,6 +168,11 @@ static int devfs_ioctl(struct device_d *_dev, FILE *f, int request, void *buf)
static int devfs_truncate(struct device_d *dev, FILE *f, ulong size)
{
+ struct cdev *cdev = f->priv;
+
+ if (cdev->ops->truncate)
+ return cdev->ops->truncate(cdev, size);
+
if (f->fsdev->dev.num_resources < 1)
return -ENOSPC;
if (size > resource_size(&f->fsdev->dev.resource[0]))
diff --git a/include/driver.h b/include/driver.h
index 80aa8d8..6abaaad 100644
--- a/include/driver.h
+++ b/include/driver.h
@@ -434,6 +434,7 @@ struct file_operations {
int (*erase)(struct cdev*, loff_t count, loff_t offset);
int (*protect)(struct cdev*, size_t count, loff_t offset, int prot);
int (*memmap)(struct cdev*, void **map, int flags);
+ int (*truncate)(struct cdev*, size_t size);
};
#define MAX_PARTUUID_STR sizeof("00112233-4455-6677-8899-AABBCCDDEEFF")
--
1.9.1
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* [PATCH 5/6] commands: ubi: ubiupdatevol: Open device with O_TRUNC
From: Teresa Remmet @ 2016-11-25 8:06 UTC (permalink / raw)
To: barebox
In-Reply-To: <1480061167-21590-1-git-send-email-t.remmet@phytec.de>
Static ubi volumes should be opend with O_TRUNC as the device file
size equals the content.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
---
commands/ubi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/commands/ubi.c b/commands/ubi.c
index 4c445d2..5e27584 100644
--- a/commands/ubi.c
+++ b/commands/ubi.c
@@ -42,7 +42,7 @@ static int do_ubiupdatevol(int argc, char *argv[])
return 1;
}
- fd_vol = open(argv[optind], O_WRONLY);
+ fd_vol = open(argv[optind], O_WRONLY | O_TRUNC);
if (fd_vol < 0) {
perror("open volume");
ret = 1;
--
1.9.1
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* [PATCH 6/6] ubi: barebox: Remove character device flag from static volumes
From: Teresa Remmet @ 2016-11-25 8:06 UTC (permalink / raw)
To: barebox
In-Reply-To: <1480061167-21590-1-git-send-email-t.remmet@phytec.de>
Character device flag was set for ubi static volumes to vary the device
file size. This is now done with the truncate option. So no need for
the character device flag. This makes it also possible to dump a image from
the static volume.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
---
drivers/mtd/ubi/barebox.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/mtd/ubi/barebox.c b/drivers/mtd/ubi/barebox.c
index 2ad731a..d67e566 100644
--- a/drivers/mtd/ubi/barebox.c
+++ b/drivers/mtd/ubi/barebox.c
@@ -244,9 +244,6 @@ int ubi_volume_cdev_add(struct ubi_device *ubi, struct ubi_volume *vol)
cdev->priv = priv;
cdev->size = vol->used_bytes;
- if (vol->vol_type == UBI_STATIC_VOLUME)
- cdev->flags = DEVFS_IS_CHARACTER_DEV;
-
cdev->dev = &vol->dev;
ubi_msg(ubi, "registering %s as /dev/%s", vol->name, cdev->name);
ret = devfs_create(cdev);
--
1.9.1
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* [PATCH 1/2] fixup! gpio: Add GPIO driver for Vybrid
From: Andrey Smirnov @ 2016-11-25 21:07 UTC (permalink / raw)
To: barebox; +Cc: Andrey Smirnov
---
Sascha,
It looks like the two affected patches haven't hit 'master' yet, so I
am hoping these two fixups could be incorporated into 'next'.
First fixup removes unused constants (leftover from kernel code) and
second adda two lines to configure clock for ESDHC0 (original code
only configured ESDHC1)
If you want these as separate patches, let me know
Thanks,
Andrey
drivers/gpio/gpio-vf610.c | 15 ---------------
1 file changed, 15 deletions(-)
diff --git a/drivers/gpio/gpio-vf610.c b/drivers/gpio/gpio-vf610.c
index c82723f..7c8d1e4 100644
--- a/drivers/gpio/gpio-vf610.c
+++ b/drivers/gpio/gpio-vf610.c
@@ -39,21 +39,6 @@ struct vf610_gpio_port {
#define GPIO_PTOR 0x0c
#define GPIO_PDIR 0x10
-#define PORT_PCR(n) ((n) * 0x4)
-#define PORT_PCR_IRQC_OFFSET 16
-
-#define PORT_ISFR 0xa0
-#define PORT_DFER 0xc0
-#define PORT_DFCR 0xc4
-#define PORT_DFWR 0xc8
-
-#define PORT_INT_OFF 0x0
-#define PORT_INT_LOGIC_ZERO 0x8
-#define PORT_INT_RISING_EDGE 0x9
-#define PORT_INT_FALLING_EDGE 0xa
-#define PORT_INT_EITHER_EDGE 0xb
-#define PORT_INT_LOGIC_ONE 0xc
-
static const struct of_device_id vf610_gpio_dt_ids[] = {
{ .compatible = "fsl,vf610-gpio" },
{ /* sentinel */ }
--
2.5.5
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* [PATCH 2/2] fixup! i.MX: Add VF610 clock tree initialization code
From: Andrey Smirnov @ 2016-11-25 21:07 UTC (permalink / raw)
To: barebox; +Cc: Andrey Smirnov
In-Reply-To: <1480108031-17889-1-git-send-email-andrew.smirnov@gmail.com>
---
drivers/clk/imx/clk-vf610.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/clk/imx/clk-vf610.c b/drivers/clk/imx/clk-vf610.c
index 1cf2b65..34400b9 100644
--- a/drivers/clk/imx/clk-vf610.c
+++ b/drivers/clk/imx/clk-vf610.c
@@ -431,6 +431,9 @@ static void __init vf610_clocks_init(struct device_node *ccm_node)
clk_set_parent(clk[VF610_CLK_ESDHC1_SEL], clk[VF610_CLK_PLL1_PFD3]);
clk_set_rate(clk[VF610_CLK_ESDHC1_DIV], clk_get_rate(clk[VF610_CLK_PLL1_PFD3]) / 9);
+ clk_set_parent(clk[VF610_CLK_ESDHC0_SEL], clk[VF610_CLK_PLL1_PFD3]);
+ clk_set_rate(clk[VF610_CLK_ESDHC0_DIV], clk_get_rate(clk[VF610_CLK_PLL1_PFD3]) / 9);
+
clk_set_parent(clk[VF610_CLK_SAI0_SEL], clk[VF610_CLK_AUDIO_EXT]);
clk_set_parent(clk[VF610_CLK_SAI1_SEL], clk[VF610_CLK_AUDIO_EXT]);
clk_set_parent(clk[VF610_CLK_SAI2_SEL], clk[VF610_CLK_AUDIO_EXT]);
--
2.5.5
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* [PATCH 1/3] ARM: dts: phycore-imx6: refactor fec nodes
From: Stefan Lengfeld @ 2016-11-28 8:44 UTC (permalink / raw)
To: barebox
Refactor the common settings for device tree node 'fec' into the generic
phycore i.MX6 device tree file. This avoid redundant settings and makes
common fixes easier. Our kernel device tree files have the same layout.
Signed-off-by: Stefan Lengfeld <s.lengfeld@phytec.de>
---
arch/arm/dts/imx6dl-phytec-phycore-som-emmc.dts | 17 ++++-------------
arch/arm/dts/imx6dl-phytec-phycore-som-nand.dts | 17 ++++-------------
arch/arm/dts/imx6q-phytec-phycore-som-emmc.dts | 17 ++++-------------
arch/arm/dts/imx6q-phytec-phycore-som-nand.dts | 17 ++++-------------
arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi | 13 +++++++++++++
5 files changed, 29 insertions(+), 52 deletions(-)
diff --git a/arch/arm/dts/imx6dl-phytec-phycore-som-emmc.dts b/arch/arm/dts/imx6dl-phytec-phycore-som-emmc.dts
index fc153a6..bffee5f 100644
--- a/arch/arm/dts/imx6dl-phytec-phycore-som-emmc.dts
+++ b/arch/arm/dts/imx6dl-phytec-phycore-som-emmc.dts
@@ -29,21 +29,12 @@
status = "okay";
};
+ðphy {
+ max-speed = <100>;
+};
+
&fec {
status = "okay";
- phy-handle = <ðphy>;
- phy-mode = "rgmii";
- phy-reset-gpios = <&gpio1 14 1>;
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
-
- ethphy: ethernet-phy@3 {
- reg = <3>;
- max-speed = <100>;
- };
- };
};
&flash {
diff --git a/arch/arm/dts/imx6dl-phytec-phycore-som-nand.dts b/arch/arm/dts/imx6dl-phytec-phycore-som-nand.dts
index 3f2f1c7..1b66fda 100644
--- a/arch/arm/dts/imx6dl-phytec-phycore-som-nand.dts
+++ b/arch/arm/dts/imx6dl-phytec-phycore-som-nand.dts
@@ -24,21 +24,12 @@
status = "okay";
};
+ðphy {
+ max-speed = <100>;
+};
+
&fec {
status = "okay";
- phy-handle = <ðphy>;
- phy-mode = "rgmii";
- phy-reset-gpios = <&gpio1 14 1>;
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
-
- ethphy: ethernet-phy@3 {
- reg = <3>;
- max-speed = <100>;
- };
- };
};
&gpmi {
diff --git a/arch/arm/dts/imx6q-phytec-phycore-som-emmc.dts b/arch/arm/dts/imx6q-phytec-phycore-som-emmc.dts
index 74bc09b..ecc5aa3 100644
--- a/arch/arm/dts/imx6q-phytec-phycore-som-emmc.dts
+++ b/arch/arm/dts/imx6q-phytec-phycore-som-emmc.dts
@@ -28,21 +28,12 @@
status = "okay";
};
+ðphy {
+ max-speed = <1000>;
+};
+
&fec {
status = "okay";
- phy-handle = <ðphy>;
- phy-mode = "rgmii";
- phy-reset-gpios = <&gpio1 14 1>;
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
-
- ethphy: ethernet-phy@3 {
- reg = <3>;
- max-speed = <1000>;
- };
- };
};
&flash {
diff --git a/arch/arm/dts/imx6q-phytec-phycore-som-nand.dts b/arch/arm/dts/imx6q-phytec-phycore-som-nand.dts
index aa2c94a..9ad7eda 100644
--- a/arch/arm/dts/imx6q-phytec-phycore-som-nand.dts
+++ b/arch/arm/dts/imx6q-phytec-phycore-som-nand.dts
@@ -29,21 +29,12 @@
status = "okay";
};
+ðphy {
+ max-speed = <1000>;
+};
+
&fec {
status = "okay";
- phy-handle = <ðphy>;
- phy-mode = "rgmii";
- phy-reset-gpios = <&gpio1 14 1>;
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
-
- ethphy: ethernet-phy@3 {
- reg = <3>;
- max-speed = <1000>;
- };
- };
};
&flash {
diff --git a/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi b/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
index d446a5e..9649817 100644
--- a/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
+++ b/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
@@ -10,6 +10,7 @@
*/
#include "imx6qdl.dtsi"
+#include <dt-bindings/gpio/gpio.h>
/ {
chosen {
@@ -76,7 +77,19 @@
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
+ phy-handle = <ðphy>;
+ phy-mode = "rgmii";
+ phy-reset-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
status = "disabled";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethphy: ethernet-phy@3 {
+ reg = <3>;
+ };
+ };
};
&gpmi {
--
1.9.1
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* [PATCH 3/3] ARM: dts: phycore-imx6: remove unnecessary include
From: Stefan Lengfeld @ 2016-11-28 8:45 UTC (permalink / raw)
To: barebox
In-Reply-To: <1480322700-3529-1-git-send-email-s.lengfeld@phytec.de>
The file 'imx6qdl.dtsi' is already included by DualLite/Solo and
Dual/Quad specific files 'imx6dl.dtsi' and 'imx6q.dtsi'. So the include
is not needed here.
Signed-off-by: Stefan Lengfeld <s.lengfeld@phytec.de>
---
arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi b/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
index 76777e8..1e04ce1 100644
--- a/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
+++ b/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
@@ -9,7 +9,6 @@
* http://www.gnu.org/copyleft/gpl.html
*/
-#include "imx6qdl.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
--
1.9.1
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* [PATCH 2/3] ARM: dts: phycore-imx6: fix missing ?xc-skew-ps settings for ethphy
From: Stefan Lengfeld @ 2016-11-28 8:44 UTC (permalink / raw)
To: barebox
In-Reply-To: <1480322700-3529-1-git-send-email-s.lengfeld@phytec.de>
Add the missing txc-skew-ps and rxc-skew-ps settings for the Micrel PHY.
I have seen problems with 1GBit ethernet on a phyCORE-i.MX6 Solo. Oddly
enough the missing skew values are no problems for all our other
modules.
Signed-off-by: Stefan Lengfeld <s.lengfeld@phytec.de>
---
arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi b/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
index 9649817..76777e8 100644
--- a/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
+++ b/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
@@ -88,6 +88,8 @@
ethphy: ethernet-phy@3 {
reg = <3>;
+ txc-skew-ps = <1680>;
+ rxc-skew-ps = <1860>;
};
};
};
--
1.9.1
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* [PATCH 2/4] ARM i.MX: add SoC type detection for i.MX6SL
From: Alexander Kurz @ 2016-11-28 9:27 UTC (permalink / raw)
To: barebox; +Cc: Alexander Kurz
In-Reply-To: <1480325255-17750-1-git-send-email-akurz@blala.de>
The i.MX6 series SoC type is determined by barebox by examining the
USB_ANALOG_DIGPROG aka IMX6_ANATOP_SI_REV register. This register is located
at a common offset for all mx6 SoC - except for i.MX6SL where a different
offset is used. This creates a dilemma while distinguishing the mx6sl from
non-mx6sl SOC since the SoC type identification register location is type
specific itself.
Access to undocumented and probably invalid or unpredictable registers should
be avoided as possible. For the mx6sl detection an access to the general
USB_ANALOG_DIGPROG @0x260 cannot be avoided when running on mx6sl. This
register contained the value 0x00014009 for different mx6sl Rev. 1.2 based
e-book readers using MCIMX6L7DVN10AB and MCIMX6L8DVN10AB SoC. This
implementation assumes the value of MAJOR_UPPER (here 0x01) to be smaller
than the smallest non-6sl MAJOR_UPPER (0x61 for mx6s).
Signed-off-by: Alexander Kurz <akurz@blala.de>
---
arch/arm/mach-imx/Kconfig | 4 ++++
arch/arm/mach-imx/imx6.c | 3 +++
arch/arm/mach-imx/include/mach/imx6.h | 19 ++++++++++++++++++-
3 files changed, 25 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 3b51803..9b30095 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -147,6 +147,10 @@ config ARCH_IMX6
select COMMON_CLK_OF_PROVIDER
select HW_HAS_PCI
+config ARCH_IMX6SL
+ bool
+ select ARCH_IMX6
+
config ARCH_IMX6SX
bool
select ARCH_IMX6
diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c
index b2979b0..44a8dbe 100644
--- a/arch/arm/mach-imx/imx6.c
+++ b/arch/arm/mach-imx/imx6.c
@@ -151,6 +151,9 @@ int imx6_init(void)
case IMX6_CPUTYPE_IMX6S:
cputypestr = "i.MX6 Solo";
break;
+ case IMX6_CPUTYPE_IMX6SL:
+ cputypestr = "i.MX6 SoloLite";
+ break;
case IMX6_CPUTYPE_IMX6SX:
cputypestr = "i.MX6 SoloX";
break;
diff --git a/arch/arm/mach-imx/include/mach/imx6.h b/arch/arm/mach-imx/include/mach/imx6.h
index e201721..327676b 100644
--- a/arch/arm/mach-imx/include/mach/imx6.h
+++ b/arch/arm/mach-imx/include/mach/imx6.h
@@ -9,7 +9,9 @@
void imx6_init_lowlevel(void);
#define IMX6_ANATOP_SI_REV 0x260
+#define IMX6SL_ANATOP_SI_REV 0x280
+#define IMX6_CPUTYPE_IMX6SL 0x160
#define IMX6_CPUTYPE_IMX6S 0x161
#define IMX6_CPUTYPE_IMX6DL 0x261
#define IMX6_CPUTYPE_IMX6SX 0x462
@@ -36,6 +38,16 @@ static inline int __imx6_cpu_type(void)
val = readl(MX6_ANATOP_BASE_ADDR + IMX6_ANATOP_SI_REV);
val = (val >> 16) & 0xff;
+ /* non-MX6-standard SI_REV reg offset for MX6SL */
+ if (IS_ENABLED(CONFIG_ARCH_IMX6SL) &&
+ val < (IMX6_CPUTYPE_IMX6S & 0xff)) {
+ uint32_t tmp;
+ tmp = readl(MX6_ANATOP_BASE_ADDR + IMX6SL_ANATOP_SI_REV);
+ tmp = (tmp >> 16) & 0xff;
+ if ((IMX6_CPUTYPE_IMX6SL & 0xff) == tmp)
+ /* intentionally skip scu_get_core_count() for MX6SL */
+ return IMX6_CPUTYPE_IMX6SL;
+ }
val |= scu_get_core_count() << 8;
@@ -68,14 +80,19 @@ DEFINE_MX6_CPU_TYPE(mx6dl, IMX6_CPUTYPE_IMX6DL);
DEFINE_MX6_CPU_TYPE(mx6q, IMX6_CPUTYPE_IMX6Q);
DEFINE_MX6_CPU_TYPE(mx6d, IMX6_CPUTYPE_IMX6D);
DEFINE_MX6_CPU_TYPE(mx6sx, IMX6_CPUTYPE_IMX6SX);
+DEFINE_MX6_CPU_TYPE(mx6sl, IMX6_CPUTYPE_IMX6SL);
DEFINE_MX6_CPU_TYPE(mx6ul, IMX6_CPUTYPE_IMX6UL);
static inline int __imx6_cpu_revision(void)
{
uint32_t rev;
+ uint32_t si_rev_offset = IMX6_ANATOP_SI_REV;
+
+ if (IS_ENABLED(CONFIG_ARCH_IMX6SL) && cpu_mx6_is_mx6sl())
+ si_rev_offset = IMX6SL_ANATOP_SI_REV;
- rev = readl(MX6_ANATOP_BASE_ADDR + IMX6_ANATOP_SI_REV);
+ rev = readl(MX6_ANATOP_BASE_ADDR + si_rev_offset);
switch (rev & 0xfff) {
case 0x00:
--
2.1.4
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* [PATCH 4/4] ARM i.MX: Add i.MX6SL support
From: Alexander Kurz @ 2016-11-28 9:27 UTC (permalink / raw)
To: barebox; +Cc: Alexander Kurz
In-Reply-To: <1480325255-17750-1-git-send-email-akurz@blala.de>
Most i.MX6SL infrastructure is already covered in barebox by general i.MX6
support. Missing infrastructure provided in separate commits are
* USB id for scripts imx-usb-loader
* SoC type detection
* Clock infrastructure
Add the remaining bits and pieces to provide barebox i.MX6SL SoC support.
Signed-off-by: Alexander Kurz <akurz@blala.de>
---
arch/arm/mach-imx/imx.c | 2 ++
drivers/clk/imx/Makefile | 1 +
drivers/pinctrl/imx-iomux-v3.c | 4 +++-
3 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/imx.c b/arch/arm/mach-imx/imx.c
index 952db00..1eea275 100644
--- a/arch/arm/mach-imx/imx.c
+++ b/arch/arm/mach-imx/imx.c
@@ -61,6 +61,8 @@ static int imx_soc_from_dt(void)
return IMX_CPU_IMX6;
if (of_machine_is_compatible("fsl,imx6sx"))
return IMX_CPU_IMX6;
+ if (of_machine_is_compatible("fsl,imx6sl"))
+ return IMX_CPU_IMX6;
if (of_machine_is_compatible("fsl,imx6qp"))
return IMX_CPU_IMX6;
if (of_machine_is_compatible("fsl,imx6ul"))
diff --git a/drivers/clk/imx/Makefile b/drivers/clk/imx/Makefile
index 65d7859..527d5e8 100644
--- a/drivers/clk/imx/Makefile
+++ b/drivers/clk/imx/Makefile
@@ -18,5 +18,6 @@ obj-$(CONFIG_ARCH_IMX51) += clk-imx5.o
obj-$(CONFIG_ARCH_IMX53) += clk-imx5.o
obj-$(CONFIG_ARCH_IMX6) += clk-imx6.o
obj-$(CONFIG_ARCH_IMX6SX) += clk-imx6sx.o
+obj-$(CONFIG_ARCH_IMX6SL) += clk-imx6sl.o
obj-$(CONFIG_ARCH_IMX6UL) += clk-imx6ul.o
obj-$(CONFIG_ARCH_VF610) += clk-vf610.o
diff --git a/drivers/pinctrl/imx-iomux-v3.c b/drivers/pinctrl/imx-iomux-v3.c
index 4b3f033..7d24a87 100644
--- a/drivers/pinctrl/imx-iomux-v3.c
+++ b/drivers/pinctrl/imx-iomux-v3.c
@@ -202,9 +202,11 @@ static __maybe_unused struct of_device_id imx_iomux_v3_dt_ids[] = {
.compatible = "fsl,imx53-iomuxc",
}, {
.compatible = "fsl,imx6q-iomuxc",
- }, {
+ }, {
.compatible = "fsl,imx6dl-iomuxc",
}, {
+ .compatible = "fsl,imx6sl-iomuxc",
+ }, {
.compatible = "fsl,imx6sx-iomuxc",
}, {
.compatible = "fsl,imx6ul-iomuxc",
--
2.1.4
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* [PATCH 1/4] ARM i.MX: move cpu_type macros in front of cpu_revision code
From: Alexander Kurz @ 2016-11-28 9:27 UTC (permalink / raw)
To: barebox; +Cc: Alexander Kurz
Preparational commit to enable the use of cpu_type macros in imx6_cpu_revision()
Signed-off-by: Alexander Kurz <akurz@blala.de>
---
arch/arm/mach-imx/include/mach/imx6.h | 40 +++++++++++++++++------------------
1 file changed, 20 insertions(+), 20 deletions(-)
diff --git a/arch/arm/mach-imx/include/mach/imx6.h b/arch/arm/mach-imx/include/mach/imx6.h
index 8c169f1..e201721 100644
--- a/arch/arm/mach-imx/include/mach/imx6.h
+++ b/arch/arm/mach-imx/include/mach/imx6.h
@@ -50,6 +50,26 @@ static inline int imx6_cpu_type(void)
return __imx6_cpu_type();
}
+#define DEFINE_MX6_CPU_TYPE(str, type) \
+ static inline int cpu_mx6_is_##str(void) \
+ { \
+ return __imx6_cpu_type() == type; \
+ } \
+ \
+ static inline int cpu_is_##str(void) \
+ { \
+ if (!cpu_is_mx6()) \
+ return 0; \
+ return cpu_mx6_is_##str(); \
+ }
+
+DEFINE_MX6_CPU_TYPE(mx6s, IMX6_CPUTYPE_IMX6S);
+DEFINE_MX6_CPU_TYPE(mx6dl, IMX6_CPUTYPE_IMX6DL);
+DEFINE_MX6_CPU_TYPE(mx6q, IMX6_CPUTYPE_IMX6Q);
+DEFINE_MX6_CPU_TYPE(mx6d, IMX6_CPUTYPE_IMX6D);
+DEFINE_MX6_CPU_TYPE(mx6sx, IMX6_CPUTYPE_IMX6SX);
+DEFINE_MX6_CPU_TYPE(mx6ul, IMX6_CPUTYPE_IMX6UL);
+
static inline int __imx6_cpu_revision(void)
{
@@ -85,24 +105,4 @@ static inline int imx6_cpu_revision(void)
return __imx6_cpu_revision();
}
-#define DEFINE_MX6_CPU_TYPE(str, type) \
- static inline int cpu_mx6_is_##str(void) \
- { \
- return __imx6_cpu_type() == type; \
- } \
- \
- static inline int cpu_is_##str(void) \
- { \
- if (!cpu_is_mx6()) \
- return 0; \
- return cpu_mx6_is_##str(); \
- }
-
-DEFINE_MX6_CPU_TYPE(mx6s, IMX6_CPUTYPE_IMX6S);
-DEFINE_MX6_CPU_TYPE(mx6dl, IMX6_CPUTYPE_IMX6DL);
-DEFINE_MX6_CPU_TYPE(mx6q, IMX6_CPUTYPE_IMX6Q);
-DEFINE_MX6_CPU_TYPE(mx6d, IMX6_CPUTYPE_IMX6D);
-DEFINE_MX6_CPU_TYPE(mx6sx, IMX6_CPUTYPE_IMX6SX);
-DEFINE_MX6_CPU_TYPE(mx6ul, IMX6_CPUTYPE_IMX6UL);
-
#endif /* __MACH_IMX6_H */
--
2.1.4
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* [PATCH 3/4] ARM: i.MX6SL: import clock infrastructure from linux
From: Alexander Kurz @ 2016-11-28 9:27 UTC (permalink / raw)
To: barebox; +Cc: Alexander Kurz
In-Reply-To: <1480325255-17750-1-git-send-email-akurz@blala.de>
Import i.MX6SL clock infrastructure from linux clk-imx6sl.c
To save space, clocks beeing unlikely usefull for bootloader purposes
(SSI, SPDIF, EXTERN_AUDIO) were not imported.
Further, the fixup code from linux mainline commits
a49e6c4b8204 ("ARM: imx: add common clock support for fixup mux")
cbe7fc8aaeef ("ARM: imx: add common clock support for fixup div")
was ignored for this commit.
Signed-off-by: Alexander Kurz <akurz@blala.de>
---
drivers/clk/imx/clk-imx6sl.c | 329 +++++++++++++++++++++++++++++++++++++++++++
1 file changed, 329 insertions(+)
create mode 100644 drivers/clk/imx/clk-imx6sl.c
diff --git a/drivers/clk/imx/clk-imx6sl.c b/drivers/clk/imx/clk-imx6sl.c
new file mode 100644
index 0000000..89ede76
--- /dev/null
+++ b/drivers/clk/imx/clk-imx6sl.c
@@ -0,0 +1,329 @@
+/*
+ * Copyright (C) 2014 Freescale Semiconductor, Inc.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <dt-bindings/clock/imx6sl-clock.h>
+#include <common.h>
+#include <init.h>
+#include <driver.h>
+#include <linux/clk.h>
+#include <io.h>
+#include <of.h>
+#include <linux/clkdev.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <mach/imx6-regs.h>
+#include <mach/revision.h>
+#include <mach/imx6.h>
+
+#include "clk.h"
+#include "common.h"
+
+static const char *step_sels[] = { "osc", "pll2_pfd2", };
+static const char *pll1_sw_sels[] = { "pll1_sys", "step", };
+static const char *ocram_alt_sels[] = { "pll2_pfd2", "pll3_pfd1", };
+static const char *ocram_sels[] = { "periph", "ocram_alt_sels", };
+static const char *pre_periph_sels[] = { "pll2_bus", "pll2_pfd2", "pll2_pfd0", "pll2_198m", };
+static const char *periph_clk2_sels[] = { "pll3_usb_otg", "osc", "osc", "dummy", };
+static const char *periph2_clk2_sels[] = { "pll3_usb_otg", "pll2_bus", };
+static const char *periph_sels[] = { "pre_periph_sel", "periph_clk2_podf", };
+static const char *periph2_sels[] = { "pre_periph2_sel", "periph2_clk2_podf", };
+static const char *csi_sels[] = { "osc", "pll2_pfd2", "pll3_120m", "pll3_pfd1", };
+static const char *lcdif_axi_sels[] = { "pll2_bus", "pll2_pfd2", "pll3_usb_otg", "pll3_pfd1", };
+static const char *usdhc_sels[] = { "pll2_pfd2", "pll2_pfd0", };
+static const char *perclk_sels[] = { "ipg", "osc", };
+static const char *pxp_axi_sels[] = { "pll2_bus", "pll3_usb_otg", "pll5_video_div", "pll2_pfd0", "pll2_pfd2", "pll3_pfd3", };
+static const char *epdc_axi_sels[] = { "pll2_bus", "pll3_usb_otg", "pll5_video_div", "pll2_pfd0", "pll2_pfd2", "pll3_pfd2", };
+static const char *gpu2d_ovg_sels[] = { "pll3_pfd1", "pll3_usb_otg", "pll2_bus", "pll2_pfd2", };
+static const char *gpu2d_sels[] = { "pll2_pfd2", "pll3_usb_otg", "pll3_pfd1", "pll2_bus", };
+static const char *lcdif_pix_sels[] = { "pll2_bus", "pll3_usb_otg", "pll5_video_div", "pll2_pfd0", "pll3_pfd0", "pll3_pfd1", };
+static const char *epdc_pix_sels[] = { "pll2_bus", "pll3_usb_otg", "pll5_video_div", "pll2_pfd0", "pll2_pfd1", "pll3_pfd1", };
+static const char *ecspi_sels[] = { "pll3_60m", "osc", };
+static const char *uart_sels[] = { "pll3_80m", "osc", };
+static const char *lvds_sels[] = {
+ "pll1_sys", "pll2_bus", "pll2_pfd0", "pll2_pfd1", "pll2_pfd2", "dummy", "pll4_audio", "pll5_video",
+ "dummy", "enet_ref", "dummy", "dummy", "pll3_usb_otg", "pll7_usb_host", "pll3_pfd0", "pll3_pfd1",
+ "pll3_pfd2", "pll3_pfd3", "osc", "dummy", "dummy", "dummy", "dummy", "dummy",
+ "dummy", "dummy", "dummy", "dummy", "dummy", "dummy", "dummy", "dummy",
+};
+static const char *pll_bypass_src_sels[] = { "osc", "lvds1_in", };
+static const char *pll1_bypass_sels[] = { "pll1", "pll1_bypass_src", };
+static const char *pll2_bypass_sels[] = { "pll2", "pll2_bypass_src", };
+static const char *pll3_bypass_sels[] = { "pll3", "pll3_bypass_src", };
+static const char *pll4_bypass_sels[] = { "pll4", "pll4_bypass_src", };
+static const char *pll5_bypass_sels[] = { "pll5", "pll5_bypass_src", };
+static const char *pll6_bypass_sels[] = { "pll6", "pll6_bypass_src", };
+static const char *pll7_bypass_sels[] = { "pll7", "pll7_bypass_src", };
+
+static struct clk *clks[IMX6SL_CLK_END];
+static struct clk_onecell_data clk_data;
+
+static struct clk_div_table clk_enet_ref_table[] = {
+ { .val = 0, .div = 20, },
+ { .val = 1, .div = 10, },
+ { .val = 2, .div = 5, },
+ { .val = 3, .div = 4, },
+ { }
+};
+
+static struct clk_div_table post_div_table[] = {
+ { .val = 2, .div = 1, },
+ { .val = 1, .div = 2, },
+ { .val = 0, .div = 4, },
+ { }
+};
+
+static struct clk_div_table video_div_table[] = {
+ { .val = 0, .div = 1, },
+ { .val = 1, .div = 2, },
+ { .val = 2, .div = 1, },
+ { .val = 3, .div = 4, },
+ { }
+};
+
+static int imx6sl_ccm_probe(struct device_d *dev)
+{
+ struct resource *iores;
+ void __iomem *base, *anatop_base, *ccm_base;
+ struct device_node *ccm_node = dev->device_node;
+
+ clks[IMX6SL_CLK_DUMMY] = clk_fixed("dummy", 0);
+
+ anatop_base = (void *)MX6_ANATOP_BASE_ADDR;
+ iores = dev_request_mem_resource(dev, 0);
+ if (IS_ERR(iores))
+ return PTR_ERR(iores);
+ ccm_base = IOMEM(iores->start);
+
+ base = anatop_base;
+
+ clks[IMX6SL_PLL1_BYPASS_SRC] = imx_clk_mux("pll1_bypass_src", base + 0x00, 14, 1, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));
+ clks[IMX6SL_PLL2_BYPASS_SRC] = imx_clk_mux("pll2_bypass_src", base + 0x30, 14, 1, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));
+ clks[IMX6SL_PLL3_BYPASS_SRC] = imx_clk_mux("pll3_bypass_src", base + 0x10, 14, 1, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));
+ clks[IMX6SL_PLL4_BYPASS_SRC] = imx_clk_mux("pll4_bypass_src", base + 0x70, 14, 1, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));
+ clks[IMX6SL_PLL5_BYPASS_SRC] = imx_clk_mux("pll5_bypass_src", base + 0xa0, 14, 1, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));
+ clks[IMX6SL_PLL6_BYPASS_SRC] = imx_clk_mux("pll6_bypass_src", base + 0xe0, 14, 1, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));
+ clks[IMX6SL_PLL7_BYPASS_SRC] = imx_clk_mux("pll7_bypass_src", base + 0x20, 14, 1, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));
+
+ /* type name parent_name base div_mask */
+ clks[IMX6SL_CLK_PLL1] = imx_clk_pllv3(IMX_PLLV3_SYS, "pll1", "osc", base + 0x00, 0x7f);
+ clks[IMX6SL_CLK_PLL2] = imx_clk_pllv3(IMX_PLLV3_GENERIC, "pll2", "osc", base + 0x30, 0x1);
+ clks[IMX6SL_CLK_PLL3] = imx_clk_pllv3(IMX_PLLV3_USB, "pll3", "osc", base + 0x10, 0x3);
+ clks[IMX6SL_CLK_PLL4] = imx_clk_pllv3(IMX_PLLV3_AV, "pll4", "osc", base + 0x70, 0x7f);
+ clks[IMX6SL_CLK_PLL5] = imx_clk_pllv3(IMX_PLLV3_AV, "pll5", "osc", base + 0xa0, 0x7f);
+ clks[IMX6SL_CLK_PLL6] = imx_clk_pllv3(IMX_PLLV3_ENET, "pll6", "osc", base + 0xe0, 0x3);
+ clks[IMX6SL_CLK_PLL7] = imx_clk_pllv3(IMX_PLLV3_USB, "pll7", "osc", base + 0x20, 0x3);
+
+ clks[IMX6SL_PLL1_BYPASS] = imx_clk_mux_p("pll1_bypass", base + 0x00, 16, 1, pll1_bypass_sels, ARRAY_SIZE(pll1_bypass_sels));
+ clks[IMX6SL_PLL2_BYPASS] = imx_clk_mux_p("pll2_bypass", base + 0x30, 16, 1, pll2_bypass_sels, ARRAY_SIZE(pll2_bypass_sels));
+ clks[IMX6SL_PLL3_BYPASS] = imx_clk_mux_p("pll3_bypass", base + 0x10, 16, 1, pll3_bypass_sels, ARRAY_SIZE(pll3_bypass_sels));
+ clks[IMX6SL_PLL4_BYPASS] = imx_clk_mux_p("pll4_bypass", base + 0x70, 16, 1, pll4_bypass_sels, ARRAY_SIZE(pll4_bypass_sels));
+ clks[IMX6SL_PLL5_BYPASS] = imx_clk_mux_p("pll5_bypass", base + 0xa0, 16, 1, pll5_bypass_sels, ARRAY_SIZE(pll5_bypass_sels));
+ clks[IMX6SL_PLL6_BYPASS] = imx_clk_mux_p("pll6_bypass", base + 0xe0, 16, 1, pll6_bypass_sels, ARRAY_SIZE(pll6_bypass_sels));
+ clks[IMX6SL_PLL7_BYPASS] = imx_clk_mux_p("pll7_bypass", base + 0x20, 16, 1, pll7_bypass_sels, ARRAY_SIZE(pll7_bypass_sels));
+
+ /* Do not bypass PLLs initially */
+ clk_set_parent(clks[IMX6SL_PLL1_BYPASS], clks[IMX6SL_CLK_PLL1]);
+ clk_set_parent(clks[IMX6SL_PLL2_BYPASS], clks[IMX6SL_CLK_PLL2]);
+ clk_set_parent(clks[IMX6SL_PLL3_BYPASS], clks[IMX6SL_CLK_PLL3]);
+ clk_set_parent(clks[IMX6SL_PLL4_BYPASS], clks[IMX6SL_CLK_PLL4]);
+ clk_set_parent(clks[IMX6SL_PLL5_BYPASS], clks[IMX6SL_CLK_PLL5]);
+ clk_set_parent(clks[IMX6SL_PLL6_BYPASS], clks[IMX6SL_CLK_PLL6]);
+ clk_set_parent(clks[IMX6SL_PLL7_BYPASS], clks[IMX6SL_CLK_PLL7]);
+
+ clks[IMX6SL_CLK_PLL1_SYS] = imx_clk_gate("pll1_sys", "pll1_bypass", base + 0x00, 13);
+ clks[IMX6SL_CLK_PLL2_BUS] = imx_clk_gate("pll2_bus", "pll2_bypass", base + 0x30, 13);
+ clks[IMX6SL_CLK_PLL3_USB_OTG] = imx_clk_gate("pll3_usb_otg", "pll3_bypass", base + 0x10, 13);
+ clks[IMX6SL_CLK_PLL4_AUDIO] = imx_clk_gate("pll4_audio", "pll4_bypass", base + 0x70, 13);
+ clks[IMX6SL_CLK_PLL5_VIDEO] = imx_clk_gate("pll5_video", "pll5_bypass", base + 0xa0, 13);
+ clks[IMX6SL_CLK_PLL6_ENET] = imx_clk_gate("pll6_enet", "pll6_bypass", base + 0xe0, 13);
+ clks[IMX6SL_CLK_PLL7_USB_HOST] = imx_clk_gate("pll7_usb_host", "pll7_bypass", base + 0x20, 13);
+
+ clks[IMX6SL_CLK_LVDS1_SEL] = imx_clk_mux("lvds1_sel", base + 0x160, 0, 5, lvds_sels, ARRAY_SIZE(lvds_sels));
+ clks[IMX6SL_CLK_LVDS1_OUT] = imx_clk_gate_exclusive("lvds1_out", "lvds1_sel", base + 0x160, 10, BIT(12));
+ clks[IMX6SL_CLK_LVDS1_IN] = imx_clk_gate_exclusive("lvds1_in", "anaclk1", base + 0x160, 12, BIT(10));
+
+ /*
+ * usbphy1 and usbphy2 are implemented as dummy gates using reserve
+ * bit 20. They are used by phy driver to keep the refcount of
+ * parent PLL correct. usbphy1_gate and usbphy2_gate only needs to be
+ * turned on during boot, and software will not need to control it
+ * anymore after that.
+ */
+ clks[IMX6SL_CLK_USBPHY1] = imx_clk_gate("usbphy1", "pll3_usb_otg", base + 0x10, 20);
+ clks[IMX6SL_CLK_USBPHY2] = imx_clk_gate("usbphy2", "pll7_usb_host", base + 0x20, 20);
+ clks[IMX6SL_CLK_USBPHY1_GATE] = imx_clk_gate("usbphy1_gate", "dummy", base + 0x10, 6);
+ clks[IMX6SL_CLK_USBPHY2_GATE] = imx_clk_gate("usbphy2_gate", "dummy", base + 0x20, 6);
+
+ /* dev name parent_name flags reg shift width div: flags, div_table lock */
+ clks[IMX6SL_CLK_PLL4_POST_DIV] = imx_clk_divider_table("pll4_post_div", "pll4_audio",
+ base + 0x70, 19, 2, post_div_table);
+ clks[IMX6SL_CLK_PLL4_AUDIO_DIV] = imx_clk_divider("pll4_audio_div", "pll4_post_div",
+ base + 0x170, 15, 1);
+ clks[IMX6SL_CLK_PLL5_POST_DIV] = imx_clk_divider_table("pll5_post_div", "pll5_video",
+ base + 0xa0, 19, 2, post_div_table);
+ clks[IMX6SL_CLK_PLL5_VIDEO_DIV] = imx_clk_divider_table("pll5_video_div", "pll5_post_div",
+ base + 0x170, 30, 2, video_div_table);
+ clks[IMX6SL_CLK_ENET_REF] = imx_clk_divider_table("enet_ref", "pll6_enet",
+ base + 0xe0, 0, 2, clk_enet_ref_table);
+
+ /* name parent_name reg idx */
+ clks[IMX6SL_CLK_PLL2_PFD0] = imx_clk_pfd("pll2_pfd0", "pll2_bus", base + 0x100, 0);
+ clks[IMX6SL_CLK_PLL2_PFD1] = imx_clk_pfd("pll2_pfd1", "pll2_bus", base + 0x100, 1);
+ clks[IMX6SL_CLK_PLL2_PFD2] = imx_clk_pfd("pll2_pfd2", "pll2_bus", base + 0x100, 2);
+ clks[IMX6SL_CLK_PLL3_PFD0] = imx_clk_pfd("pll3_pfd0", "pll3_usb_otg", base + 0xf0, 0);
+ clks[IMX6SL_CLK_PLL3_PFD1] = imx_clk_pfd("pll3_pfd1", "pll3_usb_otg", base + 0xf0, 1);
+ clks[IMX6SL_CLK_PLL3_PFD2] = imx_clk_pfd("pll3_pfd2", "pll3_usb_otg", base + 0xf0, 2);
+ clks[IMX6SL_CLK_PLL3_PFD3] = imx_clk_pfd("pll3_pfd3", "pll3_usb_otg", base + 0xf0, 3);
+
+ /* name parent_name mult div */
+ clks[IMX6SL_CLK_PLL2_198M] = imx_clk_fixed_factor("pll2_198m", "pll2_pfd2", 1, 2);
+ clks[IMX6SL_CLK_PLL3_120M] = imx_clk_fixed_factor("pll3_120m", "pll3_usb_otg", 1, 4);
+ clks[IMX6SL_CLK_PLL3_80M] = imx_clk_fixed_factor("pll3_80m", "pll3_usb_otg", 1, 6);
+ clks[IMX6SL_CLK_PLL3_60M] = imx_clk_fixed_factor("pll3_60m", "pll3_usb_otg", 1, 8);
+
+ base = ccm_base;
+
+ /* name reg shift width parent_names num_parents */
+ clks[IMX6SL_CLK_STEP] = imx_clk_mux("step", base + 0xc, 8, 1, step_sels, ARRAY_SIZE(step_sels));
+ clks[IMX6SL_CLK_PLL1_SW] = imx_clk_mux("pll1_sw", base + 0xc, 2, 1, pll1_sw_sels, ARRAY_SIZE(pll1_sw_sels));
+ clks[IMX6SL_CLK_OCRAM_ALT_SEL] = imx_clk_mux("ocram_alt_sel", base + 0x14, 7, 1, ocram_alt_sels, ARRAY_SIZE(ocram_alt_sels));
+ clks[IMX6SL_CLK_OCRAM_SEL] = imx_clk_mux("ocram_sel", base + 0x14, 6, 1, ocram_sels, ARRAY_SIZE(ocram_sels));
+ clks[IMX6SL_CLK_PRE_PERIPH2_SEL] = imx_clk_mux("pre_periph2_sel", base + 0x18, 21, 2, pre_periph_sels, ARRAY_SIZE(pre_periph_sels));
+ clks[IMX6SL_CLK_PRE_PERIPH_SEL] = imx_clk_mux("pre_periph_sel", base + 0x18, 18, 2, pre_periph_sels, ARRAY_SIZE(pre_periph_sels));
+ clks[IMX6SL_CLK_PERIPH2_CLK2_SEL] = imx_clk_mux("periph2_clk2_sel", base + 0x18, 20, 1, periph2_clk2_sels, ARRAY_SIZE(periph2_clk2_sels));
+ clks[IMX6SL_CLK_PERIPH_CLK2_SEL] = imx_clk_mux("periph_clk2_sel", base + 0x18, 12, 2, periph_clk2_sels, ARRAY_SIZE(periph_clk2_sels));
+ clks[IMX6SL_CLK_CSI_SEL] = imx_clk_mux("csi_sel", base + 0x3c, 9, 2, csi_sels, ARRAY_SIZE(csi_sels));
+ clks[IMX6SL_CLK_LCDIF_AXI_SEL] = imx_clk_mux("lcdif_axi_sel", base + 0x3c, 14, 2, lcdif_axi_sels, ARRAY_SIZE(lcdif_axi_sels));
+ clks[IMX6SL_CLK_USDHC1_SEL] = imx_clk_mux("usdhc1_sel", base + 0x1c, 16, 1, usdhc_sels, ARRAY_SIZE(usdhc_sels));
+ clks[IMX6SL_CLK_USDHC2_SEL] = imx_clk_mux("usdhc2_sel", base + 0x1c, 17, 1, usdhc_sels, ARRAY_SIZE(usdhc_sels));
+ clks[IMX6SL_CLK_USDHC3_SEL] = imx_clk_mux("usdhc3_sel", base + 0x1c, 18, 1, usdhc_sels, ARRAY_SIZE(usdhc_sels));
+ clks[IMX6SL_CLK_USDHC4_SEL] = imx_clk_mux("usdhc4_sel", base + 0x1c, 19, 1, usdhc_sels, ARRAY_SIZE(usdhc_sels));
+ clks[IMX6SL_CLK_PERCLK_SEL] = imx_clk_mux("perclk_sel", base + 0x1c, 6, 1, perclk_sels, ARRAY_SIZE(perclk_sels));
+ clks[IMX6SL_CLK_PXP_AXI_SEL] = imx_clk_mux("pxp_axi_sel", base + 0x34, 6, 3, pxp_axi_sels, ARRAY_SIZE(pxp_axi_sels));
+ clks[IMX6SL_CLK_EPDC_AXI_SEL] = imx_clk_mux("epdc_axi_sel", base + 0x34, 15, 3, epdc_axi_sels, ARRAY_SIZE(epdc_axi_sels));
+ clks[IMX6SL_CLK_GPU2D_OVG_SEL] = imx_clk_mux("gpu2d_ovg_sel", base + 0x18, 4, 2, gpu2d_ovg_sels, ARRAY_SIZE(gpu2d_ovg_sels));
+ clks[IMX6SL_CLK_GPU2D_SEL] = imx_clk_mux("gpu2d_sel", base + 0x18, 8, 2, gpu2d_sels, ARRAY_SIZE(gpu2d_sels));
+ clks[IMX6SL_CLK_LCDIF_PIX_SEL] = imx_clk_mux("lcdif_pix_sel", base + 0x38, 6, 3, lcdif_pix_sels, ARRAY_SIZE(lcdif_pix_sels));
+ clks[IMX6SL_CLK_EPDC_PIX_SEL] = imx_clk_mux("epdc_pix_sel", base + 0x38, 15, 3, epdc_pix_sels, ARRAY_SIZE(epdc_pix_sels));
+ clks[IMX6SL_CLK_ECSPI_SEL] = imx_clk_mux("ecspi_sel", base + 0x38, 18, 1, ecspi_sels, ARRAY_SIZE(ecspi_sels));
+ clks[IMX6SL_CLK_UART_SEL] = imx_clk_mux("uart_sel", base + 0x24, 6, 1, uart_sels, ARRAY_SIZE(uart_sels));
+
+ /* name reg shift width busy: reg, shift parent_names num_parents */
+ clks[IMX6SL_CLK_PERIPH] = imx_clk_busy_mux("periph", base + 0x14, 25, 1, base + 0x48, 5, periph_sels, ARRAY_SIZE(periph_sels));
+ clks[IMX6SL_CLK_PERIPH2] = imx_clk_busy_mux("periph2", base + 0x14, 26, 1, base + 0x48, 3, periph2_sels, ARRAY_SIZE(periph2_sels));
+
+ /* name parent_name reg shift width */
+ clks[IMX6SL_CLK_OCRAM_PODF] = imx_clk_divider("ocram_podf", "ocram_sel", base + 0x14, 16, 3);
+ clks[IMX6SL_CLK_PERIPH_CLK2_PODF] = imx_clk_divider("periph_clk2_podf", "periph_clk2_sel", base + 0x14, 27, 3);
+ clks[IMX6SL_CLK_PERIPH2_CLK2_PODF] = imx_clk_divider("periph2_clk2_podf", "periph2_clk2_sel", base + 0x14, 0, 3);
+ clks[IMX6SL_CLK_IPG] = imx_clk_divider("ipg", "ahb", base + 0x14, 8, 2);
+ clks[IMX6SL_CLK_CSI_PODF] = imx_clk_divider("csi_podf", "csi_sel", base + 0x3c, 11, 3);
+ clks[IMX6SL_CLK_LCDIF_AXI_PODF] = imx_clk_divider("lcdif_axi_podf", "lcdif_axi_sel", base + 0x3c, 16, 3);
+ clks[IMX6SL_CLK_USDHC1_PODF] = imx_clk_divider("usdhc1_podf", "usdhc1_sel", base + 0x24, 11, 3);
+ clks[IMX6SL_CLK_USDHC2_PODF] = imx_clk_divider("usdhc2_podf", "usdhc2_sel", base + 0x24, 16, 3);
+ clks[IMX6SL_CLK_USDHC3_PODF] = imx_clk_divider("usdhc3_podf", "usdhc3_sel", base + 0x24, 19, 3);
+ clks[IMX6SL_CLK_USDHC4_PODF] = imx_clk_divider("usdhc4_podf", "usdhc4_sel", base + 0x24, 22, 3);
+ clks[IMX6SL_CLK_PERCLK] = imx_clk_divider("perclk", "perclk_sel", base + 0x1c, 0, 6);
+ clks[IMX6SL_CLK_PXP_AXI_PODF] = imx_clk_divider("pxp_axi_podf", "pxp_axi_sel", base + 0x34, 3, 3);
+ clks[IMX6SL_CLK_EPDC_AXI_PODF] = imx_clk_divider("epdc_axi_podf", "epdc_axi_sel", base + 0x34, 12, 3);
+ clks[IMX6SL_CLK_GPU2D_OVG_PODF] = imx_clk_divider("gpu2d_ovg_podf", "gpu2d_ovg_sel", base + 0x18, 26, 3);
+ clks[IMX6SL_CLK_GPU2D_PODF] = imx_clk_divider("gpu2d_podf", "gpu2d_sel", base + 0x18, 29, 3);
+ clks[IMX6SL_CLK_LCDIF_PIX_PRED] = imx_clk_divider("lcdif_pix_pred", "lcdif_pix_sel", base + 0x38, 3, 3);
+ clks[IMX6SL_CLK_EPDC_PIX_PRED] = imx_clk_divider("epdc_pix_pred", "epdc_pix_sel", base + 0x38, 12, 3);
+ clks[IMX6SL_CLK_LCDIF_PIX_PODF] = imx_clk_divider("lcdif_pix_podf", "lcdif_pix_pred", base + 0x1c, 20, 3);
+ clks[IMX6SL_CLK_EPDC_PIX_PODF] = imx_clk_divider("epdc_pix_podf", "epdc_pix_pred", base + 0x18, 23, 3);
+ clks[IMX6SL_CLK_ECSPI_ROOT] = imx_clk_divider("ecspi_root", "ecspi_sel", base + 0x38, 19, 6);
+ clks[IMX6SL_CLK_UART_ROOT] = imx_clk_divider("uart_root", "uart_sel", base + 0x24, 0, 6);
+
+ /* name parent_name reg shift width busy: reg, shift */
+ clks[IMX6SL_CLK_AHB] = imx_clk_busy_divider("ahb", "periph", base + 0x14, 10, 3, base + 0x48, 1);
+ clks[IMX6SL_CLK_MMDC_ROOT] = imx_clk_busy_divider("mmdc", "periph2", base + 0x14, 3, 3, base + 0x48, 2);
+ clks[IMX6SL_CLK_ARM] = imx_clk_busy_divider("arm", "pll1_sw", base + 0x10, 0, 3, base + 0x48, 16);
+
+ /* name parent_name reg shift */
+ clks[IMX6SL_CLK_ECSPI1] = imx_clk_gate2("ecspi1", "ecspi_root", base + 0x6c, 0);
+ clks[IMX6SL_CLK_ECSPI2] = imx_clk_gate2("ecspi2", "ecspi_root", base + 0x6c, 2);
+ clks[IMX6SL_CLK_ECSPI3] = imx_clk_gate2("ecspi3", "ecspi_root", base + 0x6c, 4);
+ clks[IMX6SL_CLK_ECSPI4] = imx_clk_gate2("ecspi4", "ecspi_root", base + 0x6c, 6);
+ clks[IMX6SL_CLK_ENET] = imx_clk_gate2("enet", "ipg", base + 0x6c, 10);
+ clks[IMX6SL_CLK_EPIT1] = imx_clk_gate2("epit1", "perclk", base + 0x6c, 12);
+ clks[IMX6SL_CLK_EPIT2] = imx_clk_gate2("epit2", "perclk", base + 0x6c, 14);
+ clks[IMX6SL_CLK_GPT] = imx_clk_gate2("gpt", "perclk", base + 0x6c, 20);
+ clks[IMX6SL_CLK_GPT_SERIAL] = imx_clk_gate2("gpt_serial", "perclk", base + 0x6c, 22);
+ clks[IMX6SL_CLK_GPU2D_OVG] = imx_clk_gate2("gpu2d_ovg", "gpu2d_ovg_podf", base + 0x6c, 26);
+ clks[IMX6SL_CLK_I2C1] = imx_clk_gate2("i2c1", "perclk", base + 0x70, 6);
+ clks[IMX6SL_CLK_I2C2] = imx_clk_gate2("i2c2", "perclk", base + 0x70, 8);
+ clks[IMX6SL_CLK_I2C3] = imx_clk_gate2("i2c3", "perclk", base + 0x70, 10);
+ clks[IMX6SL_CLK_OCOTP] = imx_clk_gate2("ocotp", "ipg", base + 0x70, 12);
+ clks[IMX6SL_CLK_CSI] = imx_clk_gate2("csi", "csi_podf", base + 0x74, 0);
+ clks[IMX6SL_CLK_PXP_AXI] = imx_clk_gate2("pxp_axi", "pxp_axi_podf", base + 0x74, 2);
+ clks[IMX6SL_CLK_EPDC_AXI] = imx_clk_gate2("epdc_axi", "epdc_axi_podf", base + 0x74, 4);
+ clks[IMX6SL_CLK_LCDIF_AXI] = imx_clk_gate2("lcdif_axi", "lcdif_axi_podf", base + 0x74, 6);
+ clks[IMX6SL_CLK_LCDIF_PIX] = imx_clk_gate2("lcdif_pix", "lcdif_pix_podf", base + 0x74, 8);
+ clks[IMX6SL_CLK_EPDC_PIX] = imx_clk_gate2("epdc_pix", "epdc_pix_podf", base + 0x74, 10);
+ clks[IMX6SL_CLK_OCRAM] = imx_clk_gate2("ocram", "ocram_podf", base + 0x74, 28);
+ clks[IMX6SL_CLK_PWM1] = imx_clk_gate2("pwm1", "perclk", base + 0x78, 16);
+ clks[IMX6SL_CLK_PWM2] = imx_clk_gate2("pwm2", "perclk", base + 0x78, 18);
+ clks[IMX6SL_CLK_PWM3] = imx_clk_gate2("pwm3", "perclk", base + 0x78, 20);
+ clks[IMX6SL_CLK_PWM4] = imx_clk_gate2("pwm4", "perclk", base + 0x78, 22);
+ clks[IMX6SL_CLK_SDMA] = imx_clk_gate2("sdma", "ipg", base + 0x7c, 6);
+ clks[IMX6SL_CLK_SPBA] = imx_clk_gate2("spba", "ipg", base + 0x7c, 12);
+ clks[IMX6SL_CLK_UART] = imx_clk_gate2("uart", "ipg", base + 0x7c, 24);
+ clks[IMX6SL_CLK_UART_SERIAL] = imx_clk_gate2("uart_serial", "uart_root", base + 0x7c, 26);
+ clks[IMX6SL_CLK_USBOH3] = imx_clk_gate2("usboh3", "ipg", base + 0x80, 0);
+ clks[IMX6SL_CLK_USDHC1] = imx_clk_gate2("usdhc1", "usdhc1_podf", base + 0x80, 2);
+ clks[IMX6SL_CLK_USDHC2] = imx_clk_gate2("usdhc2", "usdhc2_podf", base + 0x80, 4);
+ clks[IMX6SL_CLK_USDHC3] = imx_clk_gate2("usdhc3", "usdhc3_podf", base + 0x80, 6);
+ clks[IMX6SL_CLK_USDHC4] = imx_clk_gate2("usdhc4", "usdhc4_podf", base + 0x80, 8);
+
+ clk_data.clks = clks;
+ clk_data.clk_num = ARRAY_SIZE(clks);
+ of_clk_add_provider(ccm_node, of_clk_src_onecell_get, &clk_data);
+
+ if (IS_ENABLED(CONFIG_USB_IMX_PHY)) {
+ clk_enable(clks[IMX6SL_CLK_USBPHY1_GATE]);
+ clk_enable(clks[IMX6SL_CLK_USBPHY2_GATE]);
+ }
+
+ return 0;
+};
+
+static int imx6sl_clocks_init(void)
+{
+ if (!of_machine_is_compatible("fsl,imx6sl"))
+ return 0;
+
+ /* Ensure the AHB clk is at 132MHz. */
+ clk_set_rate(clks[IMX6SL_CLK_AHB], 132000000);
+
+ return 0;
+}
+coredevice_initcall(imx6sl_clocks_init);
+
+static __maybe_unused struct of_device_id imx6sl_ccm_dt_ids[] = {
+ {
+ .compatible = "fsl,imx6sl-ccm",
+ }, {
+ /* sentinel */
+ }
+};
+
+static struct driver_d imx6sl_ccm_driver = {
+ .probe = imx6sl_ccm_probe,
+ .name = "imx6-ccm",
+ .of_compatible = DRV_OF_COMPAT(imx6sl_ccm_dt_ids),
+};
+
+static int imx6sl_ccm_init(void)
+{
+ return platform_driver_register(&imx6sl_ccm_driver);
+}
+core_initcall(imx6sl_ccm_init);
--
2.1.4
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^ permalink raw reply related
* UBIFS trouble
From: Juergen Borleis @ 2016-11-29 11:02 UTC (permalink / raw)
To: barebox
Hi,
with an older barebox (2015.08) I can see in my NOR:
barebox@board: ls -l /mnt/nor0.file-system.ubi.rootfs/boot/
-rw-r--r-- 1686716 System.map-4.1.0-none-board
-rw-r--r-- 67615 config-4.1.0-none-board
lrwxrwxrwx 30 initrd.img -> initrd.img-4.1.0-none-board
-rw-r--r-- 2180972 initrd.img-4.1.0-none-board
lrwxrwxrwx 67 oftree -> ../usr/lib/linux-image-4.1.0-none-board/omap3-mfr-board.dtb
-rw-r--r-- 3375248 vmlinuz-4.1.0-none-board
-rw-r--r-- 3426056 vmlinuz-ptx-board
lrwxrwxrwx 15 zImage -> vmlinuz-ptx-board
A 4.1 Linux kernel sees this filesystem in the same manner:
root@board:~# ll /boot/
total 10496
-rw-r--r-- 1 root root 1686716 Jul 11 2016 System.map-4.1.0-none-board
-rw-r--r-- 1 root root 67615 Jul 11 2016 config-4.1.0-none-board
lrwxrwxrwx 1 root root 30 Oct 24 2016 initrd.img -> initrd.img-4.1.0-none-board
-rw-r--r-- 1 root root 2180972 Oct 24 2016 initrd.img-4.1.0-none-board
lrwxrwxrwx 1 root root 67 Oct 24 2016 oftree -> ../usr/lib/linux-image-4.1.0-none-board/omap3-mfr-board.dtb
-rw-r--r-- 1 root root 3375248 Jul 11 2016 vmlinuz-4.1.0-none-board
-rw-r--r-- 1 root root 3426056 Oct 1 2016 vmlinuz-ptx-board
lrwxrwxrwx 1 root root 15 Oct 1 2016 zImage -> vmlinuz-ptx-board
A fresh barebox (2016.11.0) sees this filesystem differently:
barebox@board:/ ls -l /mnt/nor0.file-system.ubi.rootfs/boot/
-rw-r--r-- 1686716 System.map-4.1.0-none-board
-rw-r--r-- 67615 config-4.1.0-none-board
-rw-r--r-- 2180972 initrd.img
-rw-r--r-- 2180972 initrd.img-4.1.0-none-board
/mnt/nor0.file-system.ubi.rootfs/boot//oftree: No such file or directory
-rw-r--r-- 3375248 vmlinuz-4.1.0-none-board
-rw-r--r-- 3426056 vmlinuz-ptx-board
-rw-r--r-- 3426056 zImage
Any idea?
jb
--
Pengutronix e.K. | Juergen Borleis |
Industrial Linux Solutions | http://www.pengutronix.de/ |
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^ permalink raw reply
* Re: UBIFS trouble
From: Juergen Borleis @ 2016-11-29 14:04 UTC (permalink / raw)
To: barebox
In-Reply-To: <201611291202.23646.jbe@pengutronix.de>
FYI: soft links are broken since 2016.05.0.
jb
--
Pengutronix e.K. | Juergen Borleis |
Industrial Linux Solutions | http://www.pengutronix.de/ |
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