[Buildroot] [PATCH 1/8] arch: merge Config.in.aarch64 into Config.in.arm

[Buildroot] [PATCH 1/8] arch: merge Config.in.aarch64 into Config.in.arm

[Yann E. MORIN]

From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>

The 64 bits ARM processors are capable of running 32 bits ARM code, and
some platforms are indeed using this capability. Due to this, if we were
to keep the separation between Config.in.aarch64 and Config.in.arm, we
would have to duplicate the definition of all 64-bits capable ARM cores
into both files.

Instead of going down this route, let's take the same route as the x86
one: a single Config.in.x86 file, used for both x86 32 bits and x86 64
bits, with the appropriate logic to only show the relevant cores
depending on which architecture is selected.

In order to do this, we:

 - Make the "ARM instruction set" choice only visible on ARM 32 bits,
   since we currently don't support ARM vs. Thumb on AArch64.

 - Add the relevant values for the BR2_ARCH option.

 - Add the relevant values for the BR2_ENDIAN option.

 - Make the "aapcs-linux" BR2_GCC_TARGET_ABI value only used on ARM 32
   bits, since this ABI doesn't mean anything on AArch64.

 - Make the BR2_GCC_TARGET_FPU option depends on ARM 32 bits, since
   there is no -mfpu option on AArch64.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Yann E. MORIN <yann.morin.1998@free.fr>
---
 arch/Config.in         |  6 +-----
 arch/Config.in.aarch64 |  7 -------
 arch/Config.in.arm     | 14 +++++++++-----
 3 files changed, 10 insertions(+), 17 deletions(-)
 delete mode 100644 arch/Config.in.aarch64

diff --git a/arch/Config.in b/arch/Config.in
index df4db0b..d59cbd7 100644
--- a/arch/Config.in
+++ b/arch/Config.in
@@ -354,14 +354,10 @@ if BR2_arcle || BR2_arceb
 source "arch/Config.in.arc"
 endif
 
-if BR2_arm || BR2_armeb
+if BR2_arm || BR2_armeb || BR2_aarch64 || BR2_aarch64_be
 source "arch/Config.in.arm"
 endif
 
-if BR2_aarch64 || BR2_aarch64_be
-source "arch/Config.in.aarch64"
-endif
-
 if BR2_bfin
 source "arch/Config.in.bfin"
 endif
diff --git a/arch/Config.in.aarch64 b/arch/Config.in.aarch64
deleted file mode 100644
index 34cd409..0000000
--- a/arch/Config.in.aarch64
+++ /dev/null
@@ -1,7 +0,0 @@
-config BR2_ARCH
-	default "aarch64"	if BR2_aarch64
-	default "aarch64_be"	if BR2_aarch64_be
-
-config BR2_ENDIAN
-	default "LITTLE" if BR2_aarch64
-	default "BIG"	 if BR2_aarch64_be
diff --git a/arch/Config.in.arm b/arch/Config.in.arm
index ee612f5..002ed04 100644
--- a/arch/Config.in.arm
+++ b/arch/Config.in.arm
@@ -399,6 +399,7 @@ endchoice
 
 choice
 	prompt "ARM instruction set"
+	depends on BR2_arm || BR2_armeb
 
 config BR2_ARM_INSTRUCTIONS_ARM
 	bool "ARM"
@@ -434,12 +435,14 @@ config BR2_ARM_INSTRUCTIONS_THUMB2
 endchoice
 
 config BR2_ARCH
-	default "arm"	if BR2_arm
-	default "armeb"	if BR2_armeb
+	default "arm"		if BR2_arm
+	default "armeb"		if BR2_armeb
+	default "aarch64"	if BR2_aarch64
+	default "aarch64_be"	if BR2_aarch64_be
 
 config BR2_ENDIAN
-	default "LITTLE" if BR2_arm
-	default "BIG"	 if BR2_armeb
+	default "LITTLE" if (BR2_arm || BR2_aarch64)
+	default "BIG"	 if (BR2_armeb || BR2_aarch64_be)
 
 config BR2_GCC_TARGET_CPU
 	default "arm920t"	if BR2_arm920t
@@ -467,9 +470,10 @@ config BR2_GCC_TARGET_CPU
 	default "iwmmxt"	if BR2_iwmmxt
 
 config BR2_GCC_TARGET_ABI
-	default "aapcs-linux"
+	default "aapcs-linux"	if BR2_arm || BR2_armeb
 
 config BR2_GCC_TARGET_FPU
+	depends on BR2_arm || BR2_armeb
 	default "vfp"		if BR2_ARM_FPU_VFPV2
 	default "vfpv3"		if BR2_ARM_FPU_VFPV3
 	default "vfpv3-d16" 	if BR2_ARM_FPU_VFPV3D16
-- 
2.7.4

[Buildroot] [PATCH 2/8] arch/Config.in.arm: prepare addition of 64 bits cores

[Yann E. MORIN]

From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>

Until now the "Target Architecture Variant" choice was not visible on
AArch64. In order to prepare the addition of the 64 bits core to this
choice, this commit adds a "depends on !BR2_ARCH_IS_64" dependency to
all currently supported cores (that are 32 bits only).

Following this commit, the "Target Architecture Variant" choice appears
on AArch64, but is for now empty.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Yann E. MORIN <yann.morin.1998@free.fr>
---
 arch/Config.in.arm | 23 ++++++++++++++++++++++-
 1 file changed, 22 insertions(+), 1 deletion(-)

diff --git a/arch/Config.in.arm b/arch/Config.in.arm
index 002ed04..0ca6a14 100644
--- a/arch/Config.in.arm
+++ b/arch/Config.in.arm
@@ -57,7 +57,6 @@ config BR2_ARM_CPU_ARMV7M
 
 choice
 	prompt "Target Architecture Variant"
-	depends on BR2_arm || BR2_armeb
 	default BR2_arm926t
 	help
 	  Specific CPU variant to use
@@ -68,12 +67,14 @@ config BR2_arm920t
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV4
 	select BR2_ARCH_HAS_MMU_OPTIONAL
+	depends on !BR2_ARCH_IS_64
 config BR2_arm922t
 	bool "arm922t"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV4
 	select BR2_ARCH_HAS_MMU_OPTIONAL
+	depends on !BR2_ARCH_IS_64
 config BR2_arm926t
 	bool "arm926t"
 	select BR2_ARM_CPU_HAS_ARM
@@ -81,12 +82,14 @@ config BR2_arm926t
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV5
 	select BR2_ARCH_HAS_MMU_OPTIONAL
+	depends on !BR2_ARCH_IS_64
 config BR2_arm1136j_s
 	bool "arm1136j-s"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV6
 	select BR2_ARCH_HAS_MMU_OPTIONAL
+	depends on !BR2_ARCH_IS_64
 config BR2_arm1136jf_s
 	bool "arm1136jf-s"
 	select BR2_ARM_CPU_HAS_ARM
@@ -94,12 +97,14 @@ config BR2_arm1136jf_s
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV6
 	select BR2_ARCH_HAS_MMU_OPTIONAL
+	depends on !BR2_ARCH_IS_64
 config BR2_arm1176jz_s
 	bool "arm1176jz-s"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV6
 	select BR2_ARCH_HAS_MMU_OPTIONAL
+	depends on !BR2_ARCH_IS_64
 config BR2_arm1176jzf_s
 	bool "arm1176jzf-s"
 	select BR2_ARM_CPU_HAS_ARM
@@ -107,6 +112,7 @@ config BR2_arm1176jzf_s
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV6
 	select BR2_ARCH_HAS_MMU_OPTIONAL
+	depends on !BR2_ARCH_IS_64
 config BR2_arm11mpcore
 	bool "mpcore"
 	select BR2_ARM_CPU_HAS_ARM
@@ -114,6 +120,7 @@ config BR2_arm11mpcore
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV6
 	select BR2_ARCH_HAS_MMU_OPTIONAL
+	depends on !BR2_ARCH_IS_64
 config BR2_cortex_a5
 	bool "cortex-A5"
 	select BR2_ARM_CPU_HAS_ARM
@@ -122,6 +129,7 @@ config BR2_cortex_a5
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
 	select BR2_ARCH_HAS_MMU_OPTIONAL
+	depends on !BR2_ARCH_IS_64
 config BR2_cortex_a7
 	bool "cortex-A7"
 	select BR2_ARM_CPU_HAS_ARM
@@ -130,6 +138,7 @@ config BR2_cortex_a7
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
 	select BR2_ARCH_HAS_MMU_OPTIONAL
+	depends on !BR2_ARCH_IS_64
 config BR2_cortex_a8
 	bool "cortex-A8"
 	select BR2_ARM_CPU_HAS_ARM
@@ -138,6 +147,7 @@ config BR2_cortex_a8
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
 	select BR2_ARCH_HAS_MMU_OPTIONAL
+	depends on !BR2_ARCH_IS_64
 config BR2_cortex_a9
 	bool "cortex-A9"
 	select BR2_ARM_CPU_HAS_ARM
@@ -146,6 +156,7 @@ config BR2_cortex_a9
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
 	select BR2_ARCH_HAS_MMU_OPTIONAL
+	depends on !BR2_ARCH_IS_64
 config BR2_cortex_a12
 	bool "cortex-A12"
 	select BR2_ARM_CPU_HAS_ARM
@@ -154,6 +165,7 @@ config BR2_cortex_a12
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
 	select BR2_ARCH_HAS_MMU_OPTIONAL
+	depends on !BR2_ARCH_IS_64
 config BR2_cortex_a15
 	bool "cortex-A15"
 	select BR2_ARM_CPU_HAS_ARM
@@ -162,6 +174,7 @@ config BR2_cortex_a15
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
 	select BR2_ARCH_HAS_MMU_OPTIONAL
+	depends on !BR2_ARCH_IS_64
 config BR2_cortex_a17
 	bool "cortex-A17"
 	select BR2_ARM_CPU_HAS_ARM
@@ -170,41 +183,49 @@ config BR2_cortex_a17
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
 	select BR2_ARCH_HAS_MMU_OPTIONAL
+	depends on !BR2_ARCH_IS_64
 config BR2_cortex_m3
 	bool "cortex-M3"
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7M
+	depends on !BR2_ARCH_IS_64
 config BR2_cortex_m4
 	bool "cortex-M4"
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7M
+	depends on !BR2_ARCH_IS_64
 config BR2_fa526
 	bool "fa526/626"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_ARMV4
 	select BR2_ARCH_HAS_MMU_OPTIONAL
+	depends on !BR2_ARCH_IS_64
 config BR2_pj4
 	bool "pj4"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_VFPV3
 	select BR2_ARM_CPU_ARMV7A
 	select BR2_ARCH_HAS_MMU_OPTIONAL
+	depends on !BR2_ARCH_IS_64
 config BR2_strongarm
 	bool "strongarm sa110/sa1100"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_ARMV4
 	select BR2_ARCH_HAS_MMU_OPTIONAL
+	depends on !BR2_ARCH_IS_64
 config BR2_xscale
 	bool "xscale"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV5
 	select BR2_ARCH_HAS_MMU_OPTIONAL
+	depends on !BR2_ARCH_IS_64
 config BR2_iwmmxt
 	bool "iwmmxt"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_ARMV5
 	select BR2_ARCH_HAS_MMU_OPTIONAL
+	depends on !BR2_ARCH_IS_64
 endchoice
 
 config BR2_ARM_ENABLE_NEON
-- 
2.7.4

[Buildroot] [PATCH 0/8] arch/arm: allow selecting AArch64 cores

[Yann E. MORIN]

Hello All!

This series, originally written by Thomas, allows selecting a specific
AArch64 core anong the few currently existing cores. It also allows
selecting those cores in 32-bit mode.

The series now handles arm (aka AArch32) and AArch64 as a single
architecture, not unlike what we do for the i386 and x86-64.

We so far had no way to optimise for a specific AArch64 core, and would
just let gcc decide based on its default settings. Having a selection,
like we have for all architectures, allows to optimise the generated
code for the actual core on the target.

Furthermore, AArch64 cores are totally capable of running 32-bit code,
in 32-bit mode, like x86_64 cores do in 32-bit mode.

Then, we also allow to select the floating point strategy for those
cores. Unlike 32-bit cores, all current AArch64 core have a VFP unit
with NEON extensions; yet, we still allow selecting soft-float (e.g.
when in 32-bit mode, to keep compatibility with soft-float binary
blobs).

Finally, we add an entry for each of the three currently existing
AArch64 cores, Cortex-A53, A57 and A72.


Regards,
Yann E. MORIN.


The following changes since commit 0689e77eecb88dc204688e9db670d56e4366f83f

  uclibc: disable posix_madvise for noMMU (2016-11-30 16:14:47 +0100)


are available in the git repository at:

  git://git.buildroot.org/~ymorin/git/buildroot.git

for you to fetch changes up to 7cdaae6e62c3a98dceecd5b195ef16f425621cee

  arch/Config.in.arm: add Cortex-A57 and Cortex-A72 (2016-11-30 18:57:14 +0100)


----------------------------------------------------------------
Matt Flax (1):
      arch/Config.in.arm: Add Cortex-A53 CPU

Thomas Petazzoni (6):
      arch: merge Config.in.aarch64 into Config.in.arm
      arch/Config.in.arm: prepare addition of 64 bits cores
      arch/Config.in.arm: add BR2_ARM_CPU_ARMV8
      arch/Config.in.arm: add FPU related options for ARMv8 cores
      arch/Config.in.arm: specify ABI for ARM64
      arch/Config.in.arm: add Cortex-A57 and Cortex-A72

Yann E. MORIN (1):
      arch/arm: drop legacy dependency for floating point strategy

 arch/Config.in         |  6 +---
 arch/Config.in.aarch64 |  7 ----
 arch/Config.in.arm     | 93 ++++++++++++++++++++++++++++++++++++++++++++++----
 3 files changed, 87 insertions(+), 19 deletions(-)
 delete mode 100644 arch/Config.in.aarch64

-- 
.-----------------.--------------------.------------------.--------------------.
|  Yann E. MORIN  | Real-Time Embedded | /"\ ASCII RIBBON | Erics' conspiracy: |
| +33 662 376 056 | Software  Designer | \ / CAMPAIGN     |  ___               |
| +33 223 225 172 `------------.-------:  X  AGAINST      |  \e/  There is no  |
| http://ymorin.is-a-geek.org/ | _/*\_ | / \ HTML MAIL    |   v   conspiracy.  |
'------------------------------^-------^------------------^--------------------'

[Buildroot] [PATCH 3/8] arch/Config.in.arm: add BR2_ARM_CPU_ARMV8

[Yann E. MORIN]

From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>

In order to prepare the addition of ARM64 cores, add the blind
BR2_ARM_CPU_ARMV8 option.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Yann E. MORIN <yann.morin.1998@free.fr>
---
 arch/Config.in.arm | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/Config.in.arm b/arch/Config.in.arm
index 0ca6a14..9e5accc 100644
--- a/arch/Config.in.arm
+++ b/arch/Config.in.arm
@@ -55,6 +55,9 @@ config BR2_ARM_CPU_ARMV7A
 config BR2_ARM_CPU_ARMV7M
 	bool
 
+config BR2_ARM_CPU_ARMV8
+	bool
+
 choice
 	prompt "Target Architecture Variant"
 	default BR2_arm926t
-- 
2.7.4

[Buildroot] [PATCH 4/8] arch/arm: drop legacy dependency for floating point strategy

[Yann E. MORIN]

The floating point strategy currently depends on EABI || EABIHF. The
reason was that, wayback when we also supported OABI, we only exposed FP
for EABI or EABIHF, and hide it for OABI, which did not support FP.

It's been a while now that we do not support OABI, but the dependency
stuck all along.

Remove it as it is no longer needed, and is always true.

However, the choice is empty for AArch64, as we still have no entry for
their floating point strategy yet.

Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
 arch/Config.in.arm | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/Config.in.arm b/arch/Config.in.arm
index 9e5accc..fa999d5 100644
--- a/arch/Config.in.arm
+++ b/arch/Config.in.arm
@@ -308,7 +308,6 @@ endchoice
 
 choice
 	prompt "Floating point strategy"
-	depends on BR2_ARM_EABI || BR2_ARM_EABIHF
 	default BR2_ARM_FPU_VFPV4D16 if BR2_ARM_CPU_HAS_VFPV4
 	default BR2_ARM_FPU_VFPV3D16 if BR2_ARM_CPU_HAS_VFPV3
 	default BR2_ARM_FPU_VFPV2 if BR2_ARM_CPU_HAS_VFPV2
-- 
2.7.4

[Buildroot] [PATCH 5/8] arch/Config.in.arm: add FPU related options for ARMv8 cores

[Yann E. MORIN]

From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>

The ARMv8 cores have a mandatory FPU unit called FP-ARMv8, so we:

 - add a new hidden Config.in option for the availability of this
   unit (BR2_ARM_CPU_HAS_FP_ARMV8)

 - allow the selection of a possible choice in the "Floating point
   strategy", and add two new choices: BR2_ARM_FPU_FP_ARMV8 and
   BR2_ARM_FPU_NEON_FP_ARMV8.

 - specify the -mfpu values for BR2_ARM_FPU_FP_ARMV8 and
   BR2_ARM_FPU_NEON_FP_ARMV8 cases, when used on ARM 32 bits (-mfpu
   doesn't exist on ARM64, instead -mcpu modifiers are used, so they
   will be added on a per-core basis).

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
[yann.morin.1998 at free.fr: drop the FP strategy dependency]
Signed-off-by: Yann E. MORIN <yann.morin.1998@free.fr>
---
 arch/Config.in.arm | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/arch/Config.in.arm b/arch/Config.in.arm
index fa999d5..1a3c36d 100644
--- a/arch/Config.in.arm
+++ b/arch/Config.in.arm
@@ -31,6 +31,10 @@ config BR2_ARM_CPU_HAS_VFPV4
 	bool
 	select BR2_ARM_CPU_HAS_VFPV3
 
+config BR2_ARM_CPU_HAS_FP_ARMV8
+	bool
+	select BR2_ARM_CPU_HAS_VFPV4
+
 config BR2_ARM_CPU_HAS_ARM
 	bool
 
@@ -308,6 +312,7 @@ endchoice
 
 choice
 	prompt "Floating point strategy"
+	default BR2_ARM_FPU_FP_ARMV8 if BR2_ARM_CPU_HAS_FP_ARMV8
 	default BR2_ARM_FPU_VFPV4D16 if BR2_ARM_CPU_HAS_VFPV4
 	default BR2_ARM_FPU_VFPV3D16 if BR2_ARM_CPU_HAS_VFPV3
 	default BR2_ARM_FPU_VFPV2 if BR2_ARM_CPU_HAS_VFPV2
@@ -418,6 +423,20 @@ config BR2_ARM_FPU_NEON_VFPV4
 	  example on Cortex-A5 and Cortex-A7, support for VFPv4 and
 	  NEON is optional.
 
+config BR2_ARM_FPU_FP_ARMV8
+	bool "FP-ARMv8"
+	depends on BR2_ARM_CPU_HAS_FP_ARMV8
+	help
+	  This option allows to use the ARMv8 floating point unit.
+
+config BR2_ARM_FPU_NEON_FP_ARMV8
+	bool "NEON/FP-ARMv8"
+	depends on BR2_ARM_CPU_HAS_FP_ARMV8
+	depends on BR2_ARM_CPU_HAS_NEON
+	help
+	  This option allows to use both the ARMv8 floating point unit
+	  and the NEON SIMD unit for floating point operations.
+
 endchoice
 
 choice
@@ -504,6 +523,8 @@ config BR2_GCC_TARGET_FPU
 	default "vfpv4-d16" 	if BR2_ARM_FPU_VFPV4D16
 	default "neon" 		if BR2_ARM_FPU_NEON
 	default "neon-vfpv4" 	if BR2_ARM_FPU_NEON_VFPV4
+	default "fp-armv8"	if BR2_ARM_FPU_FP_ARMV8
+	default "neon-fp-armv8"	if BR2_ARM_FPU_NEON_FP_ARMV8
 
 config BR2_GCC_TARGET_FLOAT_ABI
 	default "soft"		if BR2_ARM_SOFT_FLOAT
-- 
2.7.4

[Buildroot] [PATCH 6/8] arch/Config.in.arm: specify ABI for ARM64

[Yann E. MORIN]

From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>

There's currently only one widely supported ABI for ARM64, called lp64,
so we define BR2_GCC_TARGET_ABI to the appropriate value.

Note that there is another ABI for ARM64 being worked on, ilp32, but its
support is not fully upstream in the kernel, so we're not adding support
for it for the moment.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Yann E. MORIN <yann.morin.1998@free.fr>
---
 arch/Config.in.arm | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/Config.in.arm b/arch/Config.in.arm
index 1a3c36d..c98efcd 100644
--- a/arch/Config.in.arm
+++ b/arch/Config.in.arm
@@ -513,6 +513,7 @@ config BR2_GCC_TARGET_CPU
 
 config BR2_GCC_TARGET_ABI
 	default "aapcs-linux"	if BR2_arm || BR2_armeb
+	default "lp64"		if BR2_aarch64 || BR2_aarch64_be
 
 config BR2_GCC_TARGET_FPU
 	depends on BR2_arm || BR2_armeb
-- 
2.7.4

[Buildroot] [PATCH 7/8] arch/Config.in.arm: Add Cortex-A53 CPU

[Yann E. MORIN]

From: Matt Flax <flatmax@flatmax.org>

Adds the Cortex-A53 CPU to the target architecture variant choice. This
sets the toolchain to use Cortex-A53 as the target. The effect is that
various Cortex-A53 tunings are enabled for the compilation of packages.

Signed-off-by: Matt Flax <flatmax@flatmax.org>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Yann E. MORIN <yann.morin.1998@free.fr>
---
 arch/Config.in.arm | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/Config.in.arm b/arch/Config.in.arm
index c98efcd..592b097 100644
--- a/arch/Config.in.arm
+++ b/arch/Config.in.arm
@@ -191,6 +191,13 @@ config BR2_cortex_a17
 	select BR2_ARM_CPU_ARMV7A
 	select BR2_ARCH_HAS_MMU_OPTIONAL
 	depends on !BR2_ARCH_IS_64
+config BR2_cortex_a53
+	bool "cortex-A53"
+	select BR2_ARM_CPU_HAS_ARM
+	select BR2_ARM_CPU_HAS_NEON
+	select BR2_ARM_CPU_HAS_FP_ARMV8
+	select BR2_ARM_CPU_ARMV8
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_cortex_m3
 	bool "cortex-M3"
 	select BR2_ARM_CPU_HAS_THUMB2
@@ -510,6 +517,9 @@ config BR2_GCC_TARGET_CPU
 	default "strongarm"	if BR2_strongarm
 	default "xscale"	if BR2_xscale
 	default "iwmmxt"	if BR2_iwmmxt
+	default "cortex-a53"		if (BR2_cortex_a53 && !BR2_ARCH_IS_64)
+	default "cortex-a53+fp"		if (BR2_cortex_a53 && BR2_ARCH_IS_64 && BR2_ARM_FPU_FP_ARMV8)
+	default "cortex-a53+fp+simd" 	if (BR2_cortex_a53 && BR2_ARCH_IS_64 && BR2_ARM_FPU_NEON_FP_ARMV8)
 
 config BR2_GCC_TARGET_ABI
 	default "aapcs-linux"	if BR2_arm || BR2_armeb
-- 
2.7.4

[Buildroot] [PATCH 8/8] arch/Config.in.arm: add Cortex-A57 and Cortex-A72

[Yann E. MORIN]

From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>

Add two popular ARM64 cores to the list of supported cores: Cortex-A57
and Cortex-A72.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Yann E. MORIN <yann.morin.1998@free.fr>
---
 arch/Config.in.arm | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/arch/Config.in.arm b/arch/Config.in.arm
index 592b097..743f6ca 100644
--- a/arch/Config.in.arm
+++ b/arch/Config.in.arm
@@ -198,6 +198,20 @@ config BR2_cortex_a53
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8
 	select BR2_ARCH_HAS_MMU_OPTIONAL
+config BR2_cortex_a57
+	bool "cortex-A57"
+	select BR2_ARM_CPU_HAS_ARM
+	select BR2_ARM_CPU_HAS_NEON
+	select BR2_ARM_CPU_HAS_FP_ARMV8
+	select BR2_ARM_CPU_ARMV8
+	select BR2_ARCH_HAS_MMU_OPTIONAL
+config BR2_cortex_a72
+	bool "cortex-A72"
+	select BR2_ARM_CPU_HAS_ARM
+	select BR2_ARM_CPU_HAS_NEON
+	select BR2_ARM_CPU_HAS_FP_ARMV8
+	select BR2_ARM_CPU_ARMV8
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_cortex_m3
 	bool "cortex-M3"
 	select BR2_ARM_CPU_HAS_THUMB2
@@ -520,6 +534,12 @@ config BR2_GCC_TARGET_CPU
 	default "cortex-a53"		if (BR2_cortex_a53 && !BR2_ARCH_IS_64)
 	default "cortex-a53+fp"		if (BR2_cortex_a53 && BR2_ARCH_IS_64 && BR2_ARM_FPU_FP_ARMV8)
 	default "cortex-a53+fp+simd" 	if (BR2_cortex_a53 && BR2_ARCH_IS_64 && BR2_ARM_FPU_NEON_FP_ARMV8)
+	default "cortex-a57"		if (BR2_cortex_a57 && !BR2_ARCH_IS_64)
+	default "cortex-a57+fp"		if (BR2_cortex_a57 && BR2_ARCH_IS_64 && BR2_ARM_FPU_FP_ARMV8)
+	default "cortex-a57+fp+simd" 	if (BR2_cortex_a57 && BR2_ARCH_IS_64 && BR2_ARM_FPU_NEON_FP_ARMV8)
+	default "cortex-a72"		if (BR2_cortex_a72 && !BR2_ARCH_IS_64)
+	default "cortex-a72+fp"		if (BR2_cortex_a72 && BR2_ARCH_IS_64 && BR2_ARM_FPU_FP_ARMV8)
+	default "cortex-a72+fp+simd" 	if (BR2_cortex_a72 && BR2_ARCH_IS_64 && BR2_ARM_FPU_NEON_FP_ARMV8)
 
 config BR2_GCC_TARGET_ABI
 	default "aapcs-linux"	if BR2_arm || BR2_armeb
-- 
2.7.4

[Buildroot] [PATCH 0/8] arch/arm: allow selecting AArch64 cores

[Thomas Petazzoni]

Hello,

On Wed, 30 Nov 2016 22:12:06 +0100, Yann E. MORIN wrote:

> Matt Flax (1):
>       arch/Config.in.arm: Add Cortex-A53 CPU
> 
> Thomas Petazzoni (6):
>       arch: merge Config.in.aarch64 into Config.in.arm
>       arch/Config.in.arm: prepare addition of 64 bits cores
>       arch/Config.in.arm: add BR2_ARM_CPU_ARMV8
>       arch/Config.in.arm: add FPU related options for ARMv8 cores
>       arch/Config.in.arm: specify ABI for ARM64
>       arch/Config.in.arm: add Cortex-A57 and Cortex-A72
> 
> Yann E. MORIN (1):
>       arch/arm: drop legacy dependency for floating point strategy

Thanks, I've applied all 8 patches. I've added another patch that
allows selecting the Linaro ARM and ARMeb toolchains on ARMv8.

Thanks!

Thomas
-- 
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com