[Buildroot] [PATCH v3 0/2] Add Microchip PolarFire SoC Icicle Kit

[Buildroot] [PATCH v3 0/2] Add Microchip PolarFire SoC Icicle Kit

[Jamie Gibbons via buildroot]

Hi all,

The following patch series is to add support for Microchip's PolarFire SoC
development board, the icicle kit. We are adding all the necessary supporting
files, including a new defconfig and one required host package, the
hss-payload-generator. I look forward to recieving your feedback on the series.

Regards,
Jamie

Changes v1 -> v2:
- cleanup package makefile file
- update U-Boot and kernel versions
- add to Developers

Changes v2 -> v3:
- added missing host dependency in hss-payload-generator package
- removed unnecessary partition type uuids
- add missing package to fix build error
- fixed styling errors

Jamie Gibbons (2):
  package/microchip-hss-payload-generator: add host package
  configs/microchip_mpfs_icicle: add support for Microchip's Icicle Kit

 DEVELOPERS                                    |  5 ++
 board/microchip/mpfs_icicle/README.txt        | 62 +++++++++++++++++++
 board/microchip/mpfs_icicle/config.yaml       | 28 +++++++++
 board/microchip/mpfs_icicle/genimage.cfg      | 34 ++++++++++
 board/microchip/mpfs_icicle/linux.fragment    |  1 +
 board/microchip/mpfs_icicle/mpfs_icicle.its   | 53 ++++++++++++++++
 board/microchip/mpfs_icicle/post-image.sh     | 13 ++++
 board/microchip/mpfs_icicle/uboot-env.txt     | 16 +++++
 .../mpfs_icicle/uboot-fragment-rootfs.config  |  3 +
 configs/microchip_mpfs_icicle_defconfig       | 34 ++++++++++
 package/Config.in.host                        |  1 +
 .../Config.in.host                            | 11 ++++
 .../microchip-hss-payload-generator.mk        | 25 ++++++++
 13 files changed, 286 insertions(+)
 create mode 100644 board/microchip/mpfs_icicle/README.txt
 create mode 100644 board/microchip/mpfs_icicle/config.yaml
 create mode 100644 board/microchip/mpfs_icicle/genimage.cfg
 create mode 100644 board/microchip/mpfs_icicle/linux.fragment
 create mode 100644 board/microchip/mpfs_icicle/mpfs_icicle.its
 create mode 100755 board/microchip/mpfs_icicle/post-image.sh
 create mode 100644 board/microchip/mpfs_icicle/uboot-env.txt
 create mode 100644 board/microchip/mpfs_icicle/uboot-fragment-rootfs.config
 create mode 100644 configs/microchip_mpfs_icicle_defconfig
 create mode 100644 package/microchip-hss-payload-generator/Config.in.host
 create mode 100644 package/microchip-hss-payload-generator/microchip-hss-payload-generator.mk

-- 
2.34.1

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[Buildroot] [PATCH v3 1/2] package/microchip-hss-payload-generator: add host package

[Jamie Gibbons via buildroot]

The Buildroot icicle kit configuration uses the Hart Software Service's
(HSS) payload generator tool. This tool creates a formatted payload
image for the HSS zero-stage bootloader on PolarFire SoC, given a
configuration file and a set of ELF binaries. The configuration
file is used to map the ELF binaries or binary blobs to the
individual application harts (U54s). Add the HSS payload generator as a
host package to support this.

Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
Reviewed-by: Valentina Fernandez <valentina.fernandezalanis@microchip.com>
---
 DEVELOPERS                                    |  3 +++
 package/Config.in.host                        |  1 +
 .../Config.in.host                            | 11 ++++++++
 .../microchip-hss-payload-generator.mk        | 25 +++++++++++++++++++
 4 files changed, 40 insertions(+)
 create mode 100644 package/microchip-hss-payload-generator/Config.in.host
 create mode 100644 package/microchip-hss-payload-generator/microchip-hss-payload-generator.mk

diff --git a/DEVELOPERS b/DEVELOPERS
index 0918e9f721..2f039a2405 100644
--- a/DEVELOPERS
+++ b/DEVELOPERS
@@ -1459,6 +1459,9 @@ F:	package/pangomm/
 F:	package/rpm/
 F:	package/yad/
 
+N:	Jamie Gibbons <jamie.gibbons@microchip.com>
+F:	package/microchip-hss-payload-generator
+
 N:	Jan Heylen <jan.heylen@nokia.com>
 F:	package/opentracing-cpp/
 
diff --git a/package/Config.in.host b/package/Config.in.host
index dcadbfdfc1..42856c09df 100644
--- a/package/Config.in.host
+++ b/package/Config.in.host
@@ -58,6 +58,7 @@ menu "Host utilities"
 	source "package/mender-artifact/Config.in.host"
 	source "package/meson-tools/Config.in.host"
 	source "package/mfgtools/Config.in.host"
+	source "package/microchip-hss-payload-generator/Config.in.host"
 	source "package/mkpasswd/Config.in.host"
 	source "package/moby-buildkit/Config.in.host"
 	source "package/mosquitto/Config.in.host"
diff --git a/package/microchip-hss-payload-generator/Config.in.host b/package/microchip-hss-payload-generator/Config.in.host
new file mode 100644
index 0000000000..6584692729
--- /dev/null
+++ b/package/microchip-hss-payload-generator/Config.in.host
@@ -0,0 +1,11 @@
+config BR2_PACKAGE_HOST_MICROCHIP_HSS_PAYLOAD_GENERATOR
+	bool "host microchip-hss-payload-generator"
+	help
+	  Microchip PolarFire SoC Payload Generator. This tool creates a
+	  formatted payload image for the HSS zero-stage bootloader on
+	  PolarFire SoC, given a configuration file and a set of ELF
+	  binaries. The configuration file is used to map the ELF
+	  binaries or binary blobs to the individual application harts
+	  (U54s).
+
+	  https://github.com/polarfire-soc/hart-software-services.git
diff --git a/package/microchip-hss-payload-generator/microchip-hss-payload-generator.mk b/package/microchip-hss-payload-generator/microchip-hss-payload-generator.mk
new file mode 100644
index 0000000000..df62e121e7
--- /dev/null
+++ b/package/microchip-hss-payload-generator/microchip-hss-payload-generator.mk
@@ -0,0 +1,25 @@
+################################################################################
+#
+# microchip-hss-payload-generator
+#
+################################################################################
+
+HOST_MICROCHIP_HSS_PAYLOAD_GENERATOR_VERSION = 2023.06
+HOST_MICROCHIP_HSS_PAYLOAD_GENERATOR_SITE = $(call github,polarfire-soc,hart-software-services,v$(HOST_MICROCHIP_HSS_PAYLOAD_GENERATOR_VERSION))
+HOST_MICROCHIP_HSS_PAYLOAD_GENERATOR_LICENSE = MIT
+HOST_MICROCHIP_HSS_PAYLOAD_GENERATOR_LICENSE_FILES = LICENSE.md
+HOST_MICROCHIP_HSS_PAYLOAD_GENERATOR_DEPENDENCIES = host-elfutils host-libyaml host-openssl
+
+define HOST_MICROCHIP_HSS_PAYLOAD_GENERATOR_BUILD_CMDS
+	$(MAKE) -C $(@D)/tools/hss-payload-generator \
+		HOST_INCLUDES="$(HOST_CPPFLAGS)" \
+		LDFLAGS="$(HOST_LDFLAGS)"
+endef
+
+define HOST_MICROCHIP_HSS_PAYLOAD_GENERATOR_INSTALL_CMDS
+	$(INSTALL) -D -m 755 \
+		$(@D)/tools/hss-payload-generator/hss-payload-generator \
+		$(HOST_DIR)/bin/hss-payload-generator
+endef
+
+$(eval $(host-generic-package))
-- 
2.34.1

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Re: [Buildroot] [PATCH v3 1/2] package/microchip-hss-payload-generator: add host package

[Giulio Benetti]

On 12/07/23 14:51, Jamie Gibbons via buildroot wrote:
> The Buildroot icicle kit configuration uses the Hart Software Service's
> (HSS) payload generator tool. This tool creates a formatted payload
> image for the HSS zero-stage bootloader on PolarFire SoC, given a
> configuration file and a set of ELF binaries. The configuration
> file is used to map the ELF binaries or binary blobs to the
> individual application harts (U54s). Add the HSS payload generator as a
> host package to support this.
> 
> Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
> Reviewed-by: Valentina Fernandez <valentina.fernandezalanis@microchip.com>

Reviewed-by: Giulio Benetti <giulio.benetti@benettiengineering.com>

For next time remember to report the changes on every patch too, not
only on the cover letter.

Thank you

Best regards
-- 
CEO/CTO@Benetti Engineering sas

> ---
>   DEVELOPERS                                    |  3 +++
>   package/Config.in.host                        |  1 +
>   .../Config.in.host                            | 11 ++++++++
>   .../microchip-hss-payload-generator.mk        | 25 +++++++++++++++++++
>   4 files changed, 40 insertions(+)
>   create mode 100644 package/microchip-hss-payload-generator/Config.in.host
>   create mode 100644 package/microchip-hss-payload-generator/microchip-hss-payload-generator.mk
> 
> diff --git a/DEVELOPERS b/DEVELOPERS
> index 0918e9f721..2f039a2405 100644
> --- a/DEVELOPERS
> +++ b/DEVELOPERS
> @@ -1459,6 +1459,9 @@ F:	package/pangomm/
>   F:	package/rpm/
>   F:	package/yad/
>   
> +N:	Jamie Gibbons <jamie.gibbons@microchip.com>
> +F:	package/microchip-hss-payload-generator
> +
>   N:	Jan Heylen <jan.heylen@nokia.com>
>   F:	package/opentracing-cpp/
>   
> diff --git a/package/Config.in.host b/package/Config.in.host
> index dcadbfdfc1..42856c09df 100644
> --- a/package/Config.in.host
> +++ b/package/Config.in.host
> @@ -58,6 +58,7 @@ menu "Host utilities"
>   	source "package/mender-artifact/Config.in.host"
>   	source "package/meson-tools/Config.in.host"
>   	source "package/mfgtools/Config.in.host"
> +	source "package/microchip-hss-payload-generator/Config.in.host"
>   	source "package/mkpasswd/Config.in.host"
>   	source "package/moby-buildkit/Config.in.host"
>   	source "package/mosquitto/Config.in.host"
> diff --git a/package/microchip-hss-payload-generator/Config.in.host b/package/microchip-hss-payload-generator/Config.in.host
> new file mode 100644
> index 0000000000..6584692729
> --- /dev/null
> +++ b/package/microchip-hss-payload-generator/Config.in.host
> @@ -0,0 +1,11 @@
> +config BR2_PACKAGE_HOST_MICROCHIP_HSS_PAYLOAD_GENERATOR
> +	bool "host microchip-hss-payload-generator"
> +	help
> +	  Microchip PolarFire SoC Payload Generator. This tool creates a
> +	  formatted payload image for the HSS zero-stage bootloader on
> +	  PolarFire SoC, given a configuration file and a set of ELF
> +	  binaries. The configuration file is used to map the ELF
> +	  binaries or binary blobs to the individual application harts
> +	  (U54s).
> +
> +	  https://github.com/polarfire-soc/hart-software-services.git
> diff --git a/package/microchip-hss-payload-generator/microchip-hss-payload-generator.mk b/package/microchip-hss-payload-generator/microchip-hss-payload-generator.mk
> new file mode 100644
> index 0000000000..df62e121e7
> --- /dev/null
> +++ b/package/microchip-hss-payload-generator/microchip-hss-payload-generator.mk
> @@ -0,0 +1,25 @@
> +################################################################################
> +#
> +# microchip-hss-payload-generator
> +#
> +################################################################################
> +
> +HOST_MICROCHIP_HSS_PAYLOAD_GENERATOR_VERSION = 2023.06
> +HOST_MICROCHIP_HSS_PAYLOAD_GENERATOR_SITE = $(call github,polarfire-soc,hart-software-services,v$(HOST_MICROCHIP_HSS_PAYLOAD_GENERATOR_VERSION))
> +HOST_MICROCHIP_HSS_PAYLOAD_GENERATOR_LICENSE = MIT
> +HOST_MICROCHIP_HSS_PAYLOAD_GENERATOR_LICENSE_FILES = LICENSE.md
> +HOST_MICROCHIP_HSS_PAYLOAD_GENERATOR_DEPENDENCIES = host-elfutils host-libyaml host-openssl
> +
> +define HOST_MICROCHIP_HSS_PAYLOAD_GENERATOR_BUILD_CMDS
> +	$(MAKE) -C $(@D)/tools/hss-payload-generator \
> +		HOST_INCLUDES="$(HOST_CPPFLAGS)" \
> +		LDFLAGS="$(HOST_LDFLAGS)"
> +endef
> +
> +define HOST_MICROCHIP_HSS_PAYLOAD_GENERATOR_INSTALL_CMDS
> +	$(INSTALL) -D -m 755 \
> +		$(@D)/tools/hss-payload-generator/hss-payload-generator \
> +		$(HOST_DIR)/bin/hss-payload-generator
> +endef
> +
> +$(eval $(host-generic-package))

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Re: [Buildroot] [PATCH v3 1/2] package/microchip-hss-payload-generator: add host package

[Thomas Petazzoni via buildroot]

Hello Jamie,

On Wed, 12 Jul 2023 13:51:53 +0100
Jamie Gibbons via buildroot <buildroot@buildroot.org> wrote:

> The Buildroot icicle kit configuration uses the Hart Software Service's
> (HSS) payload generator tool. This tool creates a formatted payload
> image for the HSS zero-stage bootloader on PolarFire SoC, given a
> configuration file and a set of ELF binaries. The configuration
> file is used to map the ELF binaries or binary blobs to the
> individual application harts (U54s). Add the HSS payload generator as a
> host package to support this.
> 
> Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
> Reviewed-by: Valentina Fernandez <valentina.fernandezalanis@microchip.com>
> ---
>  DEVELOPERS                                    |  3 +++
>  package/Config.in.host                        |  1 +
>  .../Config.in.host                            | 11 ++++++++
>  .../microchip-hss-payload-generator.mk        | 25 +++++++++++++++++++
>  4 files changed, 40 insertions(+)

This was missing a hash file for the package, which provides the hash
of the tarball and the hash of the license file.

> +HOST_MICROCHIP_HSS_PAYLOAD_GENERATOR_VERSION = 2023.06
> +HOST_MICROCHIP_HSS_PAYLOAD_GENERATOR_SITE = $(call github,polarfire-soc,hart-software-services,v$(HOST_MICROCHIP_HSS_PAYLOAD_GENERATOR_VERSION))
> +HOST_MICROCHIP_HSS_PAYLOAD_GENERATOR_LICENSE = MIT
> +HOST_MICROCHIP_HSS_PAYLOAD_GENERATOR_LICENSE_FILES = LICENSE.md

I was initially confused by this, because LICENSE.md also mentions than
the repo contains OpenSBI, which is under BSD-2-Clause. But in fact
this package only builds what's in tools/hss-payload-generator, so the
rest is irrelevant. Therefore, I have changed this to:

+# Some parts of the repository are under different licenses, but we
+# are only building/installing the code in
+# tools/hss-payload-generator/.
+HOST_MICROCHIP_HSS_PAYLOAD_GENERATOR_LICENSE = MIT or GPL-2.0+
+HOST_MICROCHIP_HSS_PAYLOAD_GENERATOR_LICENSE_FILES = tools/hss-payload-generator/LICENSE.md

Let me know if you think this is incorrect.

I've applied to our "next" branch with those changes. Thanks!

Thanks,

Thomas
-- 
Thomas Petazzoni, co-owner and CEO, Bootlin
Embedded Linux and Kernel engineering and training
https://bootlin.com
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Re: [Buildroot] [PATCH v3 1/2] package/microchip-hss-payload-generator: add host package

[Jamie.Gibbons--- via buildroot]

Hi Thomas,

On Tue, 2023-08-08 at 23:56 +0200, Thomas Petazzoni wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you
> know the content is safe
> 
> Hello Jamie,
> 
> On Wed, 12 Jul 2023 13:51:53 +0100
> Jamie Gibbons via buildroot <buildroot@buildroot.org> wrote:
> 
> > The Buildroot icicle kit configuration uses the Hart Software
> > Service's
> > (HSS) payload generator tool. This tool creates a formatted payload
> > image for the HSS zero-stage bootloader on PolarFire SoC, given a
> > configuration file and a set of ELF binaries. The configuration
> > file is used to map the ELF binaries or binary blobs to the
> > individual application harts (U54s). Add the HSS payload generator
> > as a
> > host package to support this.
> > 
> > Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
> > Reviewed-by: Valentina Fernandez
> > <valentina.fernandezalanis@microchip.com>
> > ---
> >  DEVELOPERS                                    |  3 +++
> >  package/Config.in.host                        |  1 +
> >  .../Config.in.host                            | 11 ++++++++
> >  .../microchip-hss-payload-generator.mk        | 25
> > +++++++++++++++++++
> >  4 files changed, 40 insertions(+)
> 
> This was missing a hash file for the package, which provides the hash
> of the tarball and the hash of the license file.

Apologies for the omission, thanks for adding this.
> 
> > +HOST_MICROCHIP_HSS_PAYLOAD_GENERATOR_VERSION = 2023.06
> > +HOST_MICROCHIP_HSS_PAYLOAD_GENERATOR_SITE = $(call
> > github,polarfire-soc,hart-software-
> > services,v$(HOST_MICROCHIP_HSS_PAYLOAD_GENERATOR_VERSION))
> > +HOST_MICROCHIP_HSS_PAYLOAD_GENERATOR_LICENSE = MIT
> > +HOST_MICROCHIP_HSS_PAYLOAD_GENERATOR_LICENSE_FILES = LICENSE.md
> 
> I was initially confused by this, because LICENSE.md also mentions
> than
> the repo contains OpenSBI, which is under BSD-2-Clause. But in fact
> this package only builds what's in tools/hss-payload-generator, so
> the
> rest is irrelevant. Therefore, I have changed this to:
> 
> +# Some parts of the repository are under different licenses, but we
> +# are only building/installing the code in
> +# tools/hss-payload-generator/.
> +HOST_MICROCHIP_HSS_PAYLOAD_GENERATOR_LICENSE = MIT or GPL-2.0+
> +HOST_MICROCHIP_HSS_PAYLOAD_GENERATOR_LICENSE_FILES = tools/hss-
> payload-generator/LICENSE.md
> 
> Let me know if you think this is incorrect.

Thank you for updating this, it is correct.
> 
> I've applied to our "next" branch with those changes. Thanks!

That's great news. Thanks a million for all your feedback.

Thanks,

Jamie

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[Buildroot] [PATCH v3 2/2] configs/microchip_mpfs_icicle: add support for Microchip's Icicle Kit

[Jamie Gibbons via buildroot]

Add support for the icicle kit, the main development board for
Microchip's PolarFire SoC.

The configuration file is microchip_mpfs_icicle_defconfig. It builds a
bootable kernel image with an embedded root file system. The image
built can be flashed to the board using the eMMC or an SD card.

The yaml configuration file is used by the hss payload generator. It
maps the ELF binaries or binary blobs to the individual application
harts (U54s).

The image generator script sets the partitions of the image.

The kernel fragment file ses additional configurations for the icicle
kit in buildroot that are not in the default configuration.

The image tree souce file creates a FIT image.

The post image script creates the payload using the payload generator
host package and finally, creates the FIT image using the ITS after the
kernel build.

The U-Boot script and additional U-Boot configurations ensure that
U-Boot behaves as expected for the icicle kit and boots the FIT image.

The readme.txt file documents how to build and boot the icicle kit with
this configuration.

Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
---
 DEVELOPERS                                    |  2 +
 board/microchip/mpfs_icicle/README.txt        | 62 +++++++++++++++++++
 board/microchip/mpfs_icicle/config.yaml       | 28 +++++++++
 board/microchip/mpfs_icicle/genimage.cfg      | 34 ++++++++++
 board/microchip/mpfs_icicle/linux.fragment    |  1 +
 board/microchip/mpfs_icicle/mpfs_icicle.its   | 53 ++++++++++++++++
 board/microchip/mpfs_icicle/post-image.sh     | 13 ++++
 board/microchip/mpfs_icicle/uboot-env.txt     | 16 +++++
 .../mpfs_icicle/uboot-fragment-rootfs.config  |  3 +
 configs/microchip_mpfs_icicle_defconfig       | 34 ++++++++++
 10 files changed, 246 insertions(+)
 create mode 100644 board/microchip/mpfs_icicle/README.txt
 create mode 100644 board/microchip/mpfs_icicle/config.yaml
 create mode 100644 board/microchip/mpfs_icicle/genimage.cfg
 create mode 100644 board/microchip/mpfs_icicle/linux.fragment
 create mode 100644 board/microchip/mpfs_icicle/mpfs_icicle.its
 create mode 100755 board/microchip/mpfs_icicle/post-image.sh
 create mode 100644 board/microchip/mpfs_icicle/uboot-env.txt
 create mode 100644 board/microchip/mpfs_icicle/uboot-fragment-rootfs.config
 create mode 100644 configs/microchip_mpfs_icicle_defconfig

diff --git a/DEVELOPERS b/DEVELOPERS
index 2f039a2405..8df10aca21 100644
--- a/DEVELOPERS
+++ b/DEVELOPERS
@@ -1460,6 +1460,8 @@ F:	package/rpm/
 F:	package/yad/
 
 N:	Jamie Gibbons <jamie.gibbons@microchip.com>
+F:	board/microchip/mpfs_icicle
+F:	configs/microchip_mpfs_icicle_defconfig
 F:	package/microchip-hss-payload-generator
 
 N:	Jan Heylen <jan.heylen@nokia.com>
diff --git a/board/microchip/mpfs_icicle/README.txt b/board/microchip/mpfs_icicle/README.txt
new file mode 100644
index 0000000000..de20ecc410
--- /dev/null
+++ b/board/microchip/mpfs_icicle/README.txt
@@ -0,0 +1,62 @@
+Microchip PolarFire SoC Icicle Kit
+==================================
+
+This file describes how to use the pre-defined Buildroot
+configuration for Microchip's PolarFire SoC Icicle Kit.
+
+Further information about the PolarFire SoC Icicle Kit can be found
+at https://github.com/polarfire-soc/polarfire-soc-documentation
+
+Building
+========
+
+Configure Buildroot using the default board configuration:
+
+  '$ make microchip_mpfs_icicle_defconfig'
+
+Customise the build as necessary:
+
+  '$ make menuconfig'
+
+Start the build:
+
+  '$ make'
+
+Result of the build
+===================
+
+Once the build has finished you will have the following files:
+
+    output/images/
+    +-- boot.scr
+    +-- boot.vfat
+    +-- Image
+    +-- mpfs_icicle.itb
+    +-- mpfs_icicle.its
+    +-- mpfs-icicle-kit.dtb
+    +-- payload.bin
+    +-- rootfs.ext2
+    +-- rootfs.ext4
+    +-- rootfs.tar
+    +-- sdcard.img
+    +-- u-boot.bin
+
+
+Creating a bootable SD card with genimage
+=========================================
+
+By default Buildroot builds a SD card image for you. The first partition
+of this image contains a U-Boot binary, embedded in a Hart Software
+Services (HSS) payload. The second partition contains a FAT filesystem
+with a U-Boot env and an ITB file containing the kernel and the device
+tree. The third partition contains the file system. This image can be
+written directly to the eMMC or an SD card. All you need to do is dd the
+image to the eMMC or your SD card, which can be done with the following
+command on your development host:
+
+  '$ sudo dd if=output/images/sdcard.img of=/dev/sdb bs=1M'
+
+For instructions on how to transfer the image to the eMMC/SD, please refer to
+the "Programming the Linux image" section of our guide on updating
+PolarFire SoC dev kits:
+https://github.com/polarfire-soc/polarfire-soc-documentation/blob/master/reference-designs-fpga-and-development-kits/updating-mpfs-kit.md.
diff --git a/board/microchip/mpfs_icicle/config.yaml b/board/microchip/mpfs_icicle/config.yaml
new file mode 100644
index 0000000000..5fccdfd34f
--- /dev/null
+++ b/board/microchip/mpfs_icicle/config.yaml
@@ -0,0 +1,28 @@
+#
+# HSS Payload Generator - buildroot configuration file
+#
+
+# First, we can optionally set a name for our image, otherwise one will be created dynamically
+set-name: 'PolarFire-SoC-HSS::U-Boot'
+
+#
+# Next, we'll define the entry point addresses for each hart, as follows:
+#
+hart-entry-points: {u54_1: '0x80200000', u54_2: '0x80200000', u54_3: '0x80200000', u54_4: '0x80200000'}
+#
+# Finally, we'll define a payloads (source binary file) that will be placed at certain regions in memory
+# The payload section is defined with the keyword payloads, and then a number of individual
+# payload descriptors.
+#
+# Each payload has a name (path to its ELF/bin file), an owner-hart, and optionally 1-3 secondary-harts.
+#
+# Additionally, it has a privilege mode in which it will start execution.
+#  * Valid privilege modes are PRV_M, PRV_S and PRV_U.
+#
+#
+# In this case, the only payload is the u-boot s-mode binary.
+#
+# Case only matters for the ELF path names, not the keywords.
+#
+payloads:
+  u-boot.bin: {exec-addr: '0x80200000', owner-hart: u54_1, secondary-hart: u54_2, secondary-hart: u54_3, secondary-hart: u54_4, priv-mode: prv_s}
diff --git a/board/microchip/mpfs_icicle/genimage.cfg b/board/microchip/mpfs_icicle/genimage.cfg
new file mode 100644
index 0000000000..6955d3365a
--- /dev/null
+++ b/board/microchip/mpfs_icicle/genimage.cfg
@@ -0,0 +1,34 @@
+# Image for eMMC or SDCard boot on the Microchip PolarFire SOC Icicle Board
+#
+image boot.vfat {
+	vfat {
+		files = {
+			 "mpfs_icicle.itb",
+		}
+
+		file boot.scr {
+			image = "boot.scr"
+		}
+	}
+	size = 60M
+}
+
+image sdcard.img {
+	hdimage {
+		gpt = true
+	}
+
+	partition uboot {
+		partition-type-uuid = 21686148-6449-6E6F-744E-656564454649
+		image = "payload.bin"
+	}
+
+	partition kernel {
+		bootable = "true"
+		image = "boot.vfat"
+	}
+
+	partition root {
+		image = "rootfs.ext4"
+	}
+}
diff --git a/board/microchip/mpfs_icicle/linux.fragment b/board/microchip/mpfs_icicle/linux.fragment
new file mode 100644
index 0000000000..0cecddb61b
--- /dev/null
+++ b/board/microchip/mpfs_icicle/linux.fragment
@@ -0,0 +1 @@
+CONFIG_POLARFIRE_SOC_DMA_NONCOHERENT=y
diff --git a/board/microchip/mpfs_icicle/mpfs_icicle.its b/board/microchip/mpfs_icicle/mpfs_icicle.its
new file mode 100644
index 0000000000..a62b079fa1
--- /dev/null
+++ b/board/microchip/mpfs_icicle/mpfs_icicle.its
@@ -0,0 +1,53 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Flattened Image Tree file for Icicle Kit
+ *
+ */
+
+/dts-v1/;
+
+/ {
+	description = "U-Boot fitImage for the MPFS";
+	address-cells = <1>;
+
+		images {
+			kernel {
+				description = "Linux kernel";
+				data = /incbin/("./Image");
+				type = "kernel";
+				arch = "riscv";
+				os = "linux";
+				compression = "none";
+				load = <0x80200000>;
+				entry = <0x80200000>;
+				hash-1 {
+					algo = "sha256";
+				};
+			};
+			base_fdt {
+				description = "Flattened Device Tree blob";
+				data = /incbin/("./mpfs-icicle-kit.dtb");
+				type = "flat_dt";
+				arch = "riscv";
+				compression = "none";
+				load = <0x8a000000>;
+				hash-1 {
+					algo = "sha256";
+				};
+			};
+		};
+
+		configurations {
+			default = "kernel_dtb";
+			kernel_dtb {
+				description = "1 Linux kernel, FDT blob";
+				kernel = "kernel";
+				fdt = "base_fdt";
+			};
+
+			base_dtb {
+				description = "Base FDT blob for MPFS Icicle board";
+				fdt = "base_fdt";
+			};
+		};
+};
diff --git a/board/microchip/mpfs_icicle/post-image.sh b/board/microchip/mpfs_icicle/post-image.sh
new file mode 100755
index 0000000000..54cc6d71f8
--- /dev/null
+++ b/board/microchip/mpfs_icicle/post-image.sh
@@ -0,0 +1,13 @@
+#!/usr/bin/env bash
+
+BASE_DIR=$(pwd)
+HSS_PAYLOAD_GENERATOR=$HOST_DIR/bin/hss-payload-generator
+MKIMAGE=$HOST_DIR/bin/mkimage
+GENIMAGE=${BASE_DIR}/support/scripts/genimage.sh
+GENIMAGE_CFG=${BASE_DIR}/$2
+
+cd "${BINARIES_DIR}" || exit
+${HSS_PAYLOAD_GENERATOR} -c "${BASE_DIR}"/board/microchip/mpfs_icicle/config.yaml payload.bin
+cp "${BASE_DIR}"/board/microchip/mpfs_icicle/mpfs_icicle.its ./
+${MKIMAGE} -f mpfs_icicle.its mpfs_icicle.itb
+${GENIMAGE} -c "${GENIMAGE_CFG}"
diff --git a/board/microchip/mpfs_icicle/uboot-env.txt b/board/microchip/mpfs_icicle/uboot-env.txt
new file mode 100644
index 0000000000..8a655085ed
--- /dev/null
+++ b/board/microchip/mpfs_icicle/uboot-env.txt
@@ -0,0 +1,16 @@
+# this assumes ${scriptaddr} is already set!!
+
+# Try to boot a fitImage from eMMC/SD
+
+setenv fdt_high 0xffffffffffffffff
+setenv initrd_high 0xffffffffffffffff
+
+load mmc 0:${distro_bootpart} ${scriptaddr} mpfs_icicle.itb;
+bootm start ${scriptaddr}#kernel_dtb;
+bootm loados ${scriptaddr};
+# Try to load a ramdisk if available inside fitImage
+bootm ramdisk;
+bootm prep;
+fdt set /soc/ethernet@20112000 mac-address ${icicle_mac_addr0};
+fdt set /soc/ethernet@20110000 mac-address ${icicle_mac_addr1};
+bootm go;
diff --git a/board/microchip/mpfs_icicle/uboot-fragment-rootfs.config b/board/microchip/mpfs_icicle/uboot-fragment-rootfs.config
new file mode 100644
index 0000000000..e2a5eb9438
--- /dev/null
+++ b/board/microchip/mpfs_icicle/uboot-fragment-rootfs.config
@@ -0,0 +1,3 @@
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mmcblk0p3 rootwait uio_pdrv_genirq.of_id=generic-uio"
+CONFIG_MPFS_PRIORITISE_QSPI_BOOT=n
diff --git a/configs/microchip_mpfs_icicle_defconfig b/configs/microchip_mpfs_icicle_defconfig
new file mode 100644
index 0000000000..9ad1bf66d8
--- /dev/null
+++ b/configs/microchip_mpfs_icicle_defconfig
@@ -0,0 +1,34 @@
+BR2_riscv=y
+BR2_riscv_custom=y
+BR2_RISCV_ISA_CUSTOM_RVM=y
+BR2_RISCV_ISA_CUSTOM_RVF=y
+BR2_RISCV_ISA_CUSTOM_RVD=y
+BR2_RISCV_ISA_CUSTOM_RVC=y
+BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_6_1=y
+BR2_TARGET_GENERIC_HOSTNAME="mpfs_icicle"
+BR2_ROOTFS_POST_IMAGE_SCRIPT="board/microchip/mpfs_icicle/post-image.sh"
+BR2_ROOTFS_POST_SCRIPT_ARGS="board/microchip/mpfs_icicle/genimage.cfg"
+BR2_LINUX_KERNEL=y
+BR2_LINUX_KERNEL_CUSTOM_TARBALL=y
+BR2_LINUX_KERNEL_CUSTOM_TARBALL_LOCATION="$(call github,linux4microchip,linux,linux-6.1-mchp+fpga)/linux4microchip+fpga-2023.06.tar.gz"
+BR2_LINUX_KERNEL_DEFCONFIG="mpfs"
+BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="board/microchip/mpfs_icicle/linux.fragment"
+BR2_LINUX_KERNEL_DTS_SUPPORT=y
+BR2_LINUX_KERNEL_INTREE_DTS_NAME="microchip/mpfs-icicle-kit"
+BR2_TARGET_ROOTFS_EXT2=y
+BR2_TARGET_ROOTFS_EXT2_4=y
+BR2_TARGET_UBOOT=y
+BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
+BR2_TARGET_UBOOT_CUSTOM_TARBALL=y
+BR2_TARGET_UBOOT_CUSTOM_TARBALL_LOCATION="$(call github,polarfire-soc,u-boot)linux4microchip+fpga-2023.06.tar.gz"
+BR2_TARGET_UBOOT_BOARD_DEFCONFIG="microchip_mpfs_icicle"
+BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="board/microchip/mpfs_icicle/uboot-fragment-rootfs.config"
+BR2_TARGET_UBOOT_NEEDS_DTC=y
+BR2_PACKAGE_HOST_DOSFSTOOLS=y
+BR2_PACKAGE_HOST_GENIMAGE=y
+BR2_PACKAGE_HOST_MICROCHIP_HSS_PAYLOAD_GENERATOR=y
+BR2_PACKAGE_HOST_MTOOLS=y
+BR2_PACKAGE_HOST_UBOOT_TOOLS=y
+BR2_PACKAGE_HOST_UBOOT_TOOLS_FIT_SUPPORT=y
+BR2_PACKAGE_HOST_UBOOT_TOOLS_BOOT_SCRIPT=y
+BR2_PACKAGE_HOST_UBOOT_TOOLS_BOOT_SCRIPT_SOURCE="board/microchip/mpfs_icicle/uboot-env.txt"
-- 
2.34.1

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Re: [Buildroot] [PATCH v3 2/2] configs/microchip_mpfs_icicle: add support for Microchip's Icicle Kit

[Giulio Benetti]

On 12/07/23 14:51, Jamie Gibbons via buildroot wrote:
> Add support for the icicle kit, the main development board for
> Microchip's PolarFire SoC.
> 
> The configuration file is microchip_mpfs_icicle_defconfig. It builds a
> bootable kernel image with an embedded root file system. The image
> built can be flashed to the board using the eMMC or an SD card.
> 
> The yaml configuration file is used by the hss payload generator. It
> maps the ELF binaries or binary blobs to the individual application
> harts (U54s).
> 
> The image generator script sets the partitions of the image.
> 
> The kernel fragment file ses additional configurations for the icicle
> kit in buildroot that are not in the default configuration.
> 
> The image tree souce file creates a FIT image.
> 
> The post image script creates the payload using the payload generator
> host package and finally, creates the FIT image using the ITS after the
> kernel build.
> 
> The U-Boot script and additional U-Boot configurations ensure that
> U-Boot behaves as expected for the icicle kit and boots the FIT image.
> 
> The readme.txt file documents how to build and boot the icicle kit with
> this configuration.
> 
> Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>

Reviewed-by: Giulio Benetti <giulio.benetti@micronovasrl.com>

Same here for V1->V2 changes.

Also, it's ok to drop the partition-type-uuid in genimage.cfg if it's
the default value.

Thank you
Best regards
-- 
CEO/CTO@Benetti Engineering sas

> ---
>   DEVELOPERS                                    |  2 +
>   board/microchip/mpfs_icicle/README.txt        | 62 +++++++++++++++++++
>   board/microchip/mpfs_icicle/config.yaml       | 28 +++++++++
>   board/microchip/mpfs_icicle/genimage.cfg      | 34 ++++++++++
>   board/microchip/mpfs_icicle/linux.fragment    |  1 +
>   board/microchip/mpfs_icicle/mpfs_icicle.its   | 53 ++++++++++++++++
>   board/microchip/mpfs_icicle/post-image.sh     | 13 ++++
>   board/microchip/mpfs_icicle/uboot-env.txt     | 16 +++++
>   .../mpfs_icicle/uboot-fragment-rootfs.config  |  3 +
>   configs/microchip_mpfs_icicle_defconfig       | 34 ++++++++++
>   10 files changed, 246 insertions(+)
>   create mode 100644 board/microchip/mpfs_icicle/README.txt
>   create mode 100644 board/microchip/mpfs_icicle/config.yaml
>   create mode 100644 board/microchip/mpfs_icicle/genimage.cfg
>   create mode 100644 board/microchip/mpfs_icicle/linux.fragment
>   create mode 100644 board/microchip/mpfs_icicle/mpfs_icicle.its
>   create mode 100755 board/microchip/mpfs_icicle/post-image.sh
>   create mode 100644 board/microchip/mpfs_icicle/uboot-env.txt
>   create mode 100644 board/microchip/mpfs_icicle/uboot-fragment-rootfs.config
>   create mode 100644 configs/microchip_mpfs_icicle_defconfig
> 
> diff --git a/DEVELOPERS b/DEVELOPERS
> index 2f039a2405..8df10aca21 100644
> --- a/DEVELOPERS
> +++ b/DEVELOPERS
> @@ -1460,6 +1460,8 @@ F:	package/rpm/
>   F:	package/yad/
>   
>   N:	Jamie Gibbons <jamie.gibbons@microchip.com>
> +F:	board/microchip/mpfs_icicle
> +F:	configs/microchip_mpfs_icicle_defconfig
>   F:	package/microchip-hss-payload-generator
>   
>   N:	Jan Heylen <jan.heylen@nokia.com>
> diff --git a/board/microchip/mpfs_icicle/README.txt b/board/microchip/mpfs_icicle/README.txt
> new file mode 100644
> index 0000000000..de20ecc410
> --- /dev/null
> +++ b/board/microchip/mpfs_icicle/README.txt
> @@ -0,0 +1,62 @@
> +Microchip PolarFire SoC Icicle Kit
> +==================================
> +
> +This file describes how to use the pre-defined Buildroot
> +configuration for Microchip's PolarFire SoC Icicle Kit.
> +
> +Further information about the PolarFire SoC Icicle Kit can be found
> +at https://github.com/polarfire-soc/polarfire-soc-documentation
> +
> +Building
> +========
> +
> +Configure Buildroot using the default board configuration:
> +
> +  '$ make microchip_mpfs_icicle_defconfig'
> +
> +Customise the build as necessary:
> +
> +  '$ make menuconfig'
> +
> +Start the build:
> +
> +  '$ make'
> +
> +Result of the build
> +===================
> +
> +Once the build has finished you will have the following files:
> +
> +    output/images/
> +    +-- boot.scr
> +    +-- boot.vfat
> +    +-- Image
> +    +-- mpfs_icicle.itb
> +    +-- mpfs_icicle.its
> +    +-- mpfs-icicle-kit.dtb
> +    +-- payload.bin
> +    +-- rootfs.ext2
> +    +-- rootfs.ext4
> +    +-- rootfs.tar
> +    +-- sdcard.img
> +    +-- u-boot.bin
> +
> +
> +Creating a bootable SD card with genimage
> +=========================================
> +
> +By default Buildroot builds a SD card image for you. The first partition
> +of this image contains a U-Boot binary, embedded in a Hart Software
> +Services (HSS) payload. The second partition contains a FAT filesystem
> +with a U-Boot env and an ITB file containing the kernel and the device
> +tree. The third partition contains the file system. This image can be
> +written directly to the eMMC or an SD card. All you need to do is dd the
> +image to the eMMC or your SD card, which can be done with the following
> +command on your development host:
> +
> +  '$ sudo dd if=output/images/sdcard.img of=/dev/sdb bs=1M'
> +
> +For instructions on how to transfer the image to the eMMC/SD, please refer to
> +the "Programming the Linux image" section of our guide on updating
> +PolarFire SoC dev kits:
> +https://github.com/polarfire-soc/polarfire-soc-documentation/blob/master/reference-designs-fpga-and-development-kits/updating-mpfs-kit.md.
> diff --git a/board/microchip/mpfs_icicle/config.yaml b/board/microchip/mpfs_icicle/config.yaml
> new file mode 100644
> index 0000000000..5fccdfd34f
> --- /dev/null
> +++ b/board/microchip/mpfs_icicle/config.yaml
> @@ -0,0 +1,28 @@
> +#
> +# HSS Payload Generator - buildroot configuration file
> +#
> +
> +# First, we can optionally set a name for our image, otherwise one will be created dynamically
> +set-name: 'PolarFire-SoC-HSS::U-Boot'
> +
> +#
> +# Next, we'll define the entry point addresses for each hart, as follows:
> +#
> +hart-entry-points: {u54_1: '0x80200000', u54_2: '0x80200000', u54_3: '0x80200000', u54_4: '0x80200000'}
> +#
> +# Finally, we'll define a payloads (source binary file) that will be placed at certain regions in memory
> +# The payload section is defined with the keyword payloads, and then a number of individual
> +# payload descriptors.
> +#
> +# Each payload has a name (path to its ELF/bin file), an owner-hart, and optionally 1-3 secondary-harts.
> +#
> +# Additionally, it has a privilege mode in which it will start execution.
> +#  * Valid privilege modes are PRV_M, PRV_S and PRV_U.
> +#
> +#
> +# In this case, the only payload is the u-boot s-mode binary.
> +#
> +# Case only matters for the ELF path names, not the keywords.
> +#
> +payloads:
> +  u-boot.bin: {exec-addr: '0x80200000', owner-hart: u54_1, secondary-hart: u54_2, secondary-hart: u54_3, secondary-hart: u54_4, priv-mode: prv_s}
> diff --git a/board/microchip/mpfs_icicle/genimage.cfg b/board/microchip/mpfs_icicle/genimage.cfg
> new file mode 100644
> index 0000000000..6955d3365a
> --- /dev/null
> +++ b/board/microchip/mpfs_icicle/genimage.cfg
> @@ -0,0 +1,34 @@
> +# Image for eMMC or SDCard boot on the Microchip PolarFire SOC Icicle Board
> +#
> +image boot.vfat {
> +	vfat {
> +		files = {
> +			 "mpfs_icicle.itb",
> +		}
> +
> +		file boot.scr {
> +			image = "boot.scr"
> +		}
> +	}
> +	size = 60M
> +}
> +
> +image sdcard.img {
> +	hdimage {
> +		gpt = true
> +	}
> +
> +	partition uboot {
> +		partition-type-uuid = 21686148-6449-6E6F-744E-656564454649
> +		image = "payload.bin"
> +	}
> +
> +	partition kernel {
> +		bootable = "true"
> +		image = "boot.vfat"
> +	}
> +
> +	partition root {
> +		image = "rootfs.ext4"
> +	}
> +}
> diff --git a/board/microchip/mpfs_icicle/linux.fragment b/board/microchip/mpfs_icicle/linux.fragment
> new file mode 100644
> index 0000000000..0cecddb61b
> --- /dev/null
> +++ b/board/microchip/mpfs_icicle/linux.fragment
> @@ -0,0 +1 @@
> +CONFIG_POLARFIRE_SOC_DMA_NONCOHERENT=y
> diff --git a/board/microchip/mpfs_icicle/mpfs_icicle.its b/board/microchip/mpfs_icicle/mpfs_icicle.its
> new file mode 100644
> index 0000000000..a62b079fa1
> --- /dev/null
> +++ b/board/microchip/mpfs_icicle/mpfs_icicle.its
> @@ -0,0 +1,53 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Flattened Image Tree file for Icicle Kit
> + *
> + */
> +
> +/dts-v1/;
> +
> +/ {
> +	description = "U-Boot fitImage for the MPFS";
> +	address-cells = <1>;
> +
> +		images {
> +			kernel {
> +				description = "Linux kernel";
> +				data = /incbin/("./Image");
> +				type = "kernel";
> +				arch = "riscv";
> +				os = "linux";
> +				compression = "none";
> +				load = <0x80200000>;
> +				entry = <0x80200000>;
> +				hash-1 {
> +					algo = "sha256";
> +				};
> +			};
> +			base_fdt {
> +				description = "Flattened Device Tree blob";
> +				data = /incbin/("./mpfs-icicle-kit.dtb");
> +				type = "flat_dt";
> +				arch = "riscv";
> +				compression = "none";
> +				load = <0x8a000000>;
> +				hash-1 {
> +					algo = "sha256";
> +				};
> +			};
> +		};
> +
> +		configurations {
> +			default = "kernel_dtb";
> +			kernel_dtb {
> +				description = "1 Linux kernel, FDT blob";
> +				kernel = "kernel";
> +				fdt = "base_fdt";
> +			};
> +
> +			base_dtb {
> +				description = "Base FDT blob for MPFS Icicle board";
> +				fdt = "base_fdt";
> +			};
> +		};
> +};
> diff --git a/board/microchip/mpfs_icicle/post-image.sh b/board/microchip/mpfs_icicle/post-image.sh
> new file mode 100755
> index 0000000000..54cc6d71f8
> --- /dev/null
> +++ b/board/microchip/mpfs_icicle/post-image.sh
> @@ -0,0 +1,13 @@
> +#!/usr/bin/env bash
> +
> +BASE_DIR=$(pwd)
> +HSS_PAYLOAD_GENERATOR=$HOST_DIR/bin/hss-payload-generator
> +MKIMAGE=$HOST_DIR/bin/mkimage
> +GENIMAGE=${BASE_DIR}/support/scripts/genimage.sh
> +GENIMAGE_CFG=${BASE_DIR}/$2
> +
> +cd "${BINARIES_DIR}" || exit
> +${HSS_PAYLOAD_GENERATOR} -c "${BASE_DIR}"/board/microchip/mpfs_icicle/config.yaml payload.bin
> +cp "${BASE_DIR}"/board/microchip/mpfs_icicle/mpfs_icicle.its ./
> +${MKIMAGE} -f mpfs_icicle.its mpfs_icicle.itb
> +${GENIMAGE} -c "${GENIMAGE_CFG}"
> diff --git a/board/microchip/mpfs_icicle/uboot-env.txt b/board/microchip/mpfs_icicle/uboot-env.txt
> new file mode 100644
> index 0000000000..8a655085ed
> --- /dev/null
> +++ b/board/microchip/mpfs_icicle/uboot-env.txt
> @@ -0,0 +1,16 @@
> +# this assumes ${scriptaddr} is already set!!
> +
> +# Try to boot a fitImage from eMMC/SD
> +
> +setenv fdt_high 0xffffffffffffffff
> +setenv initrd_high 0xffffffffffffffff
> +
> +load mmc 0:${distro_bootpart} ${scriptaddr} mpfs_icicle.itb;
> +bootm start ${scriptaddr}#kernel_dtb;
> +bootm loados ${scriptaddr};
> +# Try to load a ramdisk if available inside fitImage
> +bootm ramdisk;
> +bootm prep;
> +fdt set /soc/ethernet@20112000 mac-address ${icicle_mac_addr0};
> +fdt set /soc/ethernet@20110000 mac-address ${icicle_mac_addr1};
> +bootm go;
> diff --git a/board/microchip/mpfs_icicle/uboot-fragment-rootfs.config b/board/microchip/mpfs_icicle/uboot-fragment-rootfs.config
> new file mode 100644
> index 0000000000..e2a5eb9438
> --- /dev/null
> +++ b/board/microchip/mpfs_icicle/uboot-fragment-rootfs.config
> @@ -0,0 +1,3 @@
> +CONFIG_USE_BOOTARGS=y
> +CONFIG_BOOTARGS="root=/dev/mmcblk0p3 rootwait uio_pdrv_genirq.of_id=generic-uio"
> +CONFIG_MPFS_PRIORITISE_QSPI_BOOT=n
> diff --git a/configs/microchip_mpfs_icicle_defconfig b/configs/microchip_mpfs_icicle_defconfig
> new file mode 100644
> index 0000000000..9ad1bf66d8
> --- /dev/null
> +++ b/configs/microchip_mpfs_icicle_defconfig
> @@ -0,0 +1,34 @@
> +BR2_riscv=y
> +BR2_riscv_custom=y
> +BR2_RISCV_ISA_CUSTOM_RVM=y
> +BR2_RISCV_ISA_CUSTOM_RVF=y
> +BR2_RISCV_ISA_CUSTOM_RVD=y
> +BR2_RISCV_ISA_CUSTOM_RVC=y
> +BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_6_1=y
> +BR2_TARGET_GENERIC_HOSTNAME="mpfs_icicle"
> +BR2_ROOTFS_POST_IMAGE_SCRIPT="board/microchip/mpfs_icicle/post-image.sh"
> +BR2_ROOTFS_POST_SCRIPT_ARGS="board/microchip/mpfs_icicle/genimage.cfg"
> +BR2_LINUX_KERNEL=y
> +BR2_LINUX_KERNEL_CUSTOM_TARBALL=y
> +BR2_LINUX_KERNEL_CUSTOM_TARBALL_LOCATION="$(call github,linux4microchip,linux,linux-6.1-mchp+fpga)/linux4microchip+fpga-2023.06.tar.gz"
> +BR2_LINUX_KERNEL_DEFCONFIG="mpfs"
> +BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="board/microchip/mpfs_icicle/linux.fragment"
> +BR2_LINUX_KERNEL_DTS_SUPPORT=y
> +BR2_LINUX_KERNEL_INTREE_DTS_NAME="microchip/mpfs-icicle-kit"
> +BR2_TARGET_ROOTFS_EXT2=y
> +BR2_TARGET_ROOTFS_EXT2_4=y
> +BR2_TARGET_UBOOT=y
> +BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
> +BR2_TARGET_UBOOT_CUSTOM_TARBALL=y
> +BR2_TARGET_UBOOT_CUSTOM_TARBALL_LOCATION="$(call github,polarfire-soc,u-boot)linux4microchip+fpga-2023.06.tar.gz"
> +BR2_TARGET_UBOOT_BOARD_DEFCONFIG="microchip_mpfs_icicle"
> +BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="board/microchip/mpfs_icicle/uboot-fragment-rootfs.config"
> +BR2_TARGET_UBOOT_NEEDS_DTC=y
> +BR2_PACKAGE_HOST_DOSFSTOOLS=y
> +BR2_PACKAGE_HOST_GENIMAGE=y
> +BR2_PACKAGE_HOST_MICROCHIP_HSS_PAYLOAD_GENERATOR=y
> +BR2_PACKAGE_HOST_MTOOLS=y
> +BR2_PACKAGE_HOST_UBOOT_TOOLS=y
> +BR2_PACKAGE_HOST_UBOOT_TOOLS_FIT_SUPPORT=y
> +BR2_PACKAGE_HOST_UBOOT_TOOLS_BOOT_SCRIPT=y
> +BR2_PACKAGE_HOST_UBOOT_TOOLS_BOOT_SCRIPT_SOURCE="board/microchip/mpfs_icicle/uboot-env.txt"

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Re: [Buildroot] [PATCH v3 2/2] configs/microchip_mpfs_icicle: add support for Microchip's Icicle Kit

[Thomas Petazzoni via buildroot]

Hello Jamie,

I've applied your patch to our "next" branch, with some small changes
(see below), and also I have a few questions.

On Wed, 12 Jul 2023 13:51:54 +0100
Jamie Gibbons via buildroot <buildroot@buildroot.org> wrote:

> +Creating a bootable SD card with genimage
> +=========================================
> +
> +By default Buildroot builds a SD card image for you. The first partition
> +of this image contains a U-Boot binary, embedded in a Hart Software
> +Services (HSS) payload. The second partition contains a FAT filesystem

Could you clarify what this "embedded in a Hart Software Services
payload" means? Does it mean that there is additional code running on
the target other than U-Boot, Linux and user-space? I don't see OpenSBI
being compiled in this defconfig.

I'd like to make sure we have properly captured all the code that ends
up running on the target, so that we are complete from a licensing
stand-point.


> diff --git a/board/microchip/mpfs_icicle/post-image.sh b/board/microchip/mpfs_icicle/post-image.sh
> new file mode 100755
> index 0000000000..54cc6d71f8
> --- /dev/null
> +++ b/board/microchip/mpfs_icicle/post-image.sh
> @@ -0,0 +1,13 @@
> +#!/usr/bin/env bash
> +
> +BASE_DIR=$(pwd)
> +HSS_PAYLOAD_GENERATOR=$HOST_DIR/bin/hss-payload-generator
> +MKIMAGE=$HOST_DIR/bin/mkimage
> +GENIMAGE=${BASE_DIR}/support/scripts/genimage.sh
> +GENIMAGE_CFG=${BASE_DIR}/$2
> +
> +cd "${BINARIES_DIR}" || exit
> +${HSS_PAYLOAD_GENERATOR} -c "${BASE_DIR}"/board/microchip/mpfs_icicle/config.yaml payload.bin
> +cp "${BASE_DIR}"/board/microchip/mpfs_icicle/mpfs_icicle.its ./
> +${MKIMAGE} -f mpfs_icicle.its mpfs_icicle.itb
> +${GENIMAGE} -c "${GENIMAGE_CFG}"

Simplified to:

+#!/bin/sh
+HSS_PAYLOAD_GENERATOR=${HOST_DIR}/bin/hss-payload-generator
+MKIMAGE=${HOST_DIR}/bin/mkimage
+
+${HSS_PAYLOAD_GENERATOR} -c board/microchip/mpfs_icicle/config.yaml ${BINARIES_DIR}/payload.bin
+cp board/microchip/mpfs_icicle/mpfs_icicle.its ${BINARIES_DIR}/mpfs_icicle.its
+(cd ${BINARIES_DIR} && ${MKIMAGE} -f mpfs_icicle.its mpfs_icicle.itb)
+support/scripts/genimage.sh -c board/microchip/mpfs_icicle/genimage.cfg


> diff --git a/configs/microchip_mpfs_icicle_defconfig b/configs/microchip_mpfs_icicle_defconfig
> new file mode 100644
> index 0000000000..9ad1bf66d8
> --- /dev/null
> +++ b/configs/microchip_mpfs_icicle_defconfig
> @@ -0,0 +1,34 @@
> +BR2_riscv=y
> +BR2_riscv_custom=y
> +BR2_RISCV_ISA_CUSTOM_RVM=y
> +BR2_RISCV_ISA_CUSTOM_RVF=y
> +BR2_RISCV_ISA_CUSTOM_RVD=y
> +BR2_RISCV_ISA_CUSTOM_RVC=y

So you're not a riscv_g core because you don't have the atomic extension?

> +BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_6_1=y
> +BR2_TARGET_GENERIC_HOSTNAME="mpfs_icicle"
> +BR2_ROOTFS_POST_IMAGE_SCRIPT="board/microchip/mpfs_icicle/post-image.sh"
> +BR2_ROOTFS_POST_SCRIPT_ARGS="board/microchip/mpfs_icicle/genimage.cfg"

Option dropped, because board/microchip/mpfs_icicle/post-image.sh now
hardcodes the genimage configuration filename.

Thanks!

Thomas
-- 
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Embedded Linux and Kernel engineering and training
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Re: [Buildroot] [PATCH v3 2/2] configs/microchip_mpfs_icicle: add support for Microchip's Icicle Kit

[Jamie.Gibbons--- via buildroot]

Hi Thomas,

On Tue, 2023-08-08 at 23:59 +0200, Thomas Petazzoni wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you
> know the content is safe
> 
> Hello Jamie,
> 
> I've applied your patch to our "next" branch, with some small changes
> (see below), and also I have a few questions.
> 
> On Wed, 12 Jul 2023 13:51:54 +0100
> Jamie Gibbons via buildroot <buildroot@buildroot.org> wrote:
> 
> > +Creating a bootable SD card with genimage
> > +=========================================
> > +
> > +By default Buildroot builds a SD card image for you. The first
> > partition
> > +of this image contains a U-Boot binary, embedded in a Hart
> > Software
> > +Services (HSS) payload. The second partition contains a FAT
> > filesystem
> 
> Could you clarify what this "embedded in a Hart Software Services
> payload" means? Does it mean that there is additional code running on
> the target other than U-Boot, Linux and user-space? I don't see
> OpenSBI
> being compiled in this defconfig.
> 
> I'd like to make sure we have properly captured all the code that
> ends
> up running on the target, so that we are complete from a licensing
> stand-point.
> 
The HSS (Hart Software Services) acts as a zero-stage bootloader on the
Icicle kit. The HSS reads an HSS formatted payload from eMMC/SD that
contains binary images (e.g. U-boot) to be booted via OpenSBI. The HSS
includes OpenSBI so we don't need to enable OpenSBI in the buildroot
defconfig.

The HSS payload generator creates the formatted payload image for the
Hart Software Service zero-stage bootloader on PolarFire SoC, given a
configuration file in yaml format and a set of ELF binaries (e.g. U-
Boot).

Hope this clears up the confusion, let me know if you have any further
questions on this.
> 
> > diff --git a/board/microchip/mpfs_icicle/post-image.sh
> > b/board/microchip/mpfs_icicle/post-image.sh
> > new file mode 100755
> > index 0000000000..54cc6d71f8
> > --- /dev/null
> > +++ b/board/microchip/mpfs_icicle/post-image.sh
> > @@ -0,0 +1,13 @@
> > +#!/usr/bin/env bash
> > +
> > +BASE_DIR=$(pwd)
> > +HSS_PAYLOAD_GENERATOR=$HOST_DIR/bin/hss-payload-generator
> > +MKIMAGE=$HOST_DIR/bin/mkimage
> > +GENIMAGE=${BASE_DIR}/support/scripts/genimage.sh
> > +GENIMAGE_CFG=${BASE_DIR}/$2
> > +
> > +cd "${BINARIES_DIR}" || exit
> > +${HSS_PAYLOAD_GENERATOR} -c
> > "${BASE_DIR}"/board/microchip/mpfs_icicle/config.yaml payload.bin
> > +cp "${BASE_DIR}"/board/microchip/mpfs_icicle/mpfs_icicle.its ./
> > +${MKIMAGE} -f mpfs_icicle.its mpfs_icicle.itb
> > +${GENIMAGE} -c "${GENIMAGE_CFG}"
> 
> Simplified to:
> 
> +#!/bin/sh
> +HSS_PAYLOAD_GENERATOR=${HOST_DIR}/bin/hss-payload-generator
> +MKIMAGE=${HOST_DIR}/bin/mkimage
> +
> +${HSS_PAYLOAD_GENERATOR} -c board/microchip/mpfs_icicle/config.yaml
> ${BINARIES_DIR}/payload.bin
> +cp board/microchip/mpfs_icicle/mpfs_icicle.its
> ${BINARIES_DIR}/mpfs_icicle.its
> +(cd ${BINARIES_DIR} && ${MKIMAGE} -f mpfs_icicle.its
> mpfs_icicle.itb)
> +support/scripts/genimage.sh -c
> board/microchip/mpfs_icicle/genimage.cfg

Looks great, thanks!
> 
> 
> > diff --git a/configs/microchip_mpfs_icicle_defconfig
> > b/configs/microchip_mpfs_icicle_defconfig
> > new file mode 100644
> > index 0000000000..9ad1bf66d8
> > --- /dev/null
> > +++ b/configs/microchip_mpfs_icicle_defconfig
> > @@ -0,0 +1,34 @@
> > +BR2_riscv=y
> > +BR2_riscv_custom=y
> > +BR2_RISCV_ISA_CUSTOM_RVM=y
> > +BR2_RISCV_ISA_CUSTOM_RVF=y
> > +BR2_RISCV_ISA_CUSTOM_RVD=y
> > +BR2_RISCV_ISA_CUSTOM_RVC=y
> 
> So you're not a riscv_g core because you don't have the atomic
> extension?
We have selected riscv_custom because we have compressed instructions
extension (RVC) which is not part of riscv_g.

While looking into that we noticed that we don't have
BR2_RISCV_ISA_CUSTOM_RVA in our defconfig which we need to add, this
was because BR2_RISCV_ISA_CUSTOM_RVA was selected in previous versions
of buildroot using riscv_custom, and now it isn't.

I can send a patch to add BR2_RISCV_ISA_CUSTOM_RVA?

> 
> > +BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_6_1=y
> > +BR2_TARGET_GENERIC_HOSTNAME="mpfs_icicle"
> > +BR2_ROOTFS_POST_IMAGE_SCRIPT="board/microchip/mpfs_icicle/post-
> > image.sh"
> > +BR2_ROOTFS_POST_SCRIPT_ARGS="board/microchip/mpfs_icicle/genimage.
> > cfg"
> 
> Option dropped, because board/microchip/mpfs_icicle/post-image.sh now
> hardcodes the genimage configuration filename.

Makes sense, thank you.

Thanks for the feedback and applying the patch.

Jamie.
> 

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Re: [Buildroot] [PATCH v3 2/2] configs/microchip_mpfs_icicle: add support for Microchip's Icicle Kit

[Thomas Petazzoni via buildroot]

Hello Jamie,

On Wed, 9 Aug 2023 14:43:19 +0000
<Jamie.Gibbons@microchip.com> wrote:

> > Could you clarify what this "embedded in a Hart Software Services
> > payload" means? Does it mean that there is additional code running on
> > the target other than U-Boot, Linux and user-space? I don't see
> > OpenSBI
> > being compiled in this defconfig.
> > 
> > I'd like to make sure we have properly captured all the code that
> > ends
> > up running on the target, so that we are complete from a licensing
> > stand-point.
> >   
> The HSS (Hart Software Services) acts as a zero-stage bootloader on the
> Icicle kit.

Where is this HSS code located? Is it build by Buildroot, or it is part
of some kind of ROM code burned into the SoC?

> The HSS reads an HSS formatted payload from eMMC/SD that
> contains binary images (e.g. U-boot) to be booted via OpenSBI. The HSS
> includes OpenSBI so we don't need to enable OpenSBI in the buildroot
> defconfig.

Who is building the OpenSBI code?

Again, my concern is to make sure that we have properly captured the
licensing of all software components built by Buildroot and that we're
providing the relevant source code matching the software components
that are built by Buildroot.

Right now, it is clear that your defconfig is building U-Boot + Linux +
rootfs, but it isn't clear where the HSS code and OpenSBI code comes
from, and who builds it.

> > So you're not a riscv_g core because you don't have the atomic
> > extension?  
> We have selected riscv_custom because we have compressed instructions
> extension (RVC) which is not part of riscv_g.
> 
> While looking into that we noticed that we don't have
> BR2_RISCV_ISA_CUSTOM_RVA in our defconfig which we need to add, this
> was because BR2_RISCV_ISA_CUSTOM_RVA was selected in previous versions
> of buildroot using riscv_custom, and now it isn't.
> 
> I can send a patch to add BR2_RISCV_ISA_CUSTOM_RVA?

Yes.

I am wondering if we also don't need to move the following options:

config BR2_RISCV_ISA_CUSTOM_RVC
	bool "Compressed Instructions (C)"
	select BR2_RISCV_ISA_RVC

config BR2_RISCV_ISA_CUSTOM_RVV
	bool "Vector Instructions (V)"
	select BR2_RISCV_ISA_RVV
	select BR2_ARCH_NEEDS_GCC_AT_LEAST_12

to be available/visible even when BR2_riscv_g is selected.

Indeed to me riscv_g implies IMAFD, but you can have IMAFD + C or IMAFD
+ V, so it should be possible to say "I have a RISC-V G core, which
  also supports those extra C and/or V extensions".

Does that make sense in the RISC-V world?

Thanks!

Thomas
-- 
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Embedded Linux and Kernel engineering and training
https://bootlin.com
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Re: [Buildroot] [PATCH v3 2/2] configs/microchip_mpfs_icicle: add support for Microchip's Icicle Kit

[Jamie.Gibbons--- via buildroot]

Hi Thomas,

On Wed, 2023-08-09 at 17:02 +0200, Thomas Petazzoni wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know
> the content is safe
> 
> Hello Jamie,
> 
> On Wed, 9 Aug 2023 14:43:19 +0000
> <Jamie.Gibbons@microchip.com> wrote:
> 
> > > Could you clarify what this "embedded in a Hart Software Services
> > > payload" means? Does it mean that there is additional code running
> > > on
> > > the target other than U-Boot, Linux and user-space? I don't see
> > > OpenSBI
> > > being compiled in this defconfig.
> > > 
> > > I'd like to make sure we have properly captured all the code that
> > > ends
> > > up running on the target, so that we are complete from a licensing
> > > stand-point.
> > > 
> > The HSS (Hart Software Services) acts as a zero-stage bootloader on
> > the
> > Icicle kit.
> 
> Where is this HSS code located? Is it build by Buildroot, or it is
> part
> of some kind of ROM code burned into the SoC?

THe HSS code is located in eNVM of the Icicle kit for PolarFire SoC and
built outside of Buildroot.

> 
> > The HSS reads an HSS formatted payload from eMMC/SD that
> > contains binary images (e.g. U-boot) to be booted via OpenSBI. The
> > HSS
> > includes OpenSBI so we don't need to enable OpenSBI in the buildroot
> > defconfig.
> 
> Who is building the OpenSBI code?

The OpenSBI code is built by the HSS, so it is also outside of the scope
of buildroot.
> 
> Again, my concern is to make sure that we have properly captured the
> licensing of all software components built by Buildroot and that we're
> providing the relevant source code matching the software components
> that are built by Buildroot.
> 
> Right now, it is clear that your defconfig is building U-Boot + Linux
> +
> rootfs, but it isn't clear where the HSS code and OpenSBI code comes
> from, and who builds it.

The HSS paylaod generator which is a host tool to create HSS formatted
payloads is built by buildroot. This is covered in the microchip-hss-
payload-generator package. This tool is released under dual MIT/GPLv2+
licenses.
https://github.com/polarfire-soc/hart-software-services/blob/master/tools/hss-payload-generator/LICENSE.md

The HSS payload generator is the only software compnent here that is
built inside Buildroot. The HSS code and OpenSBI are both built outside
Buildroot, so their licences are not a concern.

I hope this clears things up further.
> 
> > > So you're not a riscv_g core because you don't have the atomic
> > > extension?
> > We have selected riscv_custom because we have compressed
> > instructions
> > extension (RVC) which is not part of riscv_g.
> > 
> > While looking into that we noticed that we don't have
> > BR2_RISCV_ISA_CUSTOM_RVA in our defconfig which we need to add, this
> > was because BR2_RISCV_ISA_CUSTOM_RVA was selected in previous
> > versions
> > of buildroot using riscv_custom, and now it isn't.
> > 
> > I can send a patch to add BR2_RISCV_ISA_CUSTOM_RVA?
> 
> Yes.
Will send a patch to fix once the following discussion is settled so I
can update all the configs accordingly.
> 
> I am wondering if we also don't need to move the following options:
> 
> config BR2_RISCV_ISA_CUSTOM_RVC
>         bool "Compressed Instructions (C)"
>         select BR2_RISCV_ISA_RVC
> 
> config BR2_RISCV_ISA_CUSTOM_RVV
>         bool "Vector Instructions (V)"
>         select BR2_RISCV_ISA_RVV
>         select BR2_ARCH_NEEDS_GCC_AT_LEAST_12
> 
> to be available/visible even when BR2_riscv_g is selected.
> 
> Indeed to me riscv_g implies IMAFD, but you can have IMAFD + C or
> IMAFD
> + V, so it should be possible to say "I have a RISC-V G core, which
>   also supports those extra C and/or V extensions".
> 
> Does that make sense in the RISC-V world?

After a discussion with colllegues we believe that the above two configs
should be available when BR2_riscv_g is selected as suggested. This does
make sense. 

Would you like me to include this change in a patchset to fix the
configs for the microchip_mpfs_icicle_defconfig or do you want to make
this update yourself?
> 
Thanks,

Jamie
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Re: [Buildroot] [PATCH v3 2/2] configs/microchip_mpfs_icicle: add support for Microchip's Icicle Kit

[Thomas Petazzoni via buildroot]

Hello Jamie,

On Thu, 10 Aug 2023 10:46:30 +0000
<Jamie.Gibbons@microchip.com> wrote:

> THe HSS code is located in eNVM of the Icicle kit for PolarFire SoC and
> built outside of Buildroot.

ACK.

> The HSS paylaod generator which is a host tool to create HSS formatted
> payloads is built by buildroot. This is covered in the microchip-hss-
> payload-generator package. This tool is released under dual MIT/GPLv2+
> licenses.
> https://github.com/polarfire-soc/hart-software-services/blob/master/tools/hss-payload-generator/LICENSE.md
> 
> The HSS payload generator is the only software compnent here that is
> built inside Buildroot. The HSS code and OpenSBI are both built outside
> Buildroot, so their licences are not a concern.
> 
> I hope this clears things up further.

This is all clear.

Can this HSS code + OpenSBI stored in the eNVM be updated by the user?
If it's the case, would it make sense for Buildroot to be able to build
it?

> > Does that make sense in the RISC-V world?  
> 
> After a discussion with colllegues we believe that the above two configs
> should be available when BR2_riscv_g is selected as suggested. This does
> make sense.

Cool, we agree!

> Would you like me to include this change in a patchset to fix the
> configs for the microchip_mpfs_icicle_defconfig or do you want to make
> this update yourself?

Feel free to send a patch set :-)

Thanks a lot!

Thomas
-- 
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Embedded Linux and Kernel engineering and training
https://bootlin.com
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Re: [Buildroot] [PATCH v3 2/2] configs/microchip_mpfs_icicle: add support for Microchip's Icicle Kit

[Jamie.Gibbons--- via buildroot]

Hi Thomas,

On Thu, 2023-08-10 at 15:53 +0200, Thomas Petazzoni wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know
> the content is safe
> 
> Hello Jamie,
> 
> On Thu, 10 Aug 2023 10:46:30 +0000
> <Jamie.Gibbons@microchip.com> wrote:
> 
> > THe HSS code is located in eNVM of the Icicle kit for PolarFire SoC
> > and
> > built outside of Buildroot.
> 
> ACK.
> 
> > The HSS paylaod generator which is a host tool to create HSS
> > formatted
> > payloads is built by buildroot. This is covered in the microchip-
> > hss-
> > payload-generator package. This tool is released under dual
> > MIT/GPLv2+
> > licenses.
> > https://github.com/polarfire-soc/hart-software-services/blob/master/tools/hss-payload-generator/LICENSE.md
> > 
> > The HSS payload generator is the only software compnent here that is
> > built inside Buildroot. The HSS code and OpenSBI are both built
> > outside
> > Buildroot, so their licences are not a concern.
> > 
> > I hope this clears things up further.
> 
> This is all clear.
> 
> Can this HSS code + OpenSBI stored in the eNVM be updated by the user?

Yes, it can be updated by the user.
> 

> If it's the case, would it make sense for Buildroot to be able to
> build
> it?

However, it does not make sense for Buildroot to be able to built it.
The HSS is tightly coupled with our FPGA flow and because of this we
believe it is best to keep building/changing the HSS code separate from
the Linux system development.

> 
> > > Does that make sense in the RISC-V world?
> > 
> > After a discussion with colllegues we believe that the above two
> > configs
> > should be available when BR2_riscv_g is selected as suggested. This
> > does
> > make sense.
> 
> Cool, we agree!
> 
> > Would you like me to include this change in a patchset to fix the
> > configs for the microchip_mpfs_icicle_defconfig or do you want to
> > make
> > this update yourself?
> 
> Feel free to send a patch set :-)

Great. Will send over a patch set for all the previously mentioned
changes over the coming days.

Thanks for everything,

Jamie.



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Re: [Buildroot] [PATCH v3 0/2] Add Microchip PolarFire SoC Icicle Kit

[Jamie.Gibbons--- via buildroot]

Hi all,

Just wondering what is/if there is anything missing from this patch
series to get it merged.

Look forward to any further feedback.

Regards,
Jamie.

On Wed, 2023-07-12 at 13:51 +0100, Jamie Gibbons wrote:
> Hi all,
> 
> The following patch series is to add support for Microchip's
> PolarFire SoC
> development board, the icicle kit. We are adding all the necessary
> supporting
> files, including a new defconfig and one required host package, the
> hss-payload-generator. I look forward to recieving your feedback on
> the series.
> 
> Regards,
> Jamie
> 
> Changes v1 -> v2:
> - cleanup package makefile file
> - update U-Boot and kernel versions
> - add to Developers
> 
> Changes v2 -> v3:
> - added missing host dependency in hss-payload-generator package
> - removed unnecessary partition type uuids
> - add missing package to fix build error
> - fixed styling errors
> 
> Jamie Gibbons (2):
>   package/microchip-hss-payload-generator: add host package
>   configs/microchip_mpfs_icicle: add support for Microchip's Icicle
> Kit
> 
>  DEVELOPERS                                    |  5 ++
>  board/microchip/mpfs_icicle/README.txt        | 62
> +++++++++++++++++++
>  board/microchip/mpfs_icicle/config.yaml       | 28 +++++++++
>  board/microchip/mpfs_icicle/genimage.cfg      | 34 ++++++++++
>  board/microchip/mpfs_icicle/linux.fragment    |  1 +
>  board/microchip/mpfs_icicle/mpfs_icicle.its   | 53 ++++++++++++++++
>  board/microchip/mpfs_icicle/post-image.sh     | 13 ++++
>  board/microchip/mpfs_icicle/uboot-env.txt     | 16 +++++
>  .../mpfs_icicle/uboot-fragment-rootfs.config  |  3 +
>  configs/microchip_mpfs_icicle_defconfig       | 34 ++++++++++
>  package/Config.in.host                        |  1 +
>  .../Config.in.host                            | 11 ++++
>  .../microchip-hss-payload-generator.mk        | 25 ++++++++
>  13 files changed, 286 insertions(+)
>  create mode 100644 board/microchip/mpfs_icicle/README.txt
>  create mode 100644 board/microchip/mpfs_icicle/config.yaml
>  create mode 100644 board/microchip/mpfs_icicle/genimage.cfg
>  create mode 100644 board/microchip/mpfs_icicle/linux.fragment
>  create mode 100644 board/microchip/mpfs_icicle/mpfs_icicle.its
>  create mode 100755 board/microchip/mpfs_icicle/post-image.sh
>  create mode 100644 board/microchip/mpfs_icicle/uboot-env.txt
>  create mode 100644 board/microchip/mpfs_icicle/uboot-fragment-
> rootfs.config
>  create mode 100644 configs/microchip_mpfs_icicle_defconfig
>  create mode 100644 package/microchip-hss-payload-
> generator/Config.in.host
>  create mode 100644 package/microchip-hss-payload-
> generator/microchip-hss-payload-generator.mk
> 

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