[Buildroot] [PATCH v3 0/3] Update RISC-V Instruction Sets

[Buildroot] [PATCH v3 0/3] Update RISC-V Instruction Sets

[Jamie Gibbons via buildroot]

Hi all,

As per an earlier discussion with Thomas Petazzoni, we have decided that
it best to update the RISC-V instruction sets. This patch series updates
the kconfig to allow C and V to be selected as part of the general
purpose instruction set, thus allowing IMAFD + C and IMAFD + V to be a
part of a general purpose selection and keeping configurations as
custom.
With this I have updated the microchip_mpfs_icicle_defconfig to make use
of these changes.
Finally, I have included a fix to the post-image script to allow an
sdcard.img to be built for the Microchip MPFS Icicle kit. When merging,
some changes were made that broke this. The hss-payload-generator tool
looks for the u-boot.bin image in the directory this command is run
from. This binary file is located in the output images directory. All
changes to this script were made to try to ensure optimise paths and
methods while achieving a working solution.
This patch set is indended to be applied to the next branch as that is
where the Microchip Icicle kit patch series has previously been applied.

Looking forward to your feedback.

Regards,
Jamie.

v1 -> v2 changes:
- copied RVC and RVV kconfigs to both riscv_g and riscv_custom

v2 -> v3 changes:
- removed duplicate menu options

Jamie Gibbons (3):
  arch/Config.in.riscv: update instruction set ext
  configs/microchip_mpfs_icicle_defconfig: update instruction sets
  board/microchip/mpfs_icicle: update post-image script

 arch/Config.in.riscv                      | 8 ++++----
 board/microchip/mpfs_icicle/post-image.sh | 6 ++++--
 configs/microchip_mpfs_icicle_defconfig   | 5 +----
 3 files changed, 9 insertions(+), 10 deletions(-)

-- 
2.34.1

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[Buildroot] [PATCH v3 1/3] arch/Config.in.riscv: update instruction set ext

[Jamie Gibbons via buildroot]

Allow a RISC-V G core to support C and V. Copy custom RVC and RVV
instructions from RISC-V custom core to RISC-V general core.

Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
---

v1 -> v2 changes:
- copied RVC and RVV kconfigs to both riscv_g and riscv_custom

v2 -> v3 changes:
- removed duplicate menu options

 arch/Config.in.riscv | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/Config.in.riscv b/arch/Config.in.riscv
index 3dfbb4165f..df8499c7a0 100644
--- a/arch/Config.in.riscv
+++ b/arch/Config.in.riscv
@@ -41,10 +41,10 @@ config BR2_riscv_custom
 
 endchoice
 
-if BR2_riscv_custom
-
 comment "Instruction Set Extensions"
 
+if BR2_riscv_custom
+
 config BR2_RISCV_ISA_CUSTOM_RVM
 	bool "Integer Multiplication and Division (M)"
 	select BR2_RISCV_ISA_RVM
@@ -62,6 +62,8 @@ config BR2_RISCV_ISA_CUSTOM_RVD
 	depends on BR2_RISCV_ISA_RVF
 	select BR2_RISCV_ISA_RVD
 
+endif
+
 config BR2_RISCV_ISA_CUSTOM_RVC
 	bool "Compressed Instructions (C)"
 	select BR2_RISCV_ISA_RVC
@@ -71,8 +73,6 @@ config BR2_RISCV_ISA_CUSTOM_RVV
 	select BR2_RISCV_ISA_RVV
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_12
 
-endif
-
 choice
 	prompt "Target Architecture Size"
 	default BR2_RISCV_64
-- 
2.34.1

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[Buildroot] [PATCH v3 2/3] configs/microchip_mpfs_icicle_defconfig: update instruction sets

[Jamie Gibbons via buildroot]

Update the instruction sets for MPFS icicle kit to mirror the
configuration update, i.e. It is now classed as a RISC-V G core with
support for C, IMAFDC.

Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
---
 configs/microchip_mpfs_icicle_defconfig | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/configs/microchip_mpfs_icicle_defconfig b/configs/microchip_mpfs_icicle_defconfig
index b2568cae6a..a3b3093982 100644
--- a/configs/microchip_mpfs_icicle_defconfig
+++ b/configs/microchip_mpfs_icicle_defconfig
@@ -1,8 +1,5 @@
 BR2_riscv=y
-BR2_riscv_custom=y
-BR2_RISCV_ISA_CUSTOM_RVM=y
-BR2_RISCV_ISA_CUSTOM_RVF=y
-BR2_RISCV_ISA_CUSTOM_RVD=y
+BR2_riscv_g=y
 BR2_RISCV_ISA_CUSTOM_RVC=y
 BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_6_1=y
 BR2_TARGET_GENERIC_HOSTNAME="mpfs_icicle"
-- 
2.34.1

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[Buildroot] [PATCH v3 3/3] board/microchip/mpfs_icicle: update post-image script

[Jamie Gibbons via buildroot]

The hss-payload-generator could not find where u-boot.bin was when
looking for it using the config.yaml. This needs to be ran in the
same directory as the u-boot.bin file to enable it to find it. Fix the
post image script to allow an image to get built.

Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
---
 board/microchip/mpfs_icicle/post-image.sh | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/board/microchip/mpfs_icicle/post-image.sh b/board/microchip/mpfs_icicle/post-image.sh
index 04b34bbd40..2368aa42f6 100755
--- a/board/microchip/mpfs_icicle/post-image.sh
+++ b/board/microchip/mpfs_icicle/post-image.sh
@@ -2,7 +2,9 @@
 HSS_PAYLOAD_GENERATOR=${HOST_DIR}/bin/hss-payload-generator
 MKIMAGE=${HOST_DIR}/bin/mkimage
 
-"${HSS_PAYLOAD_GENERATOR}" -c board/microchip/mpfs_icicle/config.yaml "${BINARIES_DIR}"/payload.bin
-cp board/microchip/mpfs_icicle/mpfs_icicle.its "${BINARIES_DIR}"/mpfs_icicle.its
+cd "${BINARIES_DIR}" || exit
+"${HSS_PAYLOAD_GENERATOR}" -c "${CONFIG_DIR}"/board/microchip/mpfs_icicle/config.yaml payload.bin
+cd "${CONFIG_DIR}" || exit
+cp "${CONFIG_DIR}"/board/microchip/mpfs_icicle/mpfs_icicle.its "${BINARIES_DIR}"/mpfs_icicle.its
 (cd "${BINARIES_DIR}" && "${MKIMAGE}" -f mpfs_icicle.its mpfs_icicle.itb)
 support/scripts/genimage.sh -c board/microchip/mpfs_icicle/genimage.cfg
-- 
2.34.1

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Re: [Buildroot] [PATCH v3 1/3] arch/Config.in.riscv: update instruction set ext

[Yann E. MORIN]

Jamie, All,

On 2023-08-18 11:42 +0100, Jamie Gibbons via buildroot spake thusly:
> Allow a RISC-V G core to support C and V. Copy custom RVC and RVV
> instructions from RISC-V custom core to RISC-V general core.

After discussing with Thomas on IRC, I applied the patch, but using the
construct I proposed in my review of v2.

This diverges substantially from what your patch does, but I think it is
a bit nicer, if at lesat because the user has direct feedback of what
sets generic implies (and that yes, we mean the same thing as the riscv
spec says).

Applied to next, thanks.

Regards,
Yann E. MORIN.

> Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
> ---
> 
> v1 -> v2 changes:
> - copied RVC and RVV kconfigs to both riscv_g and riscv_custom
> 
> v2 -> v3 changes:
> - removed duplicate menu options
> 
>  arch/Config.in.riscv | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/Config.in.riscv b/arch/Config.in.riscv
> index 3dfbb4165f..df8499c7a0 100644
> --- a/arch/Config.in.riscv
> +++ b/arch/Config.in.riscv
> @@ -41,10 +41,10 @@ config BR2_riscv_custom
>  
>  endchoice
>  
> -if BR2_riscv_custom
> -
>  comment "Instruction Set Extensions"
>  
> +if BR2_riscv_custom
> +
>  config BR2_RISCV_ISA_CUSTOM_RVM
>  	bool "Integer Multiplication and Division (M)"
>  	select BR2_RISCV_ISA_RVM
> @@ -62,6 +62,8 @@ config BR2_RISCV_ISA_CUSTOM_RVD
>  	depends on BR2_RISCV_ISA_RVF
>  	select BR2_RISCV_ISA_RVD
>  
> +endif
> +
>  config BR2_RISCV_ISA_CUSTOM_RVC
>  	bool "Compressed Instructions (C)"
>  	select BR2_RISCV_ISA_RVC
> @@ -71,8 +73,6 @@ config BR2_RISCV_ISA_CUSTOM_RVV
>  	select BR2_RISCV_ISA_RVV
>  	select BR2_ARCH_NEEDS_GCC_AT_LEAST_12
>  
> -endif
> -
>  choice
>  	prompt "Target Architecture Size"
>  	default BR2_RISCV_64
> -- 
> 2.34.1
> 
> _______________________________________________
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> buildroot@buildroot.org
> https://lists.buildroot.org/mailman/listinfo/buildroot

-- 
.-----------------.--------------------.------------------.--------------------.
|  Yann E. MORIN  | Real-Time Embedded | /"\ ASCII RIBBON | Erics' conspiracy: |
| +33 662 376 056 | Software  Designer | \ / CAMPAIGN     |  ___               |
| +33 561 099 427 `------------.-------:  X  AGAINST      |  \e/  There is no  |
| http://ymorin.is-a-geek.org/ | _/*\_ | / \ HTML MAIL    |   v   conspiracy.  |
'------------------------------^-------^------------------^--------------------'
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Re: [Buildroot] [PATCH v3 2/3] configs/microchip_mpfs_icicle_defconfig: update instruction sets

[Yann E. MORIN]

Jamie, All,

On 2023-08-18 11:43 +0100, Jamie Gibbons via buildroot spake thusly:
> Update the instruction sets for MPFS icicle kit to mirror the
> configuration update, i.e. It is now classed as a RISC-V G core with
> support for C, IMAFDC.
> 
> Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>

Applied to next, thanks.

Regards,
Yann E. MORIN.

> ---
>  configs/microchip_mpfs_icicle_defconfig | 5 +----
>  1 file changed, 1 insertion(+), 4 deletions(-)
> 
> diff --git a/configs/microchip_mpfs_icicle_defconfig b/configs/microchip_mpfs_icicle_defconfig
> index b2568cae6a..a3b3093982 100644
> --- a/configs/microchip_mpfs_icicle_defconfig
> +++ b/configs/microchip_mpfs_icicle_defconfig
> @@ -1,8 +1,5 @@
>  BR2_riscv=y
> -BR2_riscv_custom=y
> -BR2_RISCV_ISA_CUSTOM_RVM=y
> -BR2_RISCV_ISA_CUSTOM_RVF=y
> -BR2_RISCV_ISA_CUSTOM_RVD=y
> +BR2_riscv_g=y
>  BR2_RISCV_ISA_CUSTOM_RVC=y
>  BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_6_1=y
>  BR2_TARGET_GENERIC_HOSTNAME="mpfs_icicle"
> -- 
> 2.34.1
> 
> _______________________________________________
> buildroot mailing list
> buildroot@buildroot.org
> https://lists.buildroot.org/mailman/listinfo/buildroot

-- 
.-----------------.--------------------.------------------.--------------------.
|  Yann E. MORIN  | Real-Time Embedded | /"\ ASCII RIBBON | Erics' conspiracy: |
| +33 662 376 056 | Software  Designer | \ / CAMPAIGN     |  ___               |
| +33 561 099 427 `------------.-------:  X  AGAINST      |  \e/  There is no  |
| http://ymorin.is-a-geek.org/ | _/*\_ | / \ HTML MAIL    |   v   conspiracy.  |
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Re: [Buildroot] [PATCH v3 3/3] board/microchip/mpfs_icicle: update post-image script

[Yann E. MORIN]

Jamie, All,

On 2023-08-18 11:43 +0100, Jamie Gibbons via buildroot spake thusly:
> The hss-payload-generator could not find where u-boot.bin was when
> looking for it using the config.yaml. This needs to be ran in the
> same directory as the u-boot.bin file to enable it to find it. Fix the
> post image script to allow an image to get built.
> 
> Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
> ---
>  board/microchip/mpfs_icicle/post-image.sh | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/board/microchip/mpfs_icicle/post-image.sh b/board/microchip/mpfs_icicle/post-image.sh
> index 04b34bbd40..2368aa42f6 100755
> --- a/board/microchip/mpfs_icicle/post-image.sh
> +++ b/board/microchip/mpfs_icicle/post-image.sh
> @@ -2,7 +2,9 @@
>  HSS_PAYLOAD_GENERATOR=${HOST_DIR}/bin/hss-payload-generator
>  MKIMAGE=${HOST_DIR}/bin/mkimage

The HOST_DIR expansions here are not quoted, and it's weird that
shellcheck does not whine about it...

Can you fix those, please?

> -"${HSS_PAYLOAD_GENERATOR}" -c board/microchip/mpfs_icicle/config.yaml "${BINARIES_DIR}"/payload.bin
> -cp board/microchip/mpfs_icicle/mpfs_icicle.its "${BINARIES_DIR}"/mpfs_icicle.its
> +cd "${BINARIES_DIR}" || exit

BINARIES does exist when a post-image sctript is run.

But if you really want to exit on error, just add 'set -e' at the top of
the script (below the shabang).

> +"${HSS_PAYLOAD_GENERATOR}" -c "${CONFIG_DIR}"/board/microchip/mpfs_icicle/config.yaml payload.bin

Ditto, this is CONFIG_DIR is incorrect, because it does not work for
out-of-tree builds.

Since that yaml file is in the same directory as the post-image.sh, it
is better to write;

    #!/bin/bash
    set -e

    BOARD_DIR="${0%/*}"

    "${HSS_PAYLOAD_GENERATOR}" -c "${BOARD_DIR}"/config.yaml payload.bin

> +cd "${CONFIG_DIR}" || exit

CONFIG_DIR is not the correct location to return to. Indeed, it is the
directory where the .config file is, not necessarily the top directory
of the buildroot tree, like out-of-tree builds.

Instead you should probably use the pushd/popd construct:

    pushd "${BINARIES_DIR}"
    "${HSS_PAYLOAD_GENERATOR}" -c "${BOARD_DIR}"/config.yaml payload.bin
    popd

> +cp "${CONFIG_DIR}"/board/microchip/mpfs_icicle/mpfs_icicle.its "${BINARIES_DIR}"/mpfs_icicle.its
>  (cd "${BINARIES_DIR}" && "${MKIMAGE}" -f mpfs_icicle.its mpfs_icicle.itb)

Maybe we can include this MKIMAGE call in the pushd/popd section:

    pushd "${BINARIES_DIR}"
    "${HSS_PAYLOAD_GENERATOR}" -c "${BOARD_DIR}"/config.yaml payload.bin
    cp "${BOARD_DIR}"/mpfs_icicle.its "${BINARIES_DIR}"/mpfs_icicle.its
    "${MKIMAGE}" -f mpfs_icicle.its mpfs_icicle.itb)
    popd

I've marked this patch as changes requested (too much changes that I
can't test without spawning a build, which takes too long here...)

Regards,
Yann E. MORIN.

>  support/scripts/genimage.sh -c board/microchip/mpfs_icicle/genimage.cfg
> -- 
> 2.34.1
> 
> _______________________________________________
> buildroot mailing list
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> https://lists.buildroot.org/mailman/listinfo/buildroot

-- 
.-----------------.--------------------.------------------.--------------------.
|  Yann E. MORIN  | Real-Time Embedded | /"\ ASCII RIBBON | Erics' conspiracy: |
| +33 662 376 056 | Software  Designer | \ / CAMPAIGN     |  ___               |
| +33 561 099 427 `------------.-------:  X  AGAINST      |  \e/  There is no  |
| http://ymorin.is-a-geek.org/ | _/*\_ | / \ HTML MAIL    |   v   conspiracy.  |
'------------------------------^-------^------------------^--------------------'
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