* [Buildroot] [PATCH] Adding Microblaze support to Buildroot @ 2012-02-12 23:07 Alvaro Gamez 2012-02-13 0:11 ` Spenser Gilliland 2012-02-13 7:59 ` Peter Korsgaard 0 siblings, 2 replies; 15+ messages in thread From: Alvaro Gamez @ 2012-02-12 23:07 UTC (permalink / raw) To: buildroot Hi I am also interested on Microblaze support, hence I rescued the old patch from the archives, merged it against latest git revision and published on github.com/agamez/buildroot I attach the new patch, should apply cleanly to latest version on git. Even though Stephan Hoffmann work is pretty good, I think the path of the new files should be modified from board/relinux/avnet_LX9MicroBoard/ to board/avnet/LX9MicroBoard/ I didn't want to do that myself out of respect for the real author of the patch, since this is merely a repost. Regards, ?lvaro G?mez Machado ^ permalink raw reply [flat|nested] 15+ messages in thread
* [Buildroot] [PATCH] Adding Microblaze support to Buildroot 2012-02-12 23:07 [Buildroot] [PATCH] Adding Microblaze support to Buildroot Alvaro Gamez @ 2012-02-13 0:11 ` Spenser Gilliland [not found] ` <CAM+bi4v0GerXFEtyM=8=gegOyuAMYjjgHx11krAoa4H2z8gOqg@mail.gmail.com> 2012-02-13 7:59 ` Peter Korsgaard 1 sibling, 1 reply; 15+ messages in thread From: Spenser Gilliland @ 2012-02-13 0:11 UTC (permalink / raw) To: buildroot Alvaro, Did you have issues with the GCC tune? I had to remove that line from the original patch. Spenser On Sun, Feb 12, 2012 at 5:07 PM, Alvaro Gamez <alvaro.gamez@hazent.com> wrote: > Hi > > I am also interested on Microblaze support, hence I rescued the old patch > from the archives, merged it against latest git revision and published on > github.com/agamez/buildroot > > I attach the new patch, should apply cleanly to latest version on git. > > Even though Stephan Hoffmann work is pretty good, I think the path of the > new files should be modified from board/relinux/avnet_LX9MicroBoard/ to > board/avnet/LX9MicroBoard/ > > I didn't want to do that myself out of respect for the real author of the > patch, since this is merely a repost. > > Regards, > > ?lvaro G?mez Machado > > From f4345407e3f23ebda7d91c53d81413cea51e1381 Mon Sep 17 00:00:00 2001 > From: Stephan Hoffmann <sho@relinux.de> > Date: Wed, 23 Nov 2011 11:42:40 +0100 > Subject: [PATCH] Added support for the Microblaze soft CPU > > --- > ?board/relinux/avnet_LX9MicroBoard/README?????????? |?? 64 +++++ > ?board/relinux/avnet_LX9MicroBoard/TODO???????????? |?? 19 ++ > ?board/relinux/avnet_LX9MicroBoard/lx9_mmu.dts????? |? 247 > ++++++++++++++++++++ > ?.../relinux/avnet_LX9MicroBoard/lx9_mmu_defconfig? |?? 68 ++++++ > ?configs/spartan6lx9_mb_defconfig?????????????????? |?? 17 ++ > ?linux/Config.in??????????????????????????????????? |??? 8 + > ?linux/linux.mk???????????????????????????????????? |?? 12 + > ?target/Config.in.arch????????????????????????????? |??? 6 +- > ?8 files changed, 440 insertions(+), 1 deletions(-) > ?create mode 100644 board/relinux/avnet_LX9MicroBoard/README > ?create mode 100644 board/relinux/avnet_LX9MicroBoard/TODO > ?create mode 100644 board/relinux/avnet_LX9MicroBoard/lx9_mmu.dts > ?create mode 100644 board/relinux/avnet_LX9MicroBoard/lx9_mmu_defconfig > ?create mode 100644 configs/spartan6lx9_mb_defconfig > > diff --git a/board/relinux/avnet_LX9MicroBoard/README > b/board/relinux/avnet_LX9MicroBoard/README > new file mode 100644 > index 0000000..a2e9247 > --- /dev/null > +++ b/board/relinux/avnet_LX9MicroBoard/README > @@ -0,0 +1,64 @@ > +This is the buildroot board support for the Avnet Spartan6 LX9 MicroBoard. > + > +The board can be bought from Avnet or from Trenz for a low prize. > + > +To run the Linux built with buildroot you have to install the FPGA bitfile > +and the u-boot boot loader as described in the totorial available on > + > +??? http://www.em.avnet.com/s6microboard > + > +The image file (default name is simpleImage.lx9_mmu.ub) has to be > +copied to your tftp folder (often /tftpboot/). > + > +Sample session: > + > +SPI Bootloader > +Loading binary image > +from flash @ address: 00060000 > +to RAM address: 83f00000 > +Done > + > + > +SDRAM : > +??????????????? Icache:ON > +??????????????? Dcache:ON > +??????? U-Boot Start:0x83f00000 > +SF: Got idcode 20 ba 18 10 01 > +*** Warning - bad CRC, using default environment > + > +Net:?? Xilinx_Emaclite > +MAC:?? 00:0a:35:00:63:37 > +U-BOOT for Avnet-LX9-Microboard-AXI-tiny-13.1 > + > +BOOTP broadcast 1 > +DHCP client bound to address 192.168.11.122 > +Hit any key to stop autoboot:? 0 > +U-Boot-PetaLinux> tftp simpleImage.lx9_mmu.ub > +Using Xilinx_Emaclite device > +TFTP from server 192.168.11.10; our IP address is 192.168.11.122 > +Filename 't.ub'. > +Load address: 0x80002000 > +Loading: ################################################################# > +???????? ################################################################# > +???????? ################################################################# > +???????? ################################################################# > +???????? ################################################################# > +???????? ############################## > +done > +Bytes transferred = 5207724 (4f76ac hex) > +U-Boot-PetaLinux> bootm > +## Booting kernel from Legacy Image at 80002000 ... > +?? Image Name:?? Linux-3.1.0 > +?? Image Type:?? MicroBlaze Linux Kernel Image (uncompressed) > +?? Data Size:??? 5207660 Bytes =? 5 MB > +?? Load Address: 80000000 > +?? Entry Point:? 80000000 > +?? Verifying Checksum ... OK > +?? Loading Kernel Image ... OK > +OK > +## Transferring control to Linux (at address 80000000), 0x80000000 ramdisk > 0x00000000, FDT 0x00000000... > +Early console on uartlite at 0x40600000 > +..... boot log skipped > + > +Welcome to Microblaze Buildroot > +Microblaze login: > diff --git a/board/relinux/avnet_LX9MicroBoard/TODO > b/board/relinux/avnet_LX9MicroBoard/TODO > new file mode 100644 > index 0000000..ca5ee94 > --- /dev/null > +++ b/board/relinux/avnet_LX9MicroBoard/TODO > @@ -0,0 +1,19 @@ > +TODO list for the Spartan LX9 Microboard > + > +Generate u-boot within buildroot > +================================ > +Currently, we need to use the u-boot provided by Avnet. > + > +Provide config files for qemu > +============================= > + > +Generate toolchain > +================== > +Currently the GNU toolchain provided by Xilinx has to be used. > +Xilinx does not provide a toolchain suitable to build a mmu-less > +Linux system, but omitting the mmu saved space within the FPGA. > + > +Bring up mmu-less system > +======================== > +Hopefully this is easy as soon as we have a working toolchain > +with flt support. > diff --git a/board/relinux/avnet_LX9MicroBoard/lx9_mmu.dts > b/board/relinux/avnet_LX9MicroBoard/lx9_mmu.dts > new file mode 100644 > index 0000000..8ffedd9 > --- /dev/null > +++ b/board/relinux/avnet_LX9MicroBoard/lx9_mmu.dts > @@ -0,0 +1,247 @@ > +/* > + * Device Tree Generator version: 1.3 > + * > + * (C) Copyright 2007-2008 Xilinx, Inc. > + * (C) Copyright 2007-2009 Michal Simek > + * > + * Michal SIMEK <monstr@monstr.eu> > + * > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License as > + * published by the Free Software Foundation; either version 2 of > + * the License, or (at your option) any later version. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program; if not, write to the Free Software > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, > + * MA 02111-1307 USA > + * > + * CAUTION: This file is automatically generated by libgen. > + * Version: Xilinx EDK 13.2 EDK_O.61xd > + * > + * XPS project directory: device-tree_bsp_230-orig > + */ > + > +/dts-v1/; > +/ { > +??? #address-cells = <1>; > +??? #size-cells = <1>; > +??? compatible = "xlnx,microblaze"; > +??? model = "testing"; > +??? MCB3_LPDDR: memory at 80000000 { > +??????? device_type = "memory"; > +??????? reg = < 0x80000000 0x4000000 >; > +??? } ; > +??? aliases { > +??????? ethernet0 = &Ethernet_MAC; > +??????? serial0 = &USB_Uart; > +??? } ; > +??? chosen { > +??????? bootargs = "console=ttyUL0"; > +??????? linux,stdout-path = "/axi at 0/serial at 40600000"; > +??? } ; > +??? cpus { > +??????? #address-cells = <1>; > +??????? #cpus = <0x1>; > +??????? #size-cells = <0>; > +??????? microblaze_0: cpu at 0 { > +??????????? clock-frequency = <66666667>; > +??????????? compatible = "xlnx,microblaze-8.20.a"; > +??????????? d-cache-baseaddr = <0x80000000>; > +??????????? d-cache-highaddr = <0x83ffffff>; > +??????????? d-cache-line-size = <0x10>; > +??????????? d-cache-size = <0x2000>; > +??????????? device_type = "cpu"; > +??????????? i-cache-baseaddr = <0x80000000>; > +??????????? i-cache-highaddr = <0x83ffffff>; > +??????????? i-cache-line-size = <0x10>; > +??????????? i-cache-size = <0x2000>; > +??????????? model = "microblaze,8.20.a"; > +??????????? reg = <0>; > +??????????? timebase-frequency = <66666667>; > +??????????? xlnx,addr-tag-bits = <0xd>; > +??????????? xlnx,allow-dcache-wr = <0x1>; > +??????????? xlnx,allow-icache-wr = <0x1>; > +??????????? xlnx,area-optimized = <0x0>; > +??????????? xlnx,avoid-primitives = <0x0>; > +??????????? xlnx,branch-target-cache-size = <0x0>; > +??????????? xlnx,cache-byte-size = <0x2000>; > +??????????? xlnx,d-axi = <0x1>; > +??????????? xlnx,d-lmb = <0x1>; > +??????????? xlnx,d-plb = <0x0>; > +??????????? xlnx,data-size = <0x20>; > +??????????? xlnx,dcache-addr-tag = <0xd>; > +??????????? xlnx,dcache-always-used = <0x1>; > +??????????? xlnx,dcache-byte-size = <0x2000>; > +??????????? xlnx,dcache-data-width = <0x0>; > +??????????? xlnx,dcache-force-tag-lutram = <0x0>; > +??????????? xlnx,dcache-interface = <0x0>; > +??????????? xlnx,dcache-line-len = <0x4>; > +??????????? xlnx,dcache-use-fsl = <0x0>; > +??????????? xlnx,dcache-use-writeback = <0x0>; > +??????????? xlnx,dcache-victims = <0x0>; > +??????????? xlnx,debug-enabled = <0x1>; > +??????????? xlnx,div-zero-exception = <0x0>; > +??????????? xlnx,dynamic-bus-sizing = <0x1>; > +??????????? xlnx,ecc-use-ce-exception = <0x0>; > +??????????? xlnx,edge-is-positive = <0x1>; > +??????????? xlnx,endianness = <0x1>; > +??????????? xlnx,family = "spartan6"; > +??????????? xlnx,fault-tolerant = <0x0>; > +??????????? xlnx,fpu-exception = <0x0>; > +??????????? xlnx,freq = <0x3f940ab>; > +??????????? xlnx,fsl-data-size = <0x20>; > +??????????? xlnx,fsl-exception = <0x0>; > +??????????? xlnx,fsl-links = <0x0>; > +??????????? xlnx,i-axi = <0x0>; > +??????????? xlnx,i-lmb = <0x1>; > +??????????? xlnx,i-plb = <0x0>; > +??????????? xlnx,icache-always-used = <0x1>; > +??????????? xlnx,icache-data-width = <0x0>; > +??????????? xlnx,icache-force-tag-lutram = <0x0>; > +??????????? xlnx,icache-interface = <0x0>; > +??????????? xlnx,icache-line-len = <0x4>; > +??????????? xlnx,icache-streams = <0x0>; > +??????????? xlnx,icache-use-fsl = <0x0>; > +??????????? xlnx,icache-victims = <0x0>; > +??????????? xlnx,ill-opcode-exception = <0x0>; > +??????????? xlnx,instance = "microblaze_0"; > +??????????? xlnx,interconnect = <0x2>; > +??????????? xlnx,interconnect-m-axi-dc-aw-register = <0x0>; > +??????????? xlnx,interconnect-m-axi-dc-read-issuing = <0x2>; > +??????????? xlnx,interconnect-m-axi-dc-w-register = <0x0>; > +??????????? xlnx,interconnect-m-axi-dc-write-issuing = <0x20>; > +??????????? xlnx,interconnect-m-axi-dp-read-issuing = <0x1>; > +??????????? xlnx,interconnect-m-axi-dp-write-issuing = <0x1>; > +??????????? xlnx,interconnect-m-axi-ic-read-issuing = <0x2>; > +??????????? xlnx,interconnect-m-axi-ip-read-issuing = <0x1>; > +??????????? xlnx,interrupt-is-edge = <0x0>; > +??????????? xlnx,lockstep-slave = <0x0>; > +??????????? xlnx,mmu-dtlb-size = <0x1>; > +??????????? xlnx,mmu-itlb-size = <0x1>; > +??????????? xlnx,mmu-privileged-instr = <0x0>; > +??????????? xlnx,mmu-tlb-access = <0x3>; > +??????????? xlnx,mmu-zones = <0x2>; > +??????????? xlnx,number-of-pc-brk = <0x1>; > +??????????? xlnx,number-of-rd-addr-brk = <0x0>; > +??????????? xlnx,number-of-wr-addr-brk = <0x0>; > +??????????? xlnx,opcode-0x0-illegal = <0x0>; > +??????????? xlnx,optimization = <0x0>; > +??????????? xlnx,pvr = <0x0>; > +??????????? xlnx,pvr-user1 = <0x0>; > +??????????? xlnx,pvr-user2 = <0x0>; > +??????????? xlnx,reset-msr = <0x0>; > +??????????? xlnx,sco = <0x0>; > +??????????? xlnx,stream-interconnect = <0x0>; > +??????????? xlnx,unaligned-exceptions = <0x0>; > +??????????? xlnx,use-barrel = <0x1>; > +??????????? xlnx,use-branch-target-cache = <0x0>; > +??????????? xlnx,use-dcache = <0x1>; > +??????????? xlnx,use-div = <0x0>; > +??????????? xlnx,use-ext-brk = <0x1>; > +??????????? xlnx,use-ext-nm-brk = <0x1>; > +??????????? xlnx,use-extended-fsl-instr = <0x0>; > +??????????? xlnx,use-fpu = <0x0>; > +??????????? xlnx,use-hw-mul = <0x1>; > +??????????? xlnx,use-icache = <0x1>; > +??????????? xlnx,use-interrupt = <0x1>; > +??????????? xlnx,use-mmu = <0x3>; > +??????????? xlnx,use-msr-instr = <0x1>; > +??????????? xlnx,use-pcmp-instr = <0x0>; > +??????????? xlnx,use-stack-protection = <0x0>; > +??????? } ; > +??? } ; > +??? axi4lite_0: axi at 0 { > +??????? #address-cells = <1>; > +??????? #size-cells = <1>; > +??????? compatible = "xlnx,axi-interconnect-1.03.a", "simple-bus"; > +??????? ranges ; > +??????? Ethernet_MAC: ethernet at 40e00000 { > +??????????? compatible = "xlnx,axi-ethernetlite-1.00.a", > "xlnx,xps-ethernetlite-1.00.a"; > +??????????? device_type = "network"; > +??????????? interrupt-parent = <µblaze_0_intc>; > +??????????? interrupts = < 2 0 >; > +??????????? local-mac-address = [ 00 0a 35 aa de 00 ]; > +//??????????? phy-handle = <&phy0>; > +??????????? reg = < 0x40e00000 0x10000 >; > +??????????? xlnx,duplex = <0x1>; > +??????????? xlnx,family = "spartan6"; > +??????????? xlnx,include-global-buffers = <0x0>; > +??????????? xlnx,include-internal-loopback = <0x0>; > +??????????? xlnx,include-mdio = <0x1>; > +??????????? xlnx,include-phy-constraints = <0x1>; > +??????????? xlnx,interconnect-s-axi-read-acceptance = <0x1>; > +??????????? xlnx,interconnect-s-axi-write-acceptance = <0x1>; > +??????????? xlnx,rx-ping-pong = <0x0>; > +??????????? xlnx,s-axi-aclk-period-ps = <0x3a98>; > +??????????? xlnx,s-axi-id-width = <0x1>; > +??????????? xlnx,s-axi-supports-narrow-burst = <0x0>; > +??????????? xlnx,tx-ping-pong = <0x0>; > +/* > +??????????? mdio { > +??????????????? #address-cells = <1>; > +??????????????? #size-cells = <0>; > +??????????????? phy0: phy at 7 { > +??????????????????? compatible = "marvell,88e1111"; > +??????????????????? device_type = "ethernet-phy"; > +??????????????????? reg = <7>; > +??????????????? } ; > +??????????? } ; > +*/ > +??????? } ; > +??????? SPI_FLASH: spi at 40a00000 { > +??????????? compatible = "xlnx,axi-spi-1.01.a", "xlnx,xps-spi-2.00.a"; > +??????????? interrupt-parent = <µblaze_0_intc>; > +??????????? interrupts = < 1 2 >; > +??????????? reg = < 0x40a00000 0x10000 >; > +??????????? xlnx,family = "spartan6"; > +??????????? xlnx,fifo-exist = <0x1>; > +??????????? xlnx,num-ss-bits = <0x1>; > +??????????? xlnx,num-transfer-bits = <0x8>; > +??????????? xlnx,sck-ratio = <0x4>; > +??????? } ; > +??????? USB_Uart: serial at 40600000 { > +??????????? clock-frequency = <66666667>; > +??????????? compatible = "xlnx,axi-uartlite-1.02.a", > "xlnx,xps-uartlite-1.00.a"; > +??????????? current-speed = <115200>; > +??????????? device_type = "serial"; > +??????????? interrupt-parent = <µblaze_0_intc>; > +??????????? interrupts = < 3 0 >; > +??????????? port-number = <0>; > +??????????? reg = < 0x40600000 0x10000 >; > +??????????? xlnx,baudrate = <0x1c200>; > +??????????? xlnx,data-bits = <0x8>; > +??????????? xlnx,family = "spartan6"; > +??????????? xlnx,odd-parity = <0x1>; > +??????????? xlnx,s-axi-aclk-freq-hz = <0x3f940ab>; > +??????????? xlnx,use-parity = <0x0>; > +??????? } ; > +??????? microblaze_0_intc: interrupt-controller at 41200000 { > +??????????? #interrupt-cells = <0x2>; > +??????????? compatible = "xlnx,axi-intc-1.01.a", "xlnx,xps-intc-1.00.a"; > +??????????? interrupt-controller ; > +??????????? reg = < 0x41200000 0x10000 >; > +??????????? xlnx,kind-of-intr = <0xc>; > +??????????? xlnx,num-intr-inputs = <0x4>; > +??????? } ; > +??????? system_timer: timer at 41c00000 { > +??????????? clock-frequency = <66666667>; > +??????????? compatible = "xlnx,axi-timer-1.02.a", "xlnx,xps-timer-1.00.a"; > +??????????? interrupt-parent = <µblaze_0_intc>; > +??????????? interrupts = < 0 2 >; > +??????????? reg = < 0x41c00000 0x10000 >; > +??????????? xlnx,count-width = <0x20>; > +??????????? xlnx,family = "spartan6"; > +??????????? xlnx,gen0-assert = <0x1>; > +??????????? xlnx,gen1-assert = <0x1>; > +??????????? xlnx,one-timer-only = <0x0>; > +??????????? xlnx,trig0-assert = <0x1>; > +??????????? xlnx,trig1-assert = <0x1>; > +??????? } ; > +??? } ; > +} ; > diff --git a/board/relinux/avnet_LX9MicroBoard/lx9_mmu_defconfig > b/board/relinux/avnet_LX9MicroBoard/lx9_mmu_defconfig > new file mode 100644 > index 0000000..5d01ca0 > --- /dev/null > +++ b/board/relinux/avnet_LX9MicroBoard/lx9_mmu_defconfig > @@ -0,0 +1,68 @@ > +CONFIG_EXPERIMENTAL=y > +CONFIG_SYSVIPC=y > +CONFIG_IKCONFIG=y > +CONFIG_IKCONFIG_PROC=y > +CONFIG_BLK_DEV_INITRD=y > +CONFIG_INITRAMFS_SOURCE="rootfs.cpio" > +CONFIG_INITRAMFS_COMPRESSION_GZIP=y > +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set > +CONFIG_EXPERT=y > +CONFIG_KALLSYMS_ALL=y > +CONFIG_KALLSYMS_EXTRA_PASS=y > +# CONFIG_HOTPLUG is not set > +# CONFIG_BASE_FULL is not set > +# CONFIG_FUTEX is not set > +# CONFIG_EPOLL is not set > +# CONFIG_SIGNALFD is not set > +# CONFIG_SHMEM is not set > +CONFIG_SLAB=y > +CONFIG_MODULES=y > +CONFIG_MODULE_UNLOAD=y > +# CONFIG_BLK_DEV_BSG is not set > +# CONFIG_OPT_LIB_ASM is not set > +CONFIG_KERNEL_BASE_ADDR=0x80000000 > +CONFIG_XILINX_MICROBLAZE0_FAMILY="spartan6" > +CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1 > +# CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR is not set > +CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1 > +CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=1 > +CONFIG_XILINX_MICROBLAZE0_HW_VER="8.20.a" > +CONFIG_HZ_100=y > +CONFIG_MMU=y > +CONFIG_CMDLINE_BOOL=y > +CONFIG_CMDLINE_FORCE=y > +CONFIG_NET=y > +CONFIG_PACKET=y > +CONFIG_UNIX=y > +CONFIG_INET=y > +# CONFIG_INET_LRO is not set > +# CONFIG_IPV6 is not set > +CONFIG_PROC_DEVICETREE=y > +CONFIG_BLK_DEV_RAM=y > +CONFIG_BLK_DEV_RAM_SIZE=8192 > +CONFIG_NETDEVICES=y > +CONFIG_NET_ETHERNET=y > +CONFIG_XILINX_EMACLITE=y > +# CONFIG_INPUT is not set > +# CONFIG_SERIO is not set > +# CONFIG_VT is not set > +CONFIG_SERIAL_UARTLITE=y > +CONFIG_SERIAL_UARTLITE_CONSOLE=y > +# CONFIG_HW_RANDOM is not set > +# CONFIG_HWMON is not set > +# CONFIG_USB_SUPPORT is not set > +CONFIG_EXT2_FS=y > +# CONFIG_DNOTIFY is not set > +CONFIG_NFS_FS=y > +CONFIG_NFS_V3=y > +CONFIG_CIFS=y > +CONFIG_CIFS_STATS=y > +CONFIG_CIFS_STATS2=y > +CONFIG_PARTITION_ADVANCED=y > +CONFIG_DEBUG_KERNEL=y > +CONFIG_DETECT_HUNG_TASK=y > +CONFIG_DEBUG_SLAB=y > +CONFIG_DEBUG_SPINLOCK=y > +CONFIG_DEBUG_INFO=y > +CONFIG_EARLY_PRINTK=y > +# CONFIG_CRYPTO_ANSI_CPRNG is not set > diff --git a/configs/spartan6lx9_mb_defconfig > b/configs/spartan6lx9_mb_defconfig > new file mode 100644 > index 0000000..0329bb4 > --- /dev/null > +++ b/configs/spartan6lx9_mb_defconfig > @@ -0,0 +1,17 @@ > +BR2_microblaze=y > +BR2_TOOLCHAIN_EXTERNAL=y > +BR2_TOOLCHAIN_EXTERNAL_PATH="/opt/microblazeel-unknown-linux-gnu/" > +BR2_TOOLCHAIN_EXTERNAL_CUSTOM_PREFIX="microblazeel-unknown-linux-gnu" > +BR2_TOOLCHAIN_EXTERNAL_CUSTOM_GLIBC=y > +BR2_TOOLCHAIN_EXTERNAL_CXX=y > +BR2_TARGET_GENERIC_HOSTNAME="Microblaze Buildroot" > +BR2_TARGET_GENERIC_ISSUE="Welcome to Microblaze Buildroot" > +BR2_TARGET_GENERIC_GETTY_PORT="ttyUL0" > +# BR2_TARGET_ROOTFS_TAR is not set > +BR2_TARGET_ROOTFS_INITRAMFS=y > +BR2_LINUX_KERNEL=y > +BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y > +BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(TOPDIR)/board/relinux/avnet_LX9MicroBoard/lx9_mmu_defconfig" > +BR2_LINUX_KERNEL_DTS_FILE="$(TOPDIR)/board/relinux/avnet_LX9MicroBoard/lx9_mmu.dts" > +BR2_LINUX_KERNEL_IMAGE_TARGET_CUSTOM=y > +BR2_LINUX_KERNEL_IMAGE_TARGET_NAME="simpleImage.lx9_mmu" > diff --git a/linux/Config.in b/linux/Config.in > index 86dc32a..138feb3 100644 > --- a/linux/Config.in > +++ b/linux/Config.in > @@ -120,6 +120,14 @@ config BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE > ???? help > ???? ? Path to the kernel configuration file > > +config BR2_LINUX_KERNEL_DTS_FILE > +??? string "Device Tree dts file location" > +??? depends on BR2_microblaze > +??? help > +????? Path from where the dts file has to be copied > +????? The final "custom target" name depends on the > +????? dts file name: > +????????? <name>.dts --> simpleImage.<name> > ?# > ?# Binary format > ?# > diff --git a/linux/linux.mk b/linux/linux.mk > index ae236d4..4a24f18 100644 > --- a/linux/linux.mk > +++ b/linux/linux.mk > @@ -117,6 +117,18 @@ endef > > ?LINUX_POST_PATCH_HOOKS += LINUX_APPLY_PATCHES > > +ifeq ($(KERNEL_ARCH),microblaze) > +# on microblaze, we always want mkimage > +LINUX_DEPENDENCIES+=host-uboot-tools > + > +define LINUX_COPY_DTS > +??? if test -f "$(BR2_LINUX_KERNEL_DTS_FILE)" ; then \ > +??????? cp $(BR2_LINUX_KERNEL_DTS_FILE) $(@D)/arch/microblaze/boot/dts ; \ > +??? else \ > +??????? echo "Cannot copy dts file!" ; \ > +??? fi > +endef > +endif > > ?ifeq ($(BR2_LINUX_KERNEL_USE_DEFCONFIG),y) > ?KERNEL_SOURCE_CONFIG = $(KERNEL_ARCH_PATH)/configs/$(call > qstrip,$(BR2_LINUX_KERNEL_DEFCONFIG))_defconfig > diff --git a/target/Config.in.arch b/target/Config.in.arch > index 417441d..3a75585 100644 > --- a/target/Config.in.arch > +++ b/target/Config.in.arch > @@ -21,6 +21,8 @@ config BR2_i386 > ?config BR2_m68k > ???? bool "m68k" > ???? depends on BROKEN # ice in uclibc / inet_ntoa_r > +config BR2_microblaze > +??? bool "microblaze" > ?config BR2_mips > ???? bool "mips" > ?config BR2_mipsel > @@ -508,6 +510,7 @@ config BR2_ARCH > ???? default "i686"??? ??? if BR2_x86_athlon > ???? default "i686"??? ??? if BR2_x86_athlon_4 > ???? default "m68k"??? ??? if BR2_m68k > +??? default "microblaze"??? if BR2_microblaze > ???? default "mips"??? ??? if BR2_mips > ???? default "mipsel"??? if BR2_mipsel > ???? default "powerpc"??? if BR2_powerpc > @@ -533,7 +536,7 @@ config BR2_ARCH > > ?config BR2_ENDIAN > ???? string > -??? default "LITTLE" if BR2_arm || BR2_bfin || BR2_i386 || BR2_mipsel || \ > +??? default "LITTLE" if BR2_arm || BR2_bfin || BR2_i386 || BR2_mipsel || > BR2_microblaze || \ > ???? ??? ??? ??? BR2_sh3 || BR2_sh4 || BR2_sh4a || BR2_x86_64 || BR2_sh64 > ???? default "BIG"??? if BR2_armeb || BR2_avr32 || BR2_m68k || BR2_mips || \ > ???? ??? ??? ??? BR2_powerpc || BR2_sh2 || BR2_sh2a || \ > @@ -598,6 +601,7 @@ config BR2_GCC_TARGET_TUNE > ???? default 68030??? ??? if BR2_m68k_68030 > ???? default 68040??? ??? if BR2_m68k_68040 > ???? default 68060??? ??? if BR2_m68k_68060 > +??? default microblaze??? if BR2_microblaze > ???? default mips1??? ??? if BR2_mips_1 > ???? default mips2??? ??? if BR2_mips_2 > ???? default mips3??? ??? if BR2_mips_3 > -- > 1.7.9 > > > > 2012/2/11 <buildroot-request@busybox.net> >> >> >> On Saturday 11 February 2012 05:58:37 Spenser Gilliland wrote: >> > I'm using this Microblaze patch for my project. ?Will it be part of >> > the official release that is coming up soon? >> >> ?I'm afraid it got lost between the cracks. ?Could you repost it? >> >> ?Regards, >> ?Arnout > > > > _______________________________________________ > buildroot mailing list > buildroot at busybox.net > http://lists.busybox.net/mailman/listinfo/buildroot -- Spenser Gilliland Computer Engineer Illinois Institute of Technology ^ permalink raw reply [flat|nested] 15+ messages in thread
[parent not found: <CAM+bi4v0GerXFEtyM=8=gegOyuAMYjjgHx11krAoa4H2z8gOqg@mail.gmail.com>]
* [Buildroot] [PATCH] Adding Microblaze support to Buildroot [not found] ` <CAM+bi4v0GerXFEtyM=8=gegOyuAMYjjgHx11krAoa4H2z8gOqg@mail.gmail.com> @ 2012-02-13 19:13 ` Alvaro Gamez [not found] ` <CA+appbN9=yvud1LwSCpgMvUh=Qc8DoQbz=gyjfvOUmzmpsopfQ@mail.gmail.com> 0 siblings, 1 reply; 15+ messages in thread From: Alvaro Gamez @ 2012-02-13 19:13 UTC (permalink / raw) To: buildroot Ok, now that I have a little time I'm trying to make it work. I haven't had any problem yet with GCC tune. However, I'm getting the following error while trying to build the kernel make[2]: *** No rule to make target `arch/microblaze/boot/lx9_mmu.dtb', needed by `arch/microblaze/boot/system.dtb'. Stop. Any idea? Regards 2012/2/13 Alvaro Gamez <alvaro.gamez@hazent.com> > I am yet to test it. I just found yersterday that buildroot exists :) > > > 2012/2/13 Spenser Gilliland <spenser309@gmail.com> > >> Alvaro, >> >> Did you have issues with the GCC tune? I had to remove that line from >> the original patch. >> >> Spenser >> >> On Sun, Feb 12, 2012 at 5:07 PM, Alvaro Gamez <alvaro.gamez@hazent.com> >> wrote: >> > Hi >> > >> > I am also interested on Microblaze support, hence I rescued the old >> patch >> > from the archives, merged it against latest git revision and published >> on >> > github.com/agamez/buildroot >> > >> > I attach the new patch, should apply cleanly to latest version on git. >> > >> > Even though Stephan Hoffmann work is pretty good, I think the path of >> the >> > new files should be modified from board/relinux/avnet_LX9MicroBoard/ to >> > board/avnet/LX9MicroBoard/ >> > >> > I didn't want to do that myself out of respect for the real author of >> the >> > patch, since this is merely a repost. >> > >> > Regards, >> > >> > ?lvaro G?mez Machado >> > >> > From f4345407e3f23ebda7d91c53d81413cea51e1381 Mon Sep 17 00:00:00 2001 >> > From: Stephan Hoffmann <sho@relinux.de> >> > Date: Wed, 23 Nov 2011 11:42:40 +0100 >> > Subject: [PATCH] Added support for the Microblaze soft CPU >> > >> > --- >> > board/relinux/avnet_LX9MicroBoard/README | 64 +++++ >> > board/relinux/avnet_LX9MicroBoard/TODO | 19 ++ >> > board/relinux/avnet_LX9MicroBoard/lx9_mmu.dts | 247 >> > ++++++++++++++++++++ >> > .../relinux/avnet_LX9MicroBoard/lx9_mmu_defconfig | 68 ++++++ >> > configs/spartan6lx9_mb_defconfig | 17 ++ >> > linux/Config.in | 8 + >> > linux/linux.mk | 12 + >> > target/Config.in.arch | 6 +- >> > 8 files changed, 440 insertions(+), 1 deletions(-) >> > create mode 100644 board/relinux/avnet_LX9MicroBoard/README >> > create mode 100644 board/relinux/avnet_LX9MicroBoard/TODO >> > create mode 100644 board/relinux/avnet_LX9MicroBoard/lx9_mmu.dts >> > create mode 100644 board/relinux/avnet_LX9MicroBoard/lx9_mmu_defconfig >> > create mode 100644 configs/spartan6lx9_mb_defconfig >> > >> > diff --git a/board/relinux/avnet_LX9MicroBoard/README >> > b/board/relinux/avnet_LX9MicroBoard/README >> > new file mode 100644 >> > index 0000000..a2e9247 >> > --- /dev/null >> > +++ b/board/relinux/avnet_LX9MicroBoard/README >> > @@ -0,0 +1,64 @@ >> > +This is the buildroot board support for the Avnet Spartan6 LX9 >> MicroBoard. >> > + >> > +The board can be bought from Avnet or from Trenz for a low prize. >> > + >> > +To run the Linux built with buildroot you have to install the FPGA >> bitfile >> > +and the u-boot boot loader as described in the totorial available on >> > + >> > + http://www.em.avnet.com/s6microboard >> > + >> > +The image file (default name is simpleImage.lx9_mmu.ub) has to be >> > +copied to your tftp folder (often /tftpboot/). >> > + >> > +Sample session: >> > + >> > +SPI Bootloader >> > +Loading binary image >> > +from flash @ address: 00060000 >> > +to RAM address: 83f00000 >> > +Done >> > + >> > + >> > +SDRAM : >> > + Icache:ON >> > + Dcache:ON >> > + U-Boot Start:0x83f00000 >> > +SF: Got idcode 20 ba 18 10 01 >> > +*** Warning - bad CRC, using default environment >> > + >> > +Net: Xilinx_Emaclite >> > +MAC: 00:0a:35:00:63:37 >> > +U-BOOT for Avnet-LX9-Microboard-AXI-tiny-13.1 >> > + >> > +BOOTP broadcast 1 >> > +DHCP client bound to address 192.168.11.122 >> > +Hit any key to stop autoboot: 0 >> > +U-Boot-PetaLinux> tftp simpleImage.lx9_mmu.ub >> > +Using Xilinx_Emaclite device >> > +TFTP from server 192.168.11.10; our IP address is 192.168.11.122 >> > +Filename 't.ub'. >> > +Load address: 0x80002000 >> > +Loading: >> ################################################################# >> > + >> ################################################################# >> > + >> ################################################################# >> > + >> ################################################################# >> > + >> ################################################################# >> > + ############################## >> > +done >> > +Bytes transferred = 5207724 (4f76ac hex) >> > +U-Boot-PetaLinux> bootm >> > +## Booting kernel from Legacy Image at 80002000 ... >> > + Image Name: Linux-3.1.0 >> > + Image Type: MicroBlaze Linux Kernel Image (uncompressed) >> > + Data Size: 5207660 Bytes = 5 MB >> > + Load Address: 80000000 >> > + Entry Point: 80000000 >> > + Verifying Checksum ... OK >> > + Loading Kernel Image ... OK >> > +OK >> > +## Transferring control to Linux (at address 80000000), 0x80000000 >> ramdisk >> > 0x00000000, FDT 0x00000000... >> > +Early console on uartlite at 0x40600000 >> > +..... boot log skipped >> > + >> > +Welcome to Microblaze Buildroot >> > +Microblaze login: >> > diff --git a/board/relinux/avnet_LX9MicroBoard/TODO >> > b/board/relinux/avnet_LX9MicroBoard/TODO >> > new file mode 100644 >> > index 0000000..ca5ee94 >> > --- /dev/null >> > +++ b/board/relinux/avnet_LX9MicroBoard/TODO >> > @@ -0,0 +1,19 @@ >> > +TODO list for the Spartan LX9 Microboard >> > + >> > +Generate u-boot within buildroot >> > +================================ >> > +Currently, we need to use the u-boot provided by Avnet. >> > + >> > +Provide config files for qemu >> > +============================= >> > + >> > +Generate toolchain >> > +================== >> > +Currently the GNU toolchain provided by Xilinx has to be used. >> > +Xilinx does not provide a toolchain suitable to build a mmu-less >> > +Linux system, but omitting the mmu saved space within the FPGA. >> > + >> > +Bring up mmu-less system >> > +======================== >> > +Hopefully this is easy as soon as we have a working toolchain >> > +with flt support. >> > diff --git a/board/relinux/avnet_LX9MicroBoard/lx9_mmu.dts >> > b/board/relinux/avnet_LX9MicroBoard/lx9_mmu.dts >> > new file mode 100644 >> > index 0000000..8ffedd9 >> > --- /dev/null >> > +++ b/board/relinux/avnet_LX9MicroBoard/lx9_mmu.dts >> > @@ -0,0 +1,247 @@ >> > +/* >> > + * Device Tree Generator version: 1.3 >> > + * >> > + * (C) Copyright 2007-2008 Xilinx, Inc. >> > + * (C) Copyright 2007-2009 Michal Simek >> > + * >> > + * Michal SIMEK <monstr@monstr.eu> >> > + * >> > + * This program is free software; you can redistribute it and/or >> > + * modify it under the terms of the GNU General Public License as >> > + * published by the Free Software Foundation; either version 2 of >> > + * the License, or (at your option) any later version. >> > + * >> > + * This program is distributed in the hope that it will be useful, >> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of >> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the >> > + * GNU General Public License for more details. >> > + * >> > + * You should have received a copy of the GNU General Public License >> > + * along with this program; if not, write to the Free Software >> > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, >> > + * MA 02111-1307 USA >> > + * >> > + * CAUTION: This file is automatically generated by libgen. >> > + * Version: Xilinx EDK 13.2 EDK_O.61xd >> > + * >> > + * XPS project directory: device-tree_bsp_230-orig >> > + */ >> > + >> > +/dts-v1/; >> > +/ { >> > + #address-cells = <1>; >> > + #size-cells = <1>; >> > + compatible = "xlnx,microblaze"; >> > + model = "testing"; >> > + MCB3_LPDDR: memory at 80000000 { >> > + device_type = "memory"; >> > + reg = < 0x80000000 0x4000000 >; >> > + } ; >> > + aliases { >> > + ethernet0 = &Ethernet_MAC; >> > + serial0 = &USB_Uart; >> > + } ; >> > + chosen { >> > + bootargs = "console=ttyUL0"; >> > + linux,stdout-path = "/axi at 0/serial at 40600000"; >> > + } ; >> > + cpus { >> > + #address-cells = <1>; >> > + #cpus = <0x1>; >> > + #size-cells = <0>; >> > + microblaze_0: cpu at 0 { >> > + clock-frequency = <66666667>; >> > + compatible = "xlnx,microblaze-8.20.a"; >> > + d-cache-baseaddr = <0x80000000>; >> > + d-cache-highaddr = <0x83ffffff>; >> > + d-cache-line-size = <0x10>; >> > + d-cache-size = <0x2000>; >> > + device_type = "cpu"; >> > + i-cache-baseaddr = <0x80000000>; >> > + i-cache-highaddr = <0x83ffffff>; >> > + i-cache-line-size = <0x10>; >> > + i-cache-size = <0x2000>; >> > + model = "microblaze,8.20.a"; >> > + reg = <0>; >> > + timebase-frequency = <66666667>; >> > + xlnx,addr-tag-bits = <0xd>; >> > + xlnx,allow-dcache-wr = <0x1>; >> > + xlnx,allow-icache-wr = <0x1>; >> > + xlnx,area-optimized = <0x0>; >> > + xlnx,avoid-primitives = <0x0>; >> > + xlnx,branch-target-cache-size = <0x0>; >> > + xlnx,cache-byte-size = <0x2000>; >> > + xlnx,d-axi = <0x1>; >> > + xlnx,d-lmb = <0x1>; >> > + xlnx,d-plb = <0x0>; >> > + xlnx,data-size = <0x20>; >> > + xlnx,dcache-addr-tag = <0xd>; >> > + xlnx,dcache-always-used = <0x1>; >> > + xlnx,dcache-byte-size = <0x2000>; >> > + xlnx,dcache-data-width = <0x0>; >> > + xlnx,dcache-force-tag-lutram = <0x0>; >> > + xlnx,dcache-interface = <0x0>; >> > + xlnx,dcache-line-len = <0x4>; >> > + xlnx,dcache-use-fsl = <0x0>; >> > + xlnx,dcache-use-writeback = <0x0>; >> > + xlnx,dcache-victims = <0x0>; >> > + xlnx,debug-enabled = <0x1>; >> > + xlnx,div-zero-exception = <0x0>; >> > + xlnx,dynamic-bus-sizing = <0x1>; >> > + xlnx,ecc-use-ce-exception = <0x0>; >> > + xlnx,edge-is-positive = <0x1>; >> > + xlnx,endianness = <0x1>; >> > + xlnx,family = "spartan6"; >> > + xlnx,fault-tolerant = <0x0>; >> > + xlnx,fpu-exception = <0x0>; >> > + xlnx,freq = <0x3f940ab>; >> > + xlnx,fsl-data-size = <0x20>; >> > + xlnx,fsl-exception = <0x0>; >> > + xlnx,fsl-links = <0x0>; >> > + xlnx,i-axi = <0x0>; >> > + xlnx,i-lmb = <0x1>; >> > + xlnx,i-plb = <0x0>; >> > + xlnx,icache-always-used = <0x1>; >> > + xlnx,icache-data-width = <0x0>; >> > + xlnx,icache-force-tag-lutram = <0x0>; >> > + xlnx,icache-interface = <0x0>; >> > + xlnx,icache-line-len = <0x4>; >> > + xlnx,icache-streams = <0x0>; >> > + xlnx,icache-use-fsl = <0x0>; >> > + xlnx,icache-victims = <0x0>; >> > + xlnx,ill-opcode-exception = <0x0>; >> > + xlnx,instance = "microblaze_0"; >> > + xlnx,interconnect = <0x2>; >> > + xlnx,interconnect-m-axi-dc-aw-register = <0x0>; >> > + xlnx,interconnect-m-axi-dc-read-issuing = <0x2>; >> > + xlnx,interconnect-m-axi-dc-w-register = <0x0>; >> > + xlnx,interconnect-m-axi-dc-write-issuing = <0x20>; >> > + xlnx,interconnect-m-axi-dp-read-issuing = <0x1>; >> > + xlnx,interconnect-m-axi-dp-write-issuing = <0x1>; >> > + xlnx,interconnect-m-axi-ic-read-issuing = <0x2>; >> > + xlnx,interconnect-m-axi-ip-read-issuing = <0x1>; >> > + xlnx,interrupt-is-edge = <0x0>; >> > + xlnx,lockstep-slave = <0x0>; >> > + xlnx,mmu-dtlb-size = <0x1>; >> > + xlnx,mmu-itlb-size = <0x1>; >> > + xlnx,mmu-privileged-instr = <0x0>; >> > + xlnx,mmu-tlb-access = <0x3>; >> > + xlnx,mmu-zones = <0x2>; >> > + xlnx,number-of-pc-brk = <0x1>; >> > + xlnx,number-of-rd-addr-brk = <0x0>; >> > + xlnx,number-of-wr-addr-brk = <0x0>; >> > + xlnx,opcode-0x0-illegal = <0x0>; >> > + xlnx,optimization = <0x0>; >> > + xlnx,pvr = <0x0>; >> > + xlnx,pvr-user1 = <0x0>; >> > + xlnx,pvr-user2 = <0x0>; >> > + xlnx,reset-msr = <0x0>; >> > + xlnx,sco = <0x0>; >> > + xlnx,stream-interconnect = <0x0>; >> > + xlnx,unaligned-exceptions = <0x0>; >> > + xlnx,use-barrel = <0x1>; >> > + xlnx,use-branch-target-cache = <0x0>; >> > + xlnx,use-dcache = <0x1>; >> > + xlnx,use-div = <0x0>; >> > + xlnx,use-ext-brk = <0x1>; >> > + xlnx,use-ext-nm-brk = <0x1>; >> > + xlnx,use-extended-fsl-instr = <0x0>; >> > + xlnx,use-fpu = <0x0>; >> > + xlnx,use-hw-mul = <0x1>; >> > + xlnx,use-icache = <0x1>; >> > + xlnx,use-interrupt = <0x1>; >> > + xlnx,use-mmu = <0x3>; >> > + xlnx,use-msr-instr = <0x1>; >> > + xlnx,use-pcmp-instr = <0x0>; >> > + xlnx,use-stack-protection = <0x0>; >> > + } ; >> > + } ; >> > + axi4lite_0: axi at 0 { >> > + #address-cells = <1>; >> > + #size-cells = <1>; >> > + compatible = "xlnx,axi-interconnect-1.03.a", "simple-bus"; >> > + ranges ; >> > + Ethernet_MAC: ethernet at 40e00000 { >> > + compatible = "xlnx,axi-ethernetlite-1.00.a", >> > "xlnx,xps-ethernetlite-1.00.a"; >> > + device_type = "network"; >> > + interrupt-parent = <µblaze_0_intc>; >> > + interrupts = < 2 0 >; >> > + local-mac-address = [ 00 0a 35 aa de 00 ]; >> > +// phy-handle = <&phy0>; >> > + reg = < 0x40e00000 0x10000 >; >> > + xlnx,duplex = <0x1>; >> > + xlnx,family = "spartan6"; >> > + xlnx,include-global-buffers = <0x0>; >> > + xlnx,include-internal-loopback = <0x0>; >> > + xlnx,include-mdio = <0x1>; >> > + xlnx,include-phy-constraints = <0x1>; >> > + xlnx,interconnect-s-axi-read-acceptance = <0x1>; >> > + xlnx,interconnect-s-axi-write-acceptance = <0x1>; >> > + xlnx,rx-ping-pong = <0x0>; >> > + xlnx,s-axi-aclk-period-ps = <0x3a98>; >> > + xlnx,s-axi-id-width = <0x1>; >> > + xlnx,s-axi-supports-narrow-burst = <0x0>; >> > + xlnx,tx-ping-pong = <0x0>; >> > +/* >> > + mdio { >> > + #address-cells = <1>; >> > + #size-cells = <0>; >> > + phy0: phy at 7 { >> > + compatible = "marvell,88e1111"; >> > + device_type = "ethernet-phy"; >> > + reg = <7>; >> > + } ; >> > + } ; >> > +*/ >> > + } ; >> > + SPI_FLASH: spi at 40a00000 { >> > + compatible = "xlnx,axi-spi-1.01.a", "xlnx,xps-spi-2.00.a"; >> > + interrupt-parent = <µblaze_0_intc>; >> > + interrupts = < 1 2 >; >> > + reg = < 0x40a00000 0x10000 >; >> > + xlnx,family = "spartan6"; >> > + xlnx,fifo-exist = <0x1>; >> > + xlnx,num-ss-bits = <0x1>; >> > + xlnx,num-transfer-bits = <0x8>; >> > + xlnx,sck-ratio = <0x4>; >> > + } ; >> > + USB_Uart: serial at 40600000 { >> > + clock-frequency = <66666667>; >> > + compatible = "xlnx,axi-uartlite-1.02.a", >> > "xlnx,xps-uartlite-1.00.a"; >> > + current-speed = <115200>; >> > + device_type = "serial"; >> > + interrupt-parent = <µblaze_0_intc>; >> > + interrupts = < 3 0 >; >> > + port-number = <0>; >> > + reg = < 0x40600000 0x10000 >; >> > + xlnx,baudrate = <0x1c200>; >> > + xlnx,data-bits = <0x8>; >> > + xlnx,family = "spartan6"; >> > + xlnx,odd-parity = <0x1>; >> > + xlnx,s-axi-aclk-freq-hz = <0x3f940ab>; >> > + xlnx,use-parity = <0x0>; >> > + } ; >> > + microblaze_0_intc: interrupt-controller at 41200000 { >> > + #interrupt-cells = <0x2>; >> > + compatible = "xlnx,axi-intc-1.01.a", >> "xlnx,xps-intc-1.00.a"; >> > + interrupt-controller ; >> > + reg = < 0x41200000 0x10000 >; >> > + xlnx,kind-of-intr = <0xc>; >> > + xlnx,num-intr-inputs = <0x4>; >> > + } ; >> > + system_timer: timer at 41c00000 { >> > + clock-frequency = <66666667>; >> > + compatible = "xlnx,axi-timer-1.02.a", >> "xlnx,xps-timer-1.00.a"; >> > + interrupt-parent = <µblaze_0_intc>; >> > + interrupts = < 0 2 >; >> > + reg = < 0x41c00000 0x10000 >; >> > + xlnx,count-width = <0x20>; >> > + xlnx,family = "spartan6"; >> > + xlnx,gen0-assert = <0x1>; >> > + xlnx,gen1-assert = <0x1>; >> > + xlnx,one-timer-only = <0x0>; >> > + xlnx,trig0-assert = <0x1>; >> > + xlnx,trig1-assert = <0x1>; >> > + } ; >> > + } ; >> > +} ; >> > diff --git a/board/relinux/avnet_LX9MicroBoard/lx9_mmu_defconfig >> > b/board/relinux/avnet_LX9MicroBoard/lx9_mmu_defconfig >> > new file mode 100644 >> > index 0000000..5d01ca0 >> > --- /dev/null >> > +++ b/board/relinux/avnet_LX9MicroBoard/lx9_mmu_defconfig >> > @@ -0,0 +1,68 @@ >> > +CONFIG_EXPERIMENTAL=y >> > +CONFIG_SYSVIPC=y >> > +CONFIG_IKCONFIG=y >> > +CONFIG_IKCONFIG_PROC=y >> > +CONFIG_BLK_DEV_INITRD=y >> > +CONFIG_INITRAMFS_SOURCE="rootfs.cpio" >> > +CONFIG_INITRAMFS_COMPRESSION_GZIP=y >> > +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set >> > +CONFIG_EXPERT=y >> > +CONFIG_KALLSYMS_ALL=y >> > +CONFIG_KALLSYMS_EXTRA_PASS=y >> > +# CONFIG_HOTPLUG is not set >> > +# CONFIG_BASE_FULL is not set >> > +# CONFIG_FUTEX is not set >> > +# CONFIG_EPOLL is not set >> > +# CONFIG_SIGNALFD is not set >> > +# CONFIG_SHMEM is not set >> > +CONFIG_SLAB=y >> > +CONFIG_MODULES=y >> > +CONFIG_MODULE_UNLOAD=y >> > +# CONFIG_BLK_DEV_BSG is not set >> > +# CONFIG_OPT_LIB_ASM is not set >> > +CONFIG_KERNEL_BASE_ADDR=0x80000000 >> > +CONFIG_XILINX_MICROBLAZE0_FAMILY="spartan6" >> > +CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1 >> > +# CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR is not set >> > +CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1 >> > +CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=1 >> > +CONFIG_XILINX_MICROBLAZE0_HW_VER="8.20.a" >> > +CONFIG_HZ_100=y >> > +CONFIG_MMU=y >> > +CONFIG_CMDLINE_BOOL=y >> > +CONFIG_CMDLINE_FORCE=y >> > +CONFIG_NET=y >> > +CONFIG_PACKET=y >> > +CONFIG_UNIX=y >> > +CONFIG_INET=y >> > +# CONFIG_INET_LRO is not set >> > +# CONFIG_IPV6 is not set >> > +CONFIG_PROC_DEVICETREE=y >> > +CONFIG_BLK_DEV_RAM=y >> > +CONFIG_BLK_DEV_RAM_SIZE=8192 >> > +CONFIG_NETDEVICES=y >> > +CONFIG_NET_ETHERNET=y >> > +CONFIG_XILINX_EMACLITE=y >> > +# CONFIG_INPUT is not set >> > +# CONFIG_SERIO is not set >> > +# CONFIG_VT is not set >> > +CONFIG_SERIAL_UARTLITE=y >> > +CONFIG_SERIAL_UARTLITE_CONSOLE=y >> > +# CONFIG_HW_RANDOM is not set >> > +# CONFIG_HWMON is not set >> > +# CONFIG_USB_SUPPORT is not set >> > +CONFIG_EXT2_FS=y >> > +# CONFIG_DNOTIFY is not set >> > +CONFIG_NFS_FS=y >> > +CONFIG_NFS_V3=y >> > +CONFIG_CIFS=y >> > +CONFIG_CIFS_STATS=y >> > +CONFIG_CIFS_STATS2=y >> > +CONFIG_PARTITION_ADVANCED=y >> > +CONFIG_DEBUG_KERNEL=y >> > +CONFIG_DETECT_HUNG_TASK=y >> > +CONFIG_DEBUG_SLAB=y >> > +CONFIG_DEBUG_SPINLOCK=y >> > +CONFIG_DEBUG_INFO=y >> > +CONFIG_EARLY_PRINTK=y >> > +# CONFIG_CRYPTO_ANSI_CPRNG is not set >> > diff --git a/configs/spartan6lx9_mb_defconfig >> > b/configs/spartan6lx9_mb_defconfig >> > new file mode 100644 >> > index 0000000..0329bb4 >> > --- /dev/null >> > +++ b/configs/spartan6lx9_mb_defconfig >> > @@ -0,0 +1,17 @@ >> > +BR2_microblaze=y >> > +BR2_TOOLCHAIN_EXTERNAL=y >> > +BR2_TOOLCHAIN_EXTERNAL_PATH="/opt/microblazeel-unknown-linux-gnu/" >> > +BR2_TOOLCHAIN_EXTERNAL_CUSTOM_PREFIX="microblazeel-unknown-linux-gnu" >> > +BR2_TOOLCHAIN_EXTERNAL_CUSTOM_GLIBC=y >> > +BR2_TOOLCHAIN_EXTERNAL_CXX=y >> > +BR2_TARGET_GENERIC_HOSTNAME="Microblaze Buildroot" >> > +BR2_TARGET_GENERIC_ISSUE="Welcome to Microblaze Buildroot" >> > +BR2_TARGET_GENERIC_GETTY_PORT="ttyUL0" >> > +# BR2_TARGET_ROOTFS_TAR is not set >> > +BR2_TARGET_ROOTFS_INITRAMFS=y >> > +BR2_LINUX_KERNEL=y >> > +BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y >> > >> +BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(TOPDIR)/board/relinux/avnet_LX9MicroBoard/lx9_mmu_defconfig" >> > >> +BR2_LINUX_KERNEL_DTS_FILE="$(TOPDIR)/board/relinux/avnet_LX9MicroBoard/lx9_mmu.dts" >> > +BR2_LINUX_KERNEL_IMAGE_TARGET_CUSTOM=y >> > +BR2_LINUX_KERNEL_IMAGE_TARGET_NAME="simpleImage.lx9_mmu" >> > diff --git a/linux/Config.in b/linux/Config.in >> > index 86dc32a..138feb3 100644 >> > --- a/linux/Config.in >> > +++ b/linux/Config.in >> > @@ -120,6 +120,14 @@ config BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE >> > help >> > Path to the kernel configuration file >> > >> > +config BR2_LINUX_KERNEL_DTS_FILE >> > + string "Device Tree dts file location" >> > + depends on BR2_microblaze >> > + help >> > + Path from where the dts file has to be copied >> > + The final "custom target" name depends on the >> > + dts file name: >> > + <name>.dts --> simpleImage.<name> >> > # >> > # Binary format >> > # >> > diff --git a/linux/linux.mk b/linux/linux.mk >> > index ae236d4..4a24f18 100644 >> > --- a/linux/linux.mk >> > +++ b/linux/linux.mk >> > @@ -117,6 +117,18 @@ endef >> > >> > LINUX_POST_PATCH_HOOKS += LINUX_APPLY_PATCHES >> > >> > +ifeq ($(KERNEL_ARCH),microblaze) >> > +# on microblaze, we always want mkimage >> > +LINUX_DEPENDENCIES+=host-uboot-tools >> > + >> > +define LINUX_COPY_DTS >> > + if test -f "$(BR2_LINUX_KERNEL_DTS_FILE)" ; then \ >> > + cp $(BR2_LINUX_KERNEL_DTS_FILE) $(@D)/arch/microblaze/boot/dts >> ; \ >> > + else \ >> > + echo "Cannot copy dts file!" ; \ >> > + fi >> > +endef >> > +endif >> > >> > ifeq ($(BR2_LINUX_KERNEL_USE_DEFCONFIG),y) >> > KERNEL_SOURCE_CONFIG = $(KERNEL_ARCH_PATH)/configs/$(call >> > qstrip,$(BR2_LINUX_KERNEL_DEFCONFIG))_defconfig >> > diff --git a/target/Config.in.arch b/target/Config.in.arch >> > index 417441d..3a75585 100644 >> > --- a/target/Config.in.arch >> > +++ b/target/Config.in.arch >> > @@ -21,6 +21,8 @@ config BR2_i386 >> > config BR2_m68k >> > bool "m68k" >> > depends on BROKEN # ice in uclibc / inet_ntoa_r >> > +config BR2_microblaze >> > + bool "microblaze" >> > config BR2_mips >> > bool "mips" >> > config BR2_mipsel >> > @@ -508,6 +510,7 @@ config BR2_ARCH >> > default "i686" if BR2_x86_athlon >> > default "i686" if BR2_x86_athlon_4 >> > default "m68k" if BR2_m68k >> > + default "microblaze" if BR2_microblaze >> > default "mips" if BR2_mips >> > default "mipsel" if BR2_mipsel >> > default "powerpc" if BR2_powerpc >> > @@ -533,7 +536,7 @@ config BR2_ARCH >> > >> > config BR2_ENDIAN >> > string >> > - default "LITTLE" if BR2_arm || BR2_bfin || BR2_i386 || BR2_mipsel >> || \ >> > + default "LITTLE" if BR2_arm || BR2_bfin || BR2_i386 || BR2_mipsel >> || >> > BR2_microblaze || \ >> > BR2_sh3 || BR2_sh4 || BR2_sh4a || BR2_x86_64 || >> BR2_sh64 >> > default "BIG" if BR2_armeb || BR2_avr32 || BR2_m68k || BR2_mips >> || \ >> > BR2_powerpc || BR2_sh2 || BR2_sh2a || \ >> > @@ -598,6 +601,7 @@ config BR2_GCC_TARGET_TUNE >> > default 68030 if BR2_m68k_68030 >> > default 68040 if BR2_m68k_68040 >> > default 68060 if BR2_m68k_68060 >> > + default microblaze if BR2_microblaze >> > default mips1 if BR2_mips_1 >> > default mips2 if BR2_mips_2 >> > default mips3 if BR2_mips_3 >> > -- >> > 1.7.9 >> > >> > >> > >> > 2012/2/11 <buildroot-request@busybox.net> >> >> >> >> >> >> On Saturday 11 February 2012 05:58:37 Spenser Gilliland wrote: >> >> > I'm using this Microblaze patch for my project. Will it be part of >> >> > the official release that is coming up soon? >> >> >> >> I'm afraid it got lost between the cracks. Could you repost it? >> >> >> >> Regards, >> >> Arnout >> > >> > >> > >> > _______________________________________________ >> > buildroot mailing list >> > buildroot at busybox.net >> > http://lists.busybox.net/mailman/listinfo/buildroot >> >> >> >> -- >> Spenser Gilliland >> Computer Engineer >> Illinois Institute of Technology >> > > > > -- > ?lvaro G?mez Machado > > -- ?lvaro G?mez Machado -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.busybox.net/pipermail/buildroot/attachments/20120213/f90825c0/attachment-0001.html> ^ permalink raw reply [flat|nested] 15+ messages in thread
[parent not found: <CA+appbN9=yvud1LwSCpgMvUh=Qc8DoQbz=gyjfvOUmzmpsopfQ@mail.gmail.com>]
* [Buildroot] [PATCH] Adding Microblaze support to Buildroot [not found] ` <CA+appbN9=yvud1LwSCpgMvUh=Qc8DoQbz=gyjfvOUmzmpsopfQ@mail.gmail.com> @ 2012-02-13 19:40 ` Alvaro Gamez 2012-02-13 19:46 ` Spenser Gilliland 0 siblings, 1 reply; 15+ messages in thread From: Alvaro Gamez @ 2012-02-13 19:40 UTC (permalink / raw) To: buildroot I checked and this is the content of the config file: BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(TOPDIR)/board/avnet/LX9MicroBoard/lx9_mmu_defconfig" BR2_LINUX_KERNEL_DTS_FILE="$(TOPDIR)/board/avnet/LX9MicroBoard/lx9_mmu.dts" BR2_LINUX_KERNEL_IMAGE_TARGET_NAME="simpleImage.lx9_mmu" so I think there has to be some other thing I'm not aware of. 2012/2/13 Spenser Gilliland <spenser309@gmail.com> > This means that the dts was not copied into the arch/microblaze/boot/dts > dir or you are not building the correct target. > > You need to verify that the BR2_LINUX_KERNEL_DTS_FILE is set to a real > file and that BR2_LINUX_KERNEL_IMAGE_TARGET_NAME is set to > simpleImage.$(filename-wo-extension). > > IE. if BR2_LINUX_KERNEL_DTS_FILE = /path/to/dts/xupv5.dts then > BR2_LINUX_KERNEL_IMAGE_TARGET=simpleImage.xupv5. > > Spenser > > On Feb 13, 2012 1:14 PM, "Alvaro Gamez" <alvaro.gamez@hazent.com> wrote: > >> Ok, now that I have a little time I'm trying to make it work. >> >> I haven't had any problem yet with GCC tune. However, I'm getting the >> following error while trying to build the kernel >> >> make[2]: *** No rule to make target `arch/microblaze/boot/lx9_mmu.dtb', >> needed by `arch/microblaze/boot/system.dtb'. Stop. >> >> Any idea? >> >> Regards >> >> >> 2012/2/13 Alvaro Gamez <alvaro.gamez@hazent.com> >> >>> I am yet to test it. I just found yersterday that buildroot exists :) >>> >>> >>> 2012/2/13 Spenser Gilliland <spenser309@gmail.com> >>> >>>> Alvaro, >>>> >>>> Did you have issues with the GCC tune? I had to remove that line from >>>> the original patch. >>>> >>>> Spenser >>>> >>>> On Sun, Feb 12, 2012 at 5:07 PM, Alvaro Gamez <alvaro.gamez@hazent.com> >>>> wrote: >>>> > Hi >>>> > >>>> > I am also interested on Microblaze support, hence I rescued the old >>>> patch >>>> > from the archives, merged it against latest git revision and >>>> published on >>>> > github.com/agamez/buildroot >>>> > >>>> > I attach the new patch, should apply cleanly to latest version on git. >>>> > >>>> > Even though Stephan Hoffmann work is pretty good, I think the path of >>>> the >>>> > new files should be modified from board/relinux/avnet_LX9MicroBoard/ >>>> to >>>> > board/avnet/LX9MicroBoard/ >>>> > >>>> > I didn't want to do that myself out of respect for the real author of >>>> the >>>> > patch, since this is merely a repost. >>>> > >>>> > Regards, >>>> > >>>> > ?lvaro G?mez Machado >>>> > >>>> > From f4345407e3f23ebda7d91c53d81413cea51e1381 Mon Sep 17 00:00:00 2001 >>>> > From: Stephan Hoffmann <sho@relinux.de> >>>> > Date: Wed, 23 Nov 2011 11:42:40 +0100 >>>> > Subject: [PATCH] Added support for the Microblaze soft CPU >>>> > >>>> > --- >>>> > board/relinux/avnet_LX9MicroBoard/README | 64 +++++ >>>> > board/relinux/avnet_LX9MicroBoard/TODO | 19 ++ >>>> > board/relinux/avnet_LX9MicroBoard/lx9_mmu.dts | 247 >>>> > ++++++++++++++++++++ >>>> > .../relinux/avnet_LX9MicroBoard/lx9_mmu_defconfig | 68 ++++++ >>>> > configs/spartan6lx9_mb_defconfig | 17 ++ >>>> > linux/Config.in | 8 + >>>> > linux/linux.mk | 12 + >>>> > target/Config.in.arch | 6 +- >>>> > 8 files changed, 440 insertions(+), 1 deletions(-) >>>> > create mode 100644 board/relinux/avnet_LX9MicroBoard/README >>>> > create mode 100644 board/relinux/avnet_LX9MicroBoard/TODO >>>> > create mode 100644 board/relinux/avnet_LX9MicroBoard/lx9_mmu.dts >>>> > create mode 100644 >>>> board/relinux/avnet_LX9MicroBoard/lx9_mmu_defconfig >>>> > create mode 100644 configs/spartan6lx9_mb_defconfig >>>> > >>>> > diff --git a/board/relinux/avnet_LX9MicroBoard/README >>>> > b/board/relinux/avnet_LX9MicroBoard/README >>>> > new file mode 100644 >>>> > index 0000000..a2e9247 >>>> > --- /dev/null >>>> > +++ b/board/relinux/avnet_LX9MicroBoard/README >>>> > @@ -0,0 +1,64 @@ >>>> > +This is the buildroot board support for the Avnet Spartan6 LX9 >>>> MicroBoard. >>>> > + >>>> > +The board can be bought from Avnet or from Trenz for a low prize. >>>> > + >>>> > +To run the Linux built with buildroot you have to install the FPGA >>>> bitfile >>>> > +and the u-boot boot loader as described in the totorial available on >>>> > + >>>> > + http://www.em.avnet.com/s6microboard >>>> > + >>>> > +The image file (default name is simpleImage.lx9_mmu.ub) has to be >>>> > +copied to your tftp folder (often /tftpboot/). >>>> > + >>>> > +Sample session: >>>> > + >>>> > +SPI Bootloader >>>> > +Loading binary image >>>> > +from flash @ address: 00060000 >>>> > +to RAM address: 83f00000 >>>> > +Done >>>> > + >>>> > + >>>> > +SDRAM : >>>> > + Icache:ON >>>> > + Dcache:ON >>>> > + U-Boot Start:0x83f00000 >>>> > +SF: Got idcode 20 ba 18 10 01 >>>> > +*** Warning - bad CRC, using default environment >>>> > + >>>> > +Net: Xilinx_Emaclite >>>> > +MAC: 00:0a:35:00:63:37 >>>> > +U-BOOT for Avnet-LX9-Microboard-AXI-tiny-13.1 >>>> > + >>>> > +BOOTP broadcast 1 >>>> > +DHCP client bound to address 192.168.11.122 >>>> > +Hit any key to stop autoboot: 0 >>>> > +U-Boot-PetaLinux> tftp simpleImage.lx9_mmu.ub >>>> > +Using Xilinx_Emaclite device >>>> > +TFTP from server 192.168.11.10; our IP address is 192.168.11.122 >>>> > +Filename 't.ub'. >>>> > +Load address: 0x80002000 >>>> > +Loading: >>>> ################################################################# >>>> > + >>>> ################################################################# >>>> > + >>>> ################################################################# >>>> > + >>>> ################################################################# >>>> > + >>>> ################################################################# >>>> > + ############################## >>>> > +done >>>> > +Bytes transferred = 5207724 (4f76ac hex) >>>> > +U-Boot-PetaLinux> bootm >>>> > +## Booting kernel from Legacy Image at 80002000 ... >>>> > + Image Name: Linux-3.1.0 >>>> > + Image Type: MicroBlaze Linux Kernel Image (uncompressed) >>>> > + Data Size: 5207660 Bytes = 5 MB >>>> > + Load Address: 80000000 >>>> > + Entry Point: 80000000 >>>> > + Verifying Checksum ... OK >>>> > + Loading Kernel Image ... OK >>>> > +OK >>>> > +## Transferring control to Linux (at address 80000000), 0x80000000 >>>> ramdisk >>>> > 0x00000000, FDT 0x00000000... >>>> > +Early console on uartlite at 0x40600000 >>>> > +..... boot log skipped >>>> > + >>>> > +Welcome to Microblaze Buildroot >>>> > +Microblaze login: >>>> > diff --git a/board/relinux/avnet_LX9MicroBoard/TODO >>>> > b/board/relinux/avnet_LX9MicroBoard/TODO >>>> > new file mode 100644 >>>> > index 0000000..ca5ee94 >>>> > --- /dev/null >>>> > +++ b/board/relinux/avnet_LX9MicroBoard/TODO >>>> > @@ -0,0 +1,19 @@ >>>> > +TODO list for the Spartan LX9 Microboard >>>> > + >>>> > +Generate u-boot within buildroot >>>> > +================================ >>>> > +Currently, we need to use the u-boot provided by Avnet. >>>> > + >>>> > +Provide config files for qemu >>>> > +============================= >>>> > + >>>> > +Generate toolchain >>>> > +================== >>>> > +Currently the GNU toolchain provided by Xilinx has to be used. >>>> > +Xilinx does not provide a toolchain suitable to build a mmu-less >>>> > +Linux system, but omitting the mmu saved space within the FPGA. >>>> > + >>>> > +Bring up mmu-less system >>>> > +======================== >>>> > +Hopefully this is easy as soon as we have a working toolchain >>>> > +with flt support. >>>> > diff --git a/board/relinux/avnet_LX9MicroBoard/lx9_mmu.dts >>>> > b/board/relinux/avnet_LX9MicroBoard/lx9_mmu.dts >>>> > new file mode 100644 >>>> > index 0000000..8ffedd9 >>>> > --- /dev/null >>>> > +++ b/board/relinux/avnet_LX9MicroBoard/lx9_mmu.dts >>>> > @@ -0,0 +1,247 @@ >>>> > +/* >>>> > + * Device Tree Generator version: 1.3 >>>> > + * >>>> > + * (C) Copyright 2007-2008 Xilinx, Inc. >>>> > + * (C) Copyright 2007-2009 Michal Simek >>>> > + * >>>> > + * Michal SIMEK <monstr@monstr.eu> >>>> > + * >>>> > + * This program is free software; you can redistribute it and/or >>>> > + * modify it under the terms of the GNU General Public License as >>>> > + * published by the Free Software Foundation; either version 2 of >>>> > + * the License, or (at your option) any later version. >>>> > + * >>>> > + * This program is distributed in the hope that it will be useful, >>>> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of >>>> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the >>>> > + * GNU General Public License for more details. >>>> > + * >>>> > + * You should have received a copy of the GNU General Public License >>>> > + * along with this program; if not, write to the Free Software >>>> > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, >>>> > + * MA 02111-1307 USA >>>> > + * >>>> > + * CAUTION: This file is automatically generated by libgen. >>>> > + * Version: Xilinx EDK 13.2 EDK_O.61xd >>>> > + * >>>> > + * XPS project directory: device-tree_bsp_230-orig >>>> > + */ >>>> > + >>>> > +/dts-v1/; >>>> > +/ { >>>> > + #address-cells = <1>; >>>> > + #size-cells = <1>; >>>> > + compatible = "xlnx,microblaze"; >>>> > + model = "testing"; >>>> > + MCB3_LPDDR: memory at 80000000 { >>>> > + device_type = "memory"; >>>> > + reg = < 0x80000000 0x4000000 >; >>>> > + } ; >>>> > + aliases { >>>> > + ethernet0 = &Ethernet_MAC; >>>> > + serial0 = &USB_Uart; >>>> > + } ; >>>> > + chosen { >>>> > + bootargs = "console=ttyUL0"; >>>> > + linux,stdout-path = "/axi at 0/serial at 40600000"; >>>> > + } ; >>>> > + cpus { >>>> > + #address-cells = <1>; >>>> > + #cpus = <0x1>; >>>> > + #size-cells = <0>; >>>> > + microblaze_0: cpu at 0 { >>>> > + clock-frequency = <66666667>; >>>> > + compatible = "xlnx,microblaze-8.20.a"; >>>> > + d-cache-baseaddr = <0x80000000>; >>>> > + d-cache-highaddr = <0x83ffffff>; >>>> > + d-cache-line-size = <0x10>; >>>> > + d-cache-size = <0x2000>; >>>> > + device_type = "cpu"; >>>> > + i-cache-baseaddr = <0x80000000>; >>>> > + i-cache-highaddr = <0x83ffffff>; >>>> > + i-cache-line-size = <0x10>; >>>> > + i-cache-size = <0x2000>; >>>> > + model = "microblaze,8.20.a"; >>>> > + reg = <0>; >>>> > + timebase-frequency = <66666667>; >>>> > + xlnx,addr-tag-bits = <0xd>; >>>> > + xlnx,allow-dcache-wr = <0x1>; >>>> > + xlnx,allow-icache-wr = <0x1>; >>>> > + xlnx,area-optimized = <0x0>; >>>> > + xlnx,avoid-primitives = <0x0>; >>>> > + xlnx,branch-target-cache-size = <0x0>; >>>> > + xlnx,cache-byte-size = <0x2000>; >>>> > + xlnx,d-axi = <0x1>; >>>> > + xlnx,d-lmb = <0x1>; >>>> > + xlnx,d-plb = <0x0>; >>>> > + xlnx,data-size = <0x20>; >>>> > + xlnx,dcache-addr-tag = <0xd>; >>>> > + xlnx,dcache-always-used = <0x1>; >>>> > + xlnx,dcache-byte-size = <0x2000>; >>>> > + xlnx,dcache-data-width = <0x0>; >>>> > + xlnx,dcache-force-tag-lutram = <0x0>; >>>> > + xlnx,dcache-interface = <0x0>; >>>> > + xlnx,dcache-line-len = <0x4>; >>>> > + xlnx,dcache-use-fsl = <0x0>; >>>> > + xlnx,dcache-use-writeback = <0x0>; >>>> > + xlnx,dcache-victims = <0x0>; >>>> > + xlnx,debug-enabled = <0x1>; >>>> > + xlnx,div-zero-exception = <0x0>; >>>> > + xlnx,dynamic-bus-sizing = <0x1>; >>>> > + xlnx,ecc-use-ce-exception = <0x0>; >>>> > + xlnx,edge-is-positive = <0x1>; >>>> > + xlnx,endianness = <0x1>; >>>> > + xlnx,family = "spartan6"; >>>> > + xlnx,fault-tolerant = <0x0>; >>>> > + xlnx,fpu-exception = <0x0>; >>>> > + xlnx,freq = <0x3f940ab>; >>>> > + xlnx,fsl-data-size = <0x20>; >>>> > + xlnx,fsl-exception = <0x0>; >>>> > + xlnx,fsl-links = <0x0>; >>>> > + xlnx,i-axi = <0x0>; >>>> > + xlnx,i-lmb = <0x1>; >>>> > + xlnx,i-plb = <0x0>; >>>> > + xlnx,icache-always-used = <0x1>; >>>> > + xlnx,icache-data-width = <0x0>; >>>> > + xlnx,icache-force-tag-lutram = <0x0>; >>>> > + xlnx,icache-interface = <0x0>; >>>> > + xlnx,icache-line-len = <0x4>; >>>> > + xlnx,icache-streams = <0x0>; >>>> > + xlnx,icache-use-fsl = <0x0>; >>>> > + xlnx,icache-victims = <0x0>; >>>> > + xlnx,ill-opcode-exception = <0x0>; >>>> > + xlnx,instance = "microblaze_0"; >>>> > + xlnx,interconnect = <0x2>; >>>> > + xlnx,interconnect-m-axi-dc-aw-register = <0x0>; >>>> > + xlnx,interconnect-m-axi-dc-read-issuing = <0x2>; >>>> > + xlnx,interconnect-m-axi-dc-w-register = <0x0>; >>>> > + xlnx,interconnect-m-axi-dc-write-issuing = <0x20>; >>>> > + xlnx,interconnect-m-axi-dp-read-issuing = <0x1>; >>>> > + xlnx,interconnect-m-axi-dp-write-issuing = <0x1>; >>>> > + xlnx,interconnect-m-axi-ic-read-issuing = <0x2>; >>>> > + xlnx,interconnect-m-axi-ip-read-issuing = <0x1>; >>>> > + xlnx,interrupt-is-edge = <0x0>; >>>> > + xlnx,lockstep-slave = <0x0>; >>>> > + xlnx,mmu-dtlb-size = <0x1>; >>>> > + xlnx,mmu-itlb-size = <0x1>; >>>> > + xlnx,mmu-privileged-instr = <0x0>; >>>> > + xlnx,mmu-tlb-access = <0x3>; >>>> > + xlnx,mmu-zones = <0x2>; >>>> > + xlnx,number-of-pc-brk = <0x1>; >>>> > + xlnx,number-of-rd-addr-brk = <0x0>; >>>> > + xlnx,number-of-wr-addr-brk = <0x0>; >>>> > + xlnx,opcode-0x0-illegal = <0x0>; >>>> > + xlnx,optimization = <0x0>; >>>> > + xlnx,pvr = <0x0>; >>>> > + xlnx,pvr-user1 = <0x0>; >>>> > + xlnx,pvr-user2 = <0x0>; >>>> > + xlnx,reset-msr = <0x0>; >>>> > + xlnx,sco = <0x0>; >>>> > + xlnx,stream-interconnect = <0x0>; >>>> > + xlnx,unaligned-exceptions = <0x0>; >>>> > + xlnx,use-barrel = <0x1>; >>>> > + xlnx,use-branch-target-cache = <0x0>; >>>> > + xlnx,use-dcache = <0x1>; >>>> > + xlnx,use-div = <0x0>; >>>> > + xlnx,use-ext-brk = <0x1>; >>>> > + xlnx,use-ext-nm-brk = <0x1>; >>>> > + xlnx,use-extended-fsl-instr = <0x0>; >>>> > + xlnx,use-fpu = <0x0>; >>>> > + xlnx,use-hw-mul = <0x1>; >>>> > + xlnx,use-icache = <0x1>; >>>> > + xlnx,use-interrupt = <0x1>; >>>> > + xlnx,use-mmu = <0x3>; >>>> > + xlnx,use-msr-instr = <0x1>; >>>> > + xlnx,use-pcmp-instr = <0x0>; >>>> > + xlnx,use-stack-protection = <0x0>; >>>> > + } ; >>>> > + } ; >>>> > + axi4lite_0: axi at 0 { >>>> > + #address-cells = <1>; >>>> > + #size-cells = <1>; >>>> > + compatible = "xlnx,axi-interconnect-1.03.a", "simple-bus"; >>>> > + ranges ; >>>> > + Ethernet_MAC: ethernet at 40e00000 { >>>> > + compatible = "xlnx,axi-ethernetlite-1.00.a", >>>> > "xlnx,xps-ethernetlite-1.00.a"; >>>> > + device_type = "network"; >>>> > + interrupt-parent = <µblaze_0_intc>; >>>> > + interrupts = < 2 0 >; >>>> > + local-mac-address = [ 00 0a 35 aa de 00 ]; >>>> > +// phy-handle = <&phy0>; >>>> > + reg = < 0x40e00000 0x10000 >; >>>> > + xlnx,duplex = <0x1>; >>>> > + xlnx,family = "spartan6"; >>>> > + xlnx,include-global-buffers = <0x0>; >>>> > + xlnx,include-internal-loopback = <0x0>; >>>> > + xlnx,include-mdio = <0x1>; >>>> > + xlnx,include-phy-constraints = <0x1>; >>>> > + xlnx,interconnect-s-axi-read-acceptance = <0x1>; >>>> > + xlnx,interconnect-s-axi-write-acceptance = <0x1>; >>>> > + xlnx,rx-ping-pong = <0x0>; >>>> > + xlnx,s-axi-aclk-period-ps = <0x3a98>; >>>> > + xlnx,s-axi-id-width = <0x1>; >>>> > + xlnx,s-axi-supports-narrow-burst = <0x0>; >>>> > + xlnx,tx-ping-pong = <0x0>; >>>> > +/* >>>> > + mdio { >>>> > + #address-cells = <1>; >>>> > + #size-cells = <0>; >>>> > + phy0: phy at 7 { >>>> > + compatible = "marvell,88e1111"; >>>> > + device_type = "ethernet-phy"; >>>> > + reg = <7>; >>>> > + } ; >>>> > + } ; >>>> > +*/ >>>> > + } ; >>>> > + SPI_FLASH: spi at 40a00000 { >>>> > + compatible = "xlnx,axi-spi-1.01.a", >>>> "xlnx,xps-spi-2.00.a"; >>>> > + interrupt-parent = <µblaze_0_intc>; >>>> > + interrupts = < 1 2 >; >>>> > + reg = < 0x40a00000 0x10000 >; >>>> > + xlnx,family = "spartan6"; >>>> > + xlnx,fifo-exist = <0x1>; >>>> > + xlnx,num-ss-bits = <0x1>; >>>> > + xlnx,num-transfer-bits = <0x8>; >>>> > + xlnx,sck-ratio = <0x4>; >>>> > + } ; >>>> > + USB_Uart: serial at 40600000 { >>>> > + clock-frequency = <66666667>; >>>> > + compatible = "xlnx,axi-uartlite-1.02.a", >>>> > "xlnx,xps-uartlite-1.00.a"; >>>> > + current-speed = <115200>; >>>> > + device_type = "serial"; >>>> > + interrupt-parent = <µblaze_0_intc>; >>>> > + interrupts = < 3 0 >; >>>> > + port-number = <0>; >>>> > + reg = < 0x40600000 0x10000 >; >>>> > + xlnx,baudrate = <0x1c200>; >>>> > + xlnx,data-bits = <0x8>; >>>> > + xlnx,family = "spartan6"; >>>> > + xlnx,odd-parity = <0x1>; >>>> > + xlnx,s-axi-aclk-freq-hz = <0x3f940ab>; >>>> > + xlnx,use-parity = <0x0>; >>>> > + } ; >>>> > + microblaze_0_intc: interrupt-controller at 41200000 { >>>> > + #interrupt-cells = <0x2>; >>>> > + compatible = "xlnx,axi-intc-1.01.a", >>>> "xlnx,xps-intc-1.00.a"; >>>> > + interrupt-controller ; >>>> > + reg = < 0x41200000 0x10000 >; >>>> > + xlnx,kind-of-intr = <0xc>; >>>> > + xlnx,num-intr-inputs = <0x4>; >>>> > + } ; >>>> > + system_timer: timer at 41c00000 { >>>> > + clock-frequency = <66666667>; >>>> > + compatible = "xlnx,axi-timer-1.02.a", >>>> "xlnx,xps-timer-1.00.a"; >>>> > + interrupt-parent = <µblaze_0_intc>; >>>> > + interrupts = < 0 2 >; >>>> > + reg = < 0x41c00000 0x10000 >; >>>> > + xlnx,count-width = <0x20>; >>>> > + xlnx,family = "spartan6"; >>>> > + xlnx,gen0-assert = <0x1>; >>>> > + xlnx,gen1-assert = <0x1>; >>>> > + xlnx,one-timer-only = <0x0>; >>>> > + xlnx,trig0-assert = <0x1>; >>>> > + xlnx,trig1-assert = <0x1>; >>>> > + } ; >>>> > + } ; >>>> > +} ; >>>> > diff --git a/board/relinux/avnet_LX9MicroBoard/lx9_mmu_defconfig >>>> > b/board/relinux/avnet_LX9MicroBoard/lx9_mmu_defconfig >>>> > new file mode 100644 >>>> > index 0000000..5d01ca0 >>>> > --- /dev/null >>>> > +++ b/board/relinux/avnet_LX9MicroBoard/lx9_mmu_defconfig >>>> > @@ -0,0 +1,68 @@ >>>> > +CONFIG_EXPERIMENTAL=y >>>> > +CONFIG_SYSVIPC=y >>>> > +CONFIG_IKCONFIG=y >>>> > +CONFIG_IKCONFIG_PROC=y >>>> > +CONFIG_BLK_DEV_INITRD=y >>>> > +CONFIG_INITRAMFS_SOURCE="rootfs.cpio" >>>> > +CONFIG_INITRAMFS_COMPRESSION_GZIP=y >>>> > +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set >>>> > +CONFIG_EXPERT=y >>>> > +CONFIG_KALLSYMS_ALL=y >>>> > +CONFIG_KALLSYMS_EXTRA_PASS=y >>>> > +# CONFIG_HOTPLUG is not set >>>> > +# CONFIG_BASE_FULL is not set >>>> > +# CONFIG_FUTEX is not set >>>> > +# CONFIG_EPOLL is not set >>>> > +# CONFIG_SIGNALFD is not set >>>> > +# CONFIG_SHMEM is not set >>>> > +CONFIG_SLAB=y >>>> > +CONFIG_MODULES=y >>>> > +CONFIG_MODULE_UNLOAD=y >>>> > +# CONFIG_BLK_DEV_BSG is not set >>>> > +# CONFIG_OPT_LIB_ASM is not set >>>> > +CONFIG_KERNEL_BASE_ADDR=0x80000000 >>>> > +CONFIG_XILINX_MICROBLAZE0_FAMILY="spartan6" >>>> > +CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1 >>>> > +# CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR is not set >>>> > +CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1 >>>> > +CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=1 >>>> > +CONFIG_XILINX_MICROBLAZE0_HW_VER="8.20.a" >>>> > +CONFIG_HZ_100=y >>>> > +CONFIG_MMU=y >>>> > +CONFIG_CMDLINE_BOOL=y >>>> > +CONFIG_CMDLINE_FORCE=y >>>> > +CONFIG_NET=y >>>> > +CONFIG_PACKET=y >>>> > +CONFIG_UNIX=y >>>> > +CONFIG_INET=y >>>> > +# CONFIG_INET_LRO is not set >>>> > +# CONFIG_IPV6 is not set >>>> > +CONFIG_PROC_DEVICETREE=y >>>> > +CONFIG_BLK_DEV_RAM=y >>>> > +CONFIG_BLK_DEV_RAM_SIZE=8192 >>>> > +CONFIG_NETDEVICES=y >>>> > +CONFIG_NET_ETHERNET=y >>>> > +CONFIG_XILINX_EMACLITE=y >>>> > +# CONFIG_INPUT is not set >>>> > +# CONFIG_SERIO is not set >>>> > +# CONFIG_VT is not set >>>> > +CONFIG_SERIAL_UARTLITE=y >>>> > +CONFIG_SERIAL_UARTLITE_CONSOLE=y >>>> > +# CONFIG_HW_RANDOM is not set >>>> > +# CONFIG_HWMON is not set >>>> > +# CONFIG_USB_SUPPORT is not set >>>> > +CONFIG_EXT2_FS=y >>>> > +# CONFIG_DNOTIFY is not set >>>> > +CONFIG_NFS_FS=y >>>> > +CONFIG_NFS_V3=y >>>> > +CONFIG_CIFS=y >>>> > +CONFIG_CIFS_STATS=y >>>> > +CONFIG_CIFS_STATS2=y >>>> > +CONFIG_PARTITION_ADVANCED=y >>>> > +CONFIG_DEBUG_KERNEL=y >>>> > +CONFIG_DETECT_HUNG_TASK=y >>>> > +CONFIG_DEBUG_SLAB=y >>>> > +CONFIG_DEBUG_SPINLOCK=y >>>> > +CONFIG_DEBUG_INFO=y >>>> > +CONFIG_EARLY_PRINTK=y >>>> > +# CONFIG_CRYPTO_ANSI_CPRNG is not set >>>> > diff --git a/configs/spartan6lx9_mb_defconfig >>>> > b/configs/spartan6lx9_mb_defconfig >>>> > new file mode 100644 >>>> > index 0000000..0329bb4 >>>> > --- /dev/null >>>> > +++ b/configs/spartan6lx9_mb_defconfig >>>> > @@ -0,0 +1,17 @@ >>>> > +BR2_microblaze=y >>>> > +BR2_TOOLCHAIN_EXTERNAL=y >>>> > +BR2_TOOLCHAIN_EXTERNAL_PATH="/opt/microblazeel-unknown-linux-gnu/" >>>> > +BR2_TOOLCHAIN_EXTERNAL_CUSTOM_PREFIX="microblazeel-unknown-linux-gnu" >>>> > +BR2_TOOLCHAIN_EXTERNAL_CUSTOM_GLIBC=y >>>> > +BR2_TOOLCHAIN_EXTERNAL_CXX=y >>>> > +BR2_TARGET_GENERIC_HOSTNAME="Microblaze Buildroot" >>>> > +BR2_TARGET_GENERIC_ISSUE="Welcome to Microblaze Buildroot" >>>> > +BR2_TARGET_GENERIC_GETTY_PORT="ttyUL0" >>>> > +# BR2_TARGET_ROOTFS_TAR is not set >>>> > +BR2_TARGET_ROOTFS_INITRAMFS=y >>>> > +BR2_LINUX_KERNEL=y >>>> > +BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y >>>> > >>>> +BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(TOPDIR)/board/relinux/avnet_LX9MicroBoard/lx9_mmu_defconfig" >>>> > >>>> +BR2_LINUX_KERNEL_DTS_FILE="$(TOPDIR)/board/relinux/avnet_LX9MicroBoard/lx9_mmu.dts" >>>> > +BR2_LINUX_KERNEL_IMAGE_TARGET_CUSTOM=y >>>> > +BR2_LINUX_KERNEL_IMAGE_TARGET_NAME="simpleImage.lx9_mmu" >>>> > diff --git a/linux/Config.in b/linux/Config.in >>>> > index 86dc32a..138feb3 100644 >>>> > --- a/linux/Config.in >>>> > +++ b/linux/Config.in >>>> > @@ -120,6 +120,14 @@ config BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE >>>> > help >>>> > Path to the kernel configuration file >>>> > >>>> > +config BR2_LINUX_KERNEL_DTS_FILE >>>> > + string "Device Tree dts file location" >>>> > + depends on BR2_microblaze >>>> > + help >>>> > + Path from where the dts file has to be copied >>>> > + The final "custom target" name depends on the >>>> > + dts file name: >>>> > + <name>.dts --> simpleImage.<name> >>>> > # >>>> > # Binary format >>>> > # >>>> > diff --git a/linux/linux.mk b/linux/linux.mk >>>> > index ae236d4..4a24f18 100644 >>>> > --- a/linux/linux.mk >>>> > +++ b/linux/linux.mk >>>> > @@ -117,6 +117,18 @@ endef >>>> > >>>> > LINUX_POST_PATCH_HOOKS += LINUX_APPLY_PATCHES >>>> > >>>> > +ifeq ($(KERNEL_ARCH),microblaze) >>>> > +# on microblaze, we always want mkimage >>>> > +LINUX_DEPENDENCIES+=host-uboot-tools >>>> > + >>>> > +define LINUX_COPY_DTS >>>> > + if test -f "$(BR2_LINUX_KERNEL_DTS_FILE)" ; then \ >>>> > + cp $(BR2_LINUX_KERNEL_DTS_FILE) >>>> $(@D)/arch/microblaze/boot/dts ; \ >>>> > + else \ >>>> > + echo "Cannot copy dts file!" ; \ >>>> > + fi >>>> > +endef >>>> > +endif >>>> > >>>> > ifeq ($(BR2_LINUX_KERNEL_USE_DEFCONFIG),y) >>>> > KERNEL_SOURCE_CONFIG = $(KERNEL_ARCH_PATH)/configs/$(call >>>> > qstrip,$(BR2_LINUX_KERNEL_DEFCONFIG))_defconfig >>>> > diff --git a/target/Config.in.arch b/target/Config.in.arch >>>> > index 417441d..3a75585 100644 >>>> > --- a/target/Config.in.arch >>>> > +++ b/target/Config.in.arch >>>> > @@ -21,6 +21,8 @@ config BR2_i386 >>>> > config BR2_m68k >>>> > bool "m68k" >>>> > depends on BROKEN # ice in uclibc / inet_ntoa_r >>>> > +config BR2_microblaze >>>> > + bool "microblaze" >>>> > config BR2_mips >>>> > bool "mips" >>>> > config BR2_mipsel >>>> > @@ -508,6 +510,7 @@ config BR2_ARCH >>>> > default "i686" if BR2_x86_athlon >>>> > default "i686" if BR2_x86_athlon_4 >>>> > default "m68k" if BR2_m68k >>>> > + default "microblaze" if BR2_microblaze >>>> > default "mips" if BR2_mips >>>> > default "mipsel" if BR2_mipsel >>>> > default "powerpc" if BR2_powerpc >>>> > @@ -533,7 +536,7 @@ config BR2_ARCH >>>> > >>>> > config BR2_ENDIAN >>>> > string >>>> > - default "LITTLE" if BR2_arm || BR2_bfin || BR2_i386 || >>>> BR2_mipsel || \ >>>> > + default "LITTLE" if BR2_arm || BR2_bfin || BR2_i386 || >>>> BR2_mipsel || >>>> > BR2_microblaze || \ >>>> > BR2_sh3 || BR2_sh4 || BR2_sh4a || BR2_x86_64 || >>>> BR2_sh64 >>>> > default "BIG" if BR2_armeb || BR2_avr32 || BR2_m68k || >>>> BR2_mips || \ >>>> > BR2_powerpc || BR2_sh2 || BR2_sh2a || \ >>>> > @@ -598,6 +601,7 @@ config BR2_GCC_TARGET_TUNE >>>> > default 68030 if BR2_m68k_68030 >>>> > default 68040 if BR2_m68k_68040 >>>> > default 68060 if BR2_m68k_68060 >>>> > + default microblaze if BR2_microblaze >>>> > default mips1 if BR2_mips_1 >>>> > default mips2 if BR2_mips_2 >>>> > default mips3 if BR2_mips_3 >>>> > -- >>>> > 1.7.9 >>>> > >>>> > >>>> > >>>> > 2012/2/11 <buildroot-request@busybox.net> >>>> >> >>>> >> >>>> >> On Saturday 11 February 2012 05:58:37 Spenser Gilliland wrote: >>>> >> > I'm using this Microblaze patch for my project. Will it be part of >>>> >> > the official release that is coming up soon? >>>> >> >>>> >> I'm afraid it got lost between the cracks. Could you repost it? >>>> >> >>>> >> Regards, >>>> >> Arnout >>>> > >>>> > >>>> > >>>> > _______________________________________________ >>>> > buildroot mailing list >>>> > buildroot at busybox.net >>>> > http://lists.busybox.net/mailman/listinfo/buildroot >>>> >>>> >>>> >>>> -- >>>> Spenser Gilliland >>>> Computer Engineer >>>> Illinois Institute of Technology >>>> >>> >>> >>> >>> -- >>> ?lvaro G?mez Machado >>> >>> >> >> >> -- >> ?lvaro G?mez Machado >> >> >> _______________________________________________ >> buildroot mailing list >> buildroot at busybox.net >> http://lists.busybox.net/mailman/listinfo/buildroot >> > -- ?lvaro G?mez Machado -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.busybox.net/pipermail/buildroot/attachments/20120213/b05bc8ff/attachment-0001.html> ^ permalink raw reply [flat|nested] 15+ messages in thread
* [Buildroot] [PATCH] Adding Microblaze support to Buildroot 2012-02-13 19:40 ` Alvaro Gamez @ 2012-02-13 19:46 ` Spenser Gilliland 2012-02-13 19:48 ` Alvaro Gamez 0 siblings, 1 reply; 15+ messages in thread From: Spenser Gilliland @ 2012-02-13 19:46 UTC (permalink / raw) To: buildroot Is there a file named lx9_mmu.dts file in output/build/linux-x.x.x/arch/microblaze/boot/dts/ ? Spenser On Mon, Feb 13, 2012 at 1:40 PM, Alvaro Gamez <alvaro.gamez@hazent.com> wrote: > I checked and this is the content of the config file: > > BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(TOPDIR)/board/avnet/LX9MicroBoard/lx9_mmu_defconfig" > BR2_LINUX_KERNEL_DTS_FILE="$(TOPDIR)/board/avnet/LX9MicroBoard/lx9_mmu.dts" > BR2_LINUX_KERNEL_IMAGE_TARGET_NAME="simpleImage.lx9_mmu" > > so I think there has to be some other thing I'm not aware of. > > > 2012/2/13 Spenser Gilliland <spenser309@gmail.com> >> >> This means that the dts was not copied into the arch/microblaze/boot/dts >> dir or you are not building the correct target. >> >> You need to verify that the BR2_LINUX_KERNEL_DTS_FILE is set to a real >> file and that BR2_LINUX_KERNEL_IMAGE_TARGET_NAME is set to >> simpleImage.$(filename-wo-extension). >> >> IE.? if BR2_LINUX_KERNEL_DTS_FILE = /path/to/dts/xupv5.dts then >> BR2_LINUX_KERNEL_IMAGE_TARGET=simpleImage.xupv5. >> >> Spenser >> >> On Feb 13, 2012 1:14 PM, "Alvaro Gamez" <alvaro.gamez@hazent.com> wrote: >>> >>> Ok, now that I have a little time I'm trying to make it work. >>> >>> I haven't had any problem yet with GCC tune. However, I'm getting the >>> following error while trying to build the kernel >>> >>> make[2]: *** No rule to make target `arch/microblaze/boot/lx9_mmu.dtb', >>> needed by `arch/microblaze/boot/system.dtb'.? Stop. >>> >>> Any idea? >>> >>> Regards >>> >>> >>> 2012/2/13 Alvaro Gamez <alvaro.gamez@hazent.com> >>>> >>>> I am yet to test it. I just found yersterday that buildroot exists :) >>>> >>>> >>>> 2012/2/13 Spenser Gilliland <spenser309@gmail.com> >>>>> >>>>> Alvaro, >>>>> >>>>> Did you have issues with the GCC tune? ?I had to remove that line from >>>>> the original patch. >>>>> >>>>> Spenser >>>>> >>>>> On Sun, Feb 12, 2012 at 5:07 PM, Alvaro Gamez <alvaro.gamez@hazent.com> >>>>> wrote: >>>>> > Hi >>>>> > >>>>> > I am also interested on Microblaze support, hence I rescued the old >>>>> > patch >>>>> > from the archives, merged it against latest git revision and >>>>> > published on >>>>> > github.com/agamez/buildroot >>>>> > >>>>> > I attach the new patch, should apply cleanly to latest version on >>>>> > git. >>>>> > >>>>> > Even though Stephan Hoffmann work is pretty good, I think the path of >>>>> > the >>>>> > new files should be modified from board/relinux/avnet_LX9MicroBoard/ >>>>> > to >>>>> > board/avnet/LX9MicroBoard/ >>>>> > >>>>> > I didn't want to do that myself out of respect for the real author of >>>>> > the >>>>> > patch, since this is merely a repost. >>>>> > >>>>> > Regards, >>>>> > >>>>> > ?lvaro G?mez Machado >>>>> > >>>>> > From f4345407e3f23ebda7d91c53d81413cea51e1381 Mon Sep 17 00:00:00 >>>>> > 2001 >>>>> > From: Stephan Hoffmann <sho@relinux.de> >>>>> > Date: Wed, 23 Nov 2011 11:42:40 +0100 >>>>> > Subject: [PATCH] Added support for the Microblaze soft CPU >>>>> > >>>>> > --- >>>>> > ?board/relinux/avnet_LX9MicroBoard/README?????????? |?? 64 +++++ >>>>> > ?board/relinux/avnet_LX9MicroBoard/TODO???????????? |?? 19 ++ >>>>> > ?board/relinux/avnet_LX9MicroBoard/lx9_mmu.dts????? |? 247 >>>>> > ++++++++++++++++++++ >>>>> > ?.../relinux/avnet_LX9MicroBoard/lx9_mmu_defconfig? |?? 68 ++++++ >>>>> > ?configs/spartan6lx9_mb_defconfig?????????????????? |?? 17 ++ >>>>> > ?linux/Config.in??????????????????????????????????? |??? 8 + >>>>> > ?linux/linux.mk???????????????????????????????????? |?? 12 + >>>>> > ?target/Config.in.arch????????????????????????????? |??? 6 +- >>>>> > ?8 files changed, 440 insertions(+), 1 deletions(-) >>>>> > ?create mode 100644 board/relinux/avnet_LX9MicroBoard/README >>>>> > ?create mode 100644 board/relinux/avnet_LX9MicroBoard/TODO >>>>> > ?create mode 100644 board/relinux/avnet_LX9MicroBoard/lx9_mmu.dts >>>>> > ?create mode 100644 >>>>> > board/relinux/avnet_LX9MicroBoard/lx9_mmu_defconfig >>>>> > ?create mode 100644 configs/spartan6lx9_mb_defconfig >>>>> > >>>>> > diff --git a/board/relinux/avnet_LX9MicroBoard/README >>>>> > b/board/relinux/avnet_LX9MicroBoard/README >>>>> > new file mode 100644 >>>>> > index 0000000..a2e9247 >>>>> > --- /dev/null >>>>> > +++ b/board/relinux/avnet_LX9MicroBoard/README >>>>> > @@ -0,0 +1,64 @@ >>>>> > +This is the buildroot board support for the Avnet Spartan6 LX9 >>>>> > MicroBoard. >>>>> > + >>>>> > +The board can be bought from Avnet or from Trenz for a low prize. >>>>> > + >>>>> > +To run the Linux built with buildroot you have to install the FPGA >>>>> > bitfile >>>>> > +and the u-boot boot loader as described in the totorial available on >>>>> > + >>>>> > +??? http://www.em.avnet.com/s6microboard >>>>> > + >>>>> > +The image file (default name is simpleImage.lx9_mmu.ub) has to be >>>>> > +copied to your tftp folder (often /tftpboot/). >>>>> > + >>>>> > +Sample session: >>>>> > + >>>>> > +SPI Bootloader >>>>> > +Loading binary image >>>>> > +from flash @ address: 00060000 >>>>> > +to RAM address: 83f00000 >>>>> > +Done >>>>> > + >>>>> > + >>>>> > +SDRAM : >>>>> > +??????????????? Icache:ON >>>>> > +??????????????? Dcache:ON >>>>> > +??????? U-Boot Start:0x83f00000 >>>>> > +SF: Got idcode 20 ba 18 10 01 >>>>> > +*** Warning - bad CRC, using default environment >>>>> > + >>>>> > +Net:?? Xilinx_Emaclite >>>>> > +MAC:?? 00:0a:35:00:63:37 >>>>> > +U-BOOT for Avnet-LX9-Microboard-AXI-tiny-13.1 >>>>> > + >>>>> > +BOOTP broadcast 1 >>>>> > +DHCP client bound to address 192.168.11.122 >>>>> > +Hit any key to stop autoboot:? 0 >>>>> > +U-Boot-PetaLinux> tftp simpleImage.lx9_mmu.ub >>>>> > +Using Xilinx_Emaclite device >>>>> > +TFTP from server 192.168.11.10; our IP address is 192.168.11.122 >>>>> > +Filename 't.ub'. >>>>> > +Load address: 0x80002000 >>>>> > +Loading: >>>>> > ################################################################# >>>>> > + >>>>> > ################################################################# >>>>> > + >>>>> > ################################################################# >>>>> > + >>>>> > ################################################################# >>>>> > + >>>>> > ################################################################# >>>>> > +???????? ############################## >>>>> > +done >>>>> > +Bytes transferred = 5207724 (4f76ac hex) >>>>> > +U-Boot-PetaLinux> bootm >>>>> > +## Booting kernel from Legacy Image at 80002000 ... >>>>> > +?? Image Name:?? Linux-3.1.0 >>>>> > +?? Image Type:?? MicroBlaze Linux Kernel Image (uncompressed) >>>>> > +?? Data Size:??? 5207660 Bytes =? 5 MB >>>>> > +?? Load Address: 80000000 >>>>> > +?? Entry Point:? 80000000 >>>>> > +?? Verifying Checksum ... OK >>>>> > +?? Loading Kernel Image ... OK >>>>> > +OK >>>>> > +## Transferring control to Linux (at address 80000000), 0x80000000 >>>>> > ramdisk >>>>> > 0x00000000, FDT 0x00000000... >>>>> > +Early console on uartlite at 0x40600000 >>>>> > +..... boot log skipped >>>>> > + >>>>> > +Welcome to Microblaze Buildroot >>>>> > +Microblaze login: >>>>> > diff --git a/board/relinux/avnet_LX9MicroBoard/TODO >>>>> > b/board/relinux/avnet_LX9MicroBoard/TODO >>>>> > new file mode 100644 >>>>> > index 0000000..ca5ee94 >>>>> > --- /dev/null >>>>> > +++ b/board/relinux/avnet_LX9MicroBoard/TODO >>>>> > @@ -0,0 +1,19 @@ >>>>> > +TODO list for the Spartan LX9 Microboard >>>>> > + >>>>> > +Generate u-boot within buildroot >>>>> > +================================ >>>>> > +Currently, we need to use the u-boot provided by Avnet. >>>>> > + >>>>> > +Provide config files for qemu >>>>> > +============================= >>>>> > + >>>>> > +Generate toolchain >>>>> > +================== >>>>> > +Currently the GNU toolchain provided by Xilinx has to be used. >>>>> > +Xilinx does not provide a toolchain suitable to build a mmu-less >>>>> > +Linux system, but omitting the mmu saved space within the FPGA. >>>>> > + >>>>> > +Bring up mmu-less system >>>>> > +======================== >>>>> > +Hopefully this is easy as soon as we have a working toolchain >>>>> > +with flt support. >>>>> > diff --git a/board/relinux/avnet_LX9MicroBoard/lx9_mmu.dts >>>>> > b/board/relinux/avnet_LX9MicroBoard/lx9_mmu.dts >>>>> > new file mode 100644 >>>>> > index 0000000..8ffedd9 >>>>> > --- /dev/null >>>>> > +++ b/board/relinux/avnet_LX9MicroBoard/lx9_mmu.dts >>>>> > @@ -0,0 +1,247 @@ >>>>> > +/* >>>>> > + * Device Tree Generator version: 1.3 >>>>> > + * >>>>> > + * (C) Copyright 2007-2008 Xilinx, Inc. >>>>> > + * (C) Copyright 2007-2009 Michal Simek >>>>> > + * >>>>> > + * Michal SIMEK <monstr@monstr.eu> >>>>> > + * >>>>> > + * This program is free software; you can redistribute it and/or >>>>> > + * modify it under the terms of the GNU General Public License as >>>>> > + * published by the Free Software Foundation; either version 2 of >>>>> > + * the License, or (at your option) any later version. >>>>> > + * >>>>> > + * This program is distributed in the hope that it will be useful, >>>>> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of >>>>> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the >>>>> > + * GNU General Public License for more details. >>>>> > + * >>>>> > + * You should have received a copy of the GNU General Public License >>>>> > + * along with this program; if not, write to the Free Software >>>>> > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, >>>>> > + * MA 02111-1307 USA >>>>> > + * >>>>> > + * CAUTION: This file is automatically generated by libgen. >>>>> > + * Version: Xilinx EDK 13.2 EDK_O.61xd >>>>> > + * >>>>> > + * XPS project directory: device-tree_bsp_230-orig >>>>> > + */ >>>>> > + >>>>> > +/dts-v1/; >>>>> > +/ { >>>>> > +??? #address-cells = <1>; >>>>> > +??? #size-cells = <1>; >>>>> > +??? compatible = "xlnx,microblaze"; >>>>> > +??? model = "testing"; >>>>> > +??? MCB3_LPDDR: memory at 80000000 { >>>>> > +??????? device_type = "memory"; >>>>> > +??????? reg = < 0x80000000 0x4000000 >; >>>>> > +??? } ; >>>>> > +??? aliases { >>>>> > +??????? ethernet0 = &Ethernet_MAC; >>>>> > +??????? serial0 = &USB_Uart; >>>>> > +??? } ; >>>>> > +??? chosen { >>>>> > +??????? bootargs = "console=ttyUL0"; >>>>> > +??????? linux,stdout-path = "/axi at 0/serial at 40600000"; >>>>> > +??? } ; >>>>> > +??? cpus { >>>>> > +??????? #address-cells = <1>; >>>>> > +??????? #cpus = <0x1>; >>>>> > +??????? #size-cells = <0>; >>>>> > +??????? microblaze_0: cpu at 0 { >>>>> > +??????????? clock-frequency = <66666667>; >>>>> > +??????????? compatible = "xlnx,microblaze-8.20.a"; >>>>> > +??????????? d-cache-baseaddr = <0x80000000>; >>>>> > +??????????? d-cache-highaddr = <0x83ffffff>; >>>>> > +??????????? d-cache-line-size = <0x10>; >>>>> > +??????????? d-cache-size = <0x2000>; >>>>> > +??????????? device_type = "cpu"; >>>>> > +??????????? i-cache-baseaddr = <0x80000000>; >>>>> > +??????????? i-cache-highaddr = <0x83ffffff>; >>>>> > +??????????? i-cache-line-size = <0x10>; >>>>> > +??????????? i-cache-size = <0x2000>; >>>>> > +??????????? model = "microblaze,8.20.a"; >>>>> > +??????????? reg = <0>; >>>>> > +??????????? timebase-frequency = <66666667>; >>>>> > +??????????? xlnx,addr-tag-bits = <0xd>; >>>>> > +??????????? xlnx,allow-dcache-wr = <0x1>; >>>>> > +??????????? xlnx,allow-icache-wr = <0x1>; >>>>> > +??????????? xlnx,area-optimized = <0x0>; >>>>> > +??????????? xlnx,avoid-primitives = <0x0>; >>>>> > +??????????? xlnx,branch-target-cache-size = <0x0>; >>>>> > +??????????? xlnx,cache-byte-size = <0x2000>; >>>>> > +??????????? xlnx,d-axi = <0x1>; >>>>> > +??????????? xlnx,d-lmb = <0x1>; >>>>> > +??????????? xlnx,d-plb = <0x0>; >>>>> > +??????????? xlnx,data-size = <0x20>; >>>>> > +??????????? xlnx,dcache-addr-tag = <0xd>; >>>>> > +??????????? xlnx,dcache-always-used = <0x1>; >>>>> > +??????????? xlnx,dcache-byte-size = <0x2000>; >>>>> > +??????????? xlnx,dcache-data-width = <0x0>; >>>>> > +??????????? xlnx,dcache-force-tag-lutram = <0x0>; >>>>> > +??????????? xlnx,dcache-interface = <0x0>; >>>>> > +??????????? xlnx,dcache-line-len = <0x4>; >>>>> > +??????????? xlnx,dcache-use-fsl = <0x0>; >>>>> > +??????????? xlnx,dcache-use-writeback = <0x0>; >>>>> > +??????????? xlnx,dcache-victims = <0x0>; >>>>> > +??????????? xlnx,debug-enabled = <0x1>; >>>>> > +??????????? xlnx,div-zero-exception = <0x0>; >>>>> > +??????????? xlnx,dynamic-bus-sizing = <0x1>; >>>>> > +??????????? xlnx,ecc-use-ce-exception = <0x0>; >>>>> > +??????????? xlnx,edge-is-positive = <0x1>; >>>>> > +??????????? xlnx,endianness = <0x1>; >>>>> > +??????????? xlnx,family = "spartan6"; >>>>> > +??????????? xlnx,fault-tolerant = <0x0>; >>>>> > +??????????? xlnx,fpu-exception = <0x0>; >>>>> > +??????????? xlnx,freq = <0x3f940ab>; >>>>> > +??????????? xlnx,fsl-data-size = <0x20>; >>>>> > +??????????? xlnx,fsl-exception = <0x0>; >>>>> > +??????????? xlnx,fsl-links = <0x0>; >>>>> > +??????????? xlnx,i-axi = <0x0>; >>>>> > +??????????? xlnx,i-lmb = <0x1>; >>>>> > +??????????? xlnx,i-plb = <0x0>; >>>>> > +??????????? xlnx,icache-always-used = <0x1>; >>>>> > +??????????? xlnx,icache-data-width = <0x0>; >>>>> > +??????????? xlnx,icache-force-tag-lutram = <0x0>; >>>>> > +??????????? xlnx,icache-interface = <0x0>; >>>>> > +??????????? xlnx,icache-line-len = <0x4>; >>>>> > +??????????? xlnx,icache-streams = <0x0>; >>>>> > +??????????? xlnx,icache-use-fsl = <0x0>; >>>>> > +??????????? xlnx,icache-victims = <0x0>; >>>>> > +??????????? xlnx,ill-opcode-exception = <0x0>; >>>>> > +??????????? xlnx,instance = "microblaze_0"; >>>>> > +??????????? xlnx,interconnect = <0x2>; >>>>> > +??????????? xlnx,interconnect-m-axi-dc-aw-register = <0x0>; >>>>> > +??????????? xlnx,interconnect-m-axi-dc-read-issuing = <0x2>; >>>>> > +??????????? xlnx,interconnect-m-axi-dc-w-register = <0x0>; >>>>> > +??????????? xlnx,interconnect-m-axi-dc-write-issuing = <0x20>; >>>>> > +??????????? xlnx,interconnect-m-axi-dp-read-issuing = <0x1>; >>>>> > +??????????? xlnx,interconnect-m-axi-dp-write-issuing = <0x1>; >>>>> > +??????????? xlnx,interconnect-m-axi-ic-read-issuing = <0x2>; >>>>> > +??????????? xlnx,interconnect-m-axi-ip-read-issuing = <0x1>; >>>>> > +??????????? xlnx,interrupt-is-edge = <0x0>; >>>>> > +??????????? xlnx,lockstep-slave = <0x0>; >>>>> > +??????????? xlnx,mmu-dtlb-size = <0x1>; >>>>> > +??????????? xlnx,mmu-itlb-size = <0x1>; >>>>> > +??????????? xlnx,mmu-privileged-instr = <0x0>; >>>>> > +??????????? xlnx,mmu-tlb-access = <0x3>; >>>>> > +??????????? xlnx,mmu-zones = <0x2>; >>>>> > +??????????? xlnx,number-of-pc-brk = <0x1>; >>>>> > +??????????? xlnx,number-of-rd-addr-brk = <0x0>; >>>>> > +??????????? xlnx,number-of-wr-addr-brk = <0x0>; >>>>> > +??????????? xlnx,opcode-0x0-illegal = <0x0>; >>>>> > +??????????? xlnx,optimization = <0x0>; >>>>> > +??????????? xlnx,pvr = <0x0>; >>>>> > +??????????? xlnx,pvr-user1 = <0x0>; >>>>> > +??????????? xlnx,pvr-user2 = <0x0>; >>>>> > +??????????? xlnx,reset-msr = <0x0>; >>>>> > +??????????? xlnx,sco = <0x0>; >>>>> > +??????????? xlnx,stream-interconnect = <0x0>; >>>>> > +??????????? xlnx,unaligned-exceptions = <0x0>; >>>>> > +??????????? xlnx,use-barrel = <0x1>; >>>>> > +??????????? xlnx,use-branch-target-cache = <0x0>; >>>>> > +??????????? xlnx,use-dcache = <0x1>; >>>>> > +??????????? xlnx,use-div = <0x0>; >>>>> > +??????????? xlnx,use-ext-brk = <0x1>; >>>>> > +??????????? xlnx,use-ext-nm-brk = <0x1>; >>>>> > +??????????? xlnx,use-extended-fsl-instr = <0x0>; >>>>> > +??????????? xlnx,use-fpu = <0x0>; >>>>> > +??????????? xlnx,use-hw-mul = <0x1>; >>>>> > +??????????? xlnx,use-icache = <0x1>; >>>>> > +??????????? xlnx,use-interrupt = <0x1>; >>>>> > +??????????? xlnx,use-mmu = <0x3>; >>>>> > +??????????? xlnx,use-msr-instr = <0x1>; >>>>> > +??????????? xlnx,use-pcmp-instr = <0x0>; >>>>> > +??????????? xlnx,use-stack-protection = <0x0>; >>>>> > +??????? } ; >>>>> > +??? } ; >>>>> > +??? axi4lite_0: axi at 0 { >>>>> > +??????? #address-cells = <1>; >>>>> > +??????? #size-cells = <1>; >>>>> > +??????? compatible = "xlnx,axi-interconnect-1.03.a", "simple-bus"; >>>>> > +??????? ranges ; >>>>> > +??????? Ethernet_MAC: ethernet at 40e00000 { >>>>> > +??????????? compatible = "xlnx,axi-ethernetlite-1.00.a", >>>>> > "xlnx,xps-ethernetlite-1.00.a"; >>>>> > +??????????? device_type = "network"; >>>>> > +??????????? interrupt-parent = <µblaze_0_intc>; >>>>> > +??????????? interrupts = < 2 0 >; >>>>> > +??????????? local-mac-address = [ 00 0a 35 aa de 00 ]; >>>>> > +//??????????? phy-handle = <&phy0>; >>>>> > +??????????? reg = < 0x40e00000 0x10000 >; >>>>> > +??????????? xlnx,duplex = <0x1>; >>>>> > +??????????? xlnx,family = "spartan6"; >>>>> > +??????????? xlnx,include-global-buffers = <0x0>; >>>>> > +??????????? xlnx,include-internal-loopback = <0x0>; >>>>> > +??????????? xlnx,include-mdio = <0x1>; >>>>> > +??????????? xlnx,include-phy-constraints = <0x1>; >>>>> > +??????????? xlnx,interconnect-s-axi-read-acceptance = <0x1>; >>>>> > +??????????? xlnx,interconnect-s-axi-write-acceptance = <0x1>; >>>>> > +??????????? xlnx,rx-ping-pong = <0x0>; >>>>> > +??????????? xlnx,s-axi-aclk-period-ps = <0x3a98>; >>>>> > +??????????? xlnx,s-axi-id-width = <0x1>; >>>>> > +??????????? xlnx,s-axi-supports-narrow-burst = <0x0>; >>>>> > +??????????? xlnx,tx-ping-pong = <0x0>; >>>>> > +/* >>>>> > +??????????? mdio { >>>>> > +??????????????? #address-cells = <1>; >>>>> > +??????????????? #size-cells = <0>; >>>>> > +??????????????? phy0: phy at 7 { >>>>> > +??????????????????? compatible = "marvell,88e1111"; >>>>> > +??????????????????? device_type = "ethernet-phy"; >>>>> > +??????????????????? reg = <7>; >>>>> > +??????????????? } ; >>>>> > +??????????? } ; >>>>> > +*/ >>>>> > +??????? } ; >>>>> > +??????? SPI_FLASH: spi at 40a00000 { >>>>> > +??????????? compatible = "xlnx,axi-spi-1.01.a", >>>>> > "xlnx,xps-spi-2.00.a"; >>>>> > +??????????? interrupt-parent = <µblaze_0_intc>; >>>>> > +??????????? interrupts = < 1 2 >; >>>>> > +??????????? reg = < 0x40a00000 0x10000 >; >>>>> > +??????????? xlnx,family = "spartan6"; >>>>> > +??????????? xlnx,fifo-exist = <0x1>; >>>>> > +??????????? xlnx,num-ss-bits = <0x1>; >>>>> > +??????????? xlnx,num-transfer-bits = <0x8>; >>>>> > +??????????? xlnx,sck-ratio = <0x4>; >>>>> > +??????? } ; >>>>> > +??????? USB_Uart: serial at 40600000 { >>>>> > +??????????? clock-frequency = <66666667>; >>>>> > +??????????? compatible = "xlnx,axi-uartlite-1.02.a", >>>>> > "xlnx,xps-uartlite-1.00.a"; >>>>> > +??????????? current-speed = <115200>; >>>>> > +??????????? device_type = "serial"; >>>>> > +??????????? interrupt-parent = <µblaze_0_intc>; >>>>> > +??????????? interrupts = < 3 0 >; >>>>> > +??????????? port-number = <0>; >>>>> > +??????????? reg = < 0x40600000 0x10000 >; >>>>> > +??????????? xlnx,baudrate = <0x1c200>; >>>>> > +??????????? xlnx,data-bits = <0x8>; >>>>> > +??????????? xlnx,family = "spartan6"; >>>>> > +??????????? xlnx,odd-parity = <0x1>; >>>>> > +??????????? xlnx,s-axi-aclk-freq-hz = <0x3f940ab>; >>>>> > +??????????? xlnx,use-parity = <0x0>; >>>>> > +??????? } ; >>>>> > +??????? microblaze_0_intc: interrupt-controller at 41200000 { >>>>> > +??????????? #interrupt-cells = <0x2>; >>>>> > +??????????? compatible = "xlnx,axi-intc-1.01.a", >>>>> > "xlnx,xps-intc-1.00.a"; >>>>> > +??????????? interrupt-controller ; >>>>> > +??????????? reg = < 0x41200000 0x10000 >; >>>>> > +??????????? xlnx,kind-of-intr = <0xc>; >>>>> > +??????????? xlnx,num-intr-inputs = <0x4>; >>>>> > +??????? } ; >>>>> > +??????? system_timer: timer at 41c00000 { >>>>> > +??????????? clock-frequency = <66666667>; >>>>> > +??????????? compatible = "xlnx,axi-timer-1.02.a", >>>>> > "xlnx,xps-timer-1.00.a"; >>>>> > +??????????? interrupt-parent = <µblaze_0_intc>; >>>>> > +??????????? interrupts = < 0 2 >; >>>>> > +??????????? reg = < 0x41c00000 0x10000 >; >>>>> > +??????????? xlnx,count-width = <0x20>; >>>>> > +??????????? xlnx,family = "spartan6"; >>>>> > +??????????? xlnx,gen0-assert = <0x1>; >>>>> > +??????????? xlnx,gen1-assert = <0x1>; >>>>> > +??????????? xlnx,one-timer-only = <0x0>; >>>>> > +??????????? xlnx,trig0-assert = <0x1>; >>>>> > +??????????? xlnx,trig1-assert = <0x1>; >>>>> > +??????? } ; >>>>> > +??? } ; >>>>> > +} ; >>>>> > diff --git a/board/relinux/avnet_LX9MicroBoard/lx9_mmu_defconfig >>>>> > b/board/relinux/avnet_LX9MicroBoard/lx9_mmu_defconfig >>>>> > new file mode 100644 >>>>> > index 0000000..5d01ca0 >>>>> > --- /dev/null >>>>> > +++ b/board/relinux/avnet_LX9MicroBoard/lx9_mmu_defconfig >>>>> > @@ -0,0 +1,68 @@ >>>>> > +CONFIG_EXPERIMENTAL=y >>>>> > +CONFIG_SYSVIPC=y >>>>> > +CONFIG_IKCONFIG=y >>>>> > +CONFIG_IKCONFIG_PROC=y >>>>> > +CONFIG_BLK_DEV_INITRD=y >>>>> > +CONFIG_INITRAMFS_SOURCE="rootfs.cpio" >>>>> > +CONFIG_INITRAMFS_COMPRESSION_GZIP=y >>>>> > +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set >>>>> > +CONFIG_EXPERT=y >>>>> > +CONFIG_KALLSYMS_ALL=y >>>>> > +CONFIG_KALLSYMS_EXTRA_PASS=y >>>>> > +# CONFIG_HOTPLUG is not set >>>>> > +# CONFIG_BASE_FULL is not set >>>>> > +# CONFIG_FUTEX is not set >>>>> > +# CONFIG_EPOLL is not set >>>>> > +# CONFIG_SIGNALFD is not set >>>>> > +# CONFIG_SHMEM is not set >>>>> > +CONFIG_SLAB=y >>>>> > +CONFIG_MODULES=y >>>>> > +CONFIG_MODULE_UNLOAD=y >>>>> > +# CONFIG_BLK_DEV_BSG is not set >>>>> > +# CONFIG_OPT_LIB_ASM is not set >>>>> > +CONFIG_KERNEL_BASE_ADDR=0x80000000 >>>>> > +CONFIG_XILINX_MICROBLAZE0_FAMILY="spartan6" >>>>> > +CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1 >>>>> > +# CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR is not set >>>>> > +CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1 >>>>> > +CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=1 >>>>> > +CONFIG_XILINX_MICROBLAZE0_HW_VER="8.20.a" >>>>> > +CONFIG_HZ_100=y >>>>> > +CONFIG_MMU=y >>>>> > +CONFIG_CMDLINE_BOOL=y >>>>> > +CONFIG_CMDLINE_FORCE=y >>>>> > +CONFIG_NET=y >>>>> > +CONFIG_PACKET=y >>>>> > +CONFIG_UNIX=y >>>>> > +CONFIG_INET=y >>>>> > +# CONFIG_INET_LRO is not set >>>>> > +# CONFIG_IPV6 is not set >>>>> > +CONFIG_PROC_DEVICETREE=y >>>>> > +CONFIG_BLK_DEV_RAM=y >>>>> > +CONFIG_BLK_DEV_RAM_SIZE=8192 >>>>> > +CONFIG_NETDEVICES=y >>>>> > +CONFIG_NET_ETHERNET=y >>>>> > +CONFIG_XILINX_EMACLITE=y >>>>> > +# CONFIG_INPUT is not set >>>>> > +# CONFIG_SERIO is not set >>>>> > +# CONFIG_VT is not set >>>>> > +CONFIG_SERIAL_UARTLITE=y >>>>> > +CONFIG_SERIAL_UARTLITE_CONSOLE=y >>>>> > +# CONFIG_HW_RANDOM is not set >>>>> > +# CONFIG_HWMON is not set >>>>> > +# CONFIG_USB_SUPPORT is not set >>>>> > +CONFIG_EXT2_FS=y >>>>> > +# CONFIG_DNOTIFY is not set >>>>> > +CONFIG_NFS_FS=y >>>>> > +CONFIG_NFS_V3=y >>>>> > +CONFIG_CIFS=y >>>>> > +CONFIG_CIFS_STATS=y >>>>> > +CONFIG_CIFS_STATS2=y >>>>> > +CONFIG_PARTITION_ADVANCED=y >>>>> > +CONFIG_DEBUG_KERNEL=y >>>>> > +CONFIG_DETECT_HUNG_TASK=y >>>>> > +CONFIG_DEBUG_SLAB=y >>>>> > +CONFIG_DEBUG_SPINLOCK=y >>>>> > +CONFIG_DEBUG_INFO=y >>>>> > +CONFIG_EARLY_PRINTK=y >>>>> > +# CONFIG_CRYPTO_ANSI_CPRNG is not set >>>>> > diff --git a/configs/spartan6lx9_mb_defconfig >>>>> > b/configs/spartan6lx9_mb_defconfig >>>>> > new file mode 100644 >>>>> > index 0000000..0329bb4 >>>>> > --- /dev/null >>>>> > +++ b/configs/spartan6lx9_mb_defconfig >>>>> > @@ -0,0 +1,17 @@ >>>>> > +BR2_microblaze=y >>>>> > +BR2_TOOLCHAIN_EXTERNAL=y >>>>> > +BR2_TOOLCHAIN_EXTERNAL_PATH="/opt/microblazeel-unknown-linux-gnu/" >>>>> > >>>>> > +BR2_TOOLCHAIN_EXTERNAL_CUSTOM_PREFIX="microblazeel-unknown-linux-gnu" >>>>> > +BR2_TOOLCHAIN_EXTERNAL_CUSTOM_GLIBC=y >>>>> > +BR2_TOOLCHAIN_EXTERNAL_CXX=y >>>>> > +BR2_TARGET_GENERIC_HOSTNAME="Microblaze Buildroot" >>>>> > +BR2_TARGET_GENERIC_ISSUE="Welcome to Microblaze Buildroot" >>>>> > +BR2_TARGET_GENERIC_GETTY_PORT="ttyUL0" >>>>> > +# BR2_TARGET_ROOTFS_TAR is not set >>>>> > +BR2_TARGET_ROOTFS_INITRAMFS=y >>>>> > +BR2_LINUX_KERNEL=y >>>>> > +BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y >>>>> > >>>>> > +BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(TOPDIR)/board/relinux/avnet_LX9MicroBoard/lx9_mmu_defconfig" >>>>> > >>>>> > +BR2_LINUX_KERNEL_DTS_FILE="$(TOPDIR)/board/relinux/avnet_LX9MicroBoard/lx9_mmu.dts" >>>>> > +BR2_LINUX_KERNEL_IMAGE_TARGET_CUSTOM=y >>>>> > +BR2_LINUX_KERNEL_IMAGE_TARGET_NAME="simpleImage.lx9_mmu" >>>>> > diff --git a/linux/Config.in b/linux/Config.in >>>>> > index 86dc32a..138feb3 100644 >>>>> > --- a/linux/Config.in >>>>> > +++ b/linux/Config.in >>>>> > @@ -120,6 +120,14 @@ config BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE >>>>> > ???? help >>>>> > ???? ? Path to the kernel configuration file >>>>> > >>>>> > +config BR2_LINUX_KERNEL_DTS_FILE >>>>> > +??? string "Device Tree dts file location" >>>>> > +??? depends on BR2_microblaze >>>>> > +??? help >>>>> > +????? Path from where the dts file has to be copied >>>>> > +????? The final "custom target" name depends on the >>>>> > +????? dts file name: >>>>> > +????????? <name>.dts --> simpleImage.<name> >>>>> > ?# >>>>> > ?# Binary format >>>>> > ?# >>>>> > diff --git a/linux/linux.mk b/linux/linux.mk >>>>> > index ae236d4..4a24f18 100644 >>>>> > --- a/linux/linux.mk >>>>> > +++ b/linux/linux.mk >>>>> > @@ -117,6 +117,18 @@ endef >>>>> > >>>>> > ?LINUX_POST_PATCH_HOOKS += LINUX_APPLY_PATCHES >>>>> > >>>>> > +ifeq ($(KERNEL_ARCH),microblaze) >>>>> > +# on microblaze, we always want mkimage >>>>> > +LINUX_DEPENDENCIES+=host-uboot-tools >>>>> > + >>>>> > +define LINUX_COPY_DTS >>>>> > +??? if test -f "$(BR2_LINUX_KERNEL_DTS_FILE)" ; then \ >>>>> > +??????? cp $(BR2_LINUX_KERNEL_DTS_FILE) >>>>> > $(@D)/arch/microblaze/boot/dts ; \ >>>>> > +??? else \ >>>>> > +??????? echo "Cannot copy dts file!" ; \ >>>>> > +??? fi >>>>> > +endef >>>>> > +endif >>>>> > >>>>> > ?ifeq ($(BR2_LINUX_KERNEL_USE_DEFCONFIG),y) >>>>> > ?KERNEL_SOURCE_CONFIG = $(KERNEL_ARCH_PATH)/configs/$(call >>>>> > qstrip,$(BR2_LINUX_KERNEL_DEFCONFIG))_defconfig >>>>> > diff --git a/target/Config.in.arch b/target/Config.in.arch >>>>> > index 417441d..3a75585 100644 >>>>> > --- a/target/Config.in.arch >>>>> > +++ b/target/Config.in.arch >>>>> > @@ -21,6 +21,8 @@ config BR2_i386 >>>>> > ?config BR2_m68k >>>>> > ???? bool "m68k" >>>>> > ???? depends on BROKEN # ice in uclibc / inet_ntoa_r >>>>> > +config BR2_microblaze >>>>> > +??? bool "microblaze" >>>>> > ?config BR2_mips >>>>> > ???? bool "mips" >>>>> > ?config BR2_mipsel >>>>> > @@ -508,6 +510,7 @@ config BR2_ARCH >>>>> > ???? default "i686"??? ??? if BR2_x86_athlon >>>>> > ???? default "i686"??? ??? if BR2_x86_athlon_4 >>>>> > ???? default "m68k"??? ??? if BR2_m68k >>>>> > +??? default "microblaze"??? if BR2_microblaze >>>>> > ???? default "mips"??? ??? if BR2_mips >>>>> > ???? default "mipsel"??? if BR2_mipsel >>>>> > ???? default "powerpc"??? if BR2_powerpc >>>>> > @@ -533,7 +536,7 @@ config BR2_ARCH >>>>> > >>>>> > ?config BR2_ENDIAN >>>>> > ???? string >>>>> > -??? default "LITTLE" if BR2_arm || BR2_bfin || BR2_i386 || >>>>> > BR2_mipsel || \ >>>>> > +??? default "LITTLE" if BR2_arm || BR2_bfin || BR2_i386 || >>>>> > BR2_mipsel || >>>>> > BR2_microblaze || \ >>>>> > ???? ??? ??? ??? BR2_sh3 || BR2_sh4 || BR2_sh4a || BR2_x86_64 || >>>>> > BR2_sh64 >>>>> > ???? default "BIG"??? if BR2_armeb || BR2_avr32 || BR2_m68k || >>>>> > BR2_mips || \ >>>>> > ???? ??? ??? ??? BR2_powerpc || BR2_sh2 || BR2_sh2a || \ >>>>> > @@ -598,6 +601,7 @@ config BR2_GCC_TARGET_TUNE >>>>> > ???? default 68030??? ??? if BR2_m68k_68030 >>>>> > ???? default 68040??? ??? if BR2_m68k_68040 >>>>> > ???? default 68060??? ??? if BR2_m68k_68060 >>>>> > +??? default microblaze??? if BR2_microblaze >>>>> > ???? default mips1??? ??? if BR2_mips_1 >>>>> > ???? default mips2??? ??? if BR2_mips_2 >>>>> > ???? default mips3??? ??? if BR2_mips_3 >>>>> > -- >>>>> > 1.7.9 >>>>> > >>>>> > >>>>> > >>>>> > 2012/2/11 <buildroot-request@busybox.net> >>>>> >> >>>>> >> >>>>> >> On Saturday 11 February 2012 05:58:37 Spenser Gilliland wrote: >>>>> >> > I'm using this Microblaze patch for my project. ?Will it be part >>>>> >> > of >>>>> >> > the official release that is coming up soon? >>>>> >> >>>>> >> ?I'm afraid it got lost between the cracks. ?Could you repost it? >>>>> >> >>>>> >> ?Regards, >>>>> >> ?Arnout >>>>> > >>>>> > >>>>> > >>>>> > _______________________________________________ >>>>> > buildroot mailing list >>>>> > buildroot at busybox.net >>>>> > http://lists.busybox.net/mailman/listinfo/buildroot >>>>> >>>>> >>>>> >>>>> -- >>>>> Spenser Gilliland >>>>> Computer Engineer >>>>> Illinois Institute of Technology >>>> >>>> >>>> >>>> >>>> -- >>>> ?lvaro G?mez Machado >>>> >>> >>> >>> >>> -- >>> ?lvaro G?mez Machado >>> >>> >>> _______________________________________________ >>> buildroot mailing list >>> buildroot at busybox.net >>> http://lists.busybox.net/mailman/listinfo/buildroot > > > > > -- > ?lvaro G?mez Machado > -- Spenser Gilliland Computer Engineer Illinois Institute of Technology ^ permalink raw reply [flat|nested] 15+ messages in thread
* [Buildroot] [PATCH] Adding Microblaze support to Buildroot 2012-02-13 19:46 ` Spenser Gilliland @ 2012-02-13 19:48 ` Alvaro Gamez 2012-02-13 19:51 ` Spenser Gilliland 0 siblings, 1 reply; 15+ messages in thread From: Alvaro Gamez @ 2012-02-13 19:48 UTC (permalink / raw) To: buildroot No, it isn't there. But the refered board/avnet/LX9MicroBoard/lx9_mmu.dts in the config files does exist. I guess something should have copied it there but failed somehow? 2012/2/13 Spenser Gilliland <spenser309@gmail.com> > Is there a file named lx9_mmu.dts file in > output/build/linux-x.x.x/arch/microblaze/boot/dts/ ? > > Spenser > > On Mon, Feb 13, 2012 at 1:40 PM, Alvaro Gamez <alvaro.gamez@hazent.com> > wrote: > > I checked and this is the content of the config file: > > > > > BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(TOPDIR)/board/avnet/LX9MicroBoard/lx9_mmu_defconfig" > > > BR2_LINUX_KERNEL_DTS_FILE="$(TOPDIR)/board/avnet/LX9MicroBoard/lx9_mmu.dts" > > BR2_LINUX_KERNEL_IMAGE_TARGET_NAME="simpleImage.lx9_mmu" > > > > so I think there has to be some other thing I'm not aware of. > > > > > > 2012/2/13 Spenser Gilliland <spenser309@gmail.com> > >> > >> This means that the dts was not copied into the arch/microblaze/boot/dts > >> dir or you are not building the correct target. > >> > >> You need to verify that the BR2_LINUX_KERNEL_DTS_FILE is set to a real > >> file and that BR2_LINUX_KERNEL_IMAGE_TARGET_NAME is set to > >> simpleImage.$(filename-wo-extension). > >> > >> IE. if BR2_LINUX_KERNEL_DTS_FILE = /path/to/dts/xupv5.dts then > >> BR2_LINUX_KERNEL_IMAGE_TARGET=simpleImage.xupv5. > >> > >> Spenser > >> > >> On Feb 13, 2012 1:14 PM, "Alvaro Gamez" <alvaro.gamez@hazent.com> > wrote: > >>> > >>> Ok, now that I have a little time I'm trying to make it work. > >>> > >>> I haven't had any problem yet with GCC tune. However, I'm getting the > >>> following error while trying to build the kernel > >>> > >>> make[2]: *** No rule to make target `arch/microblaze/boot/lx9_mmu.dtb', > >>> needed by `arch/microblaze/boot/system.dtb'. Stop. > >>> > >>> Any idea? > >>> > >>> Regards > >>> > >>> > >>> 2012/2/13 Alvaro Gamez <alvaro.gamez@hazent.com> > >>>> > >>>> I am yet to test it. I just found yersterday that buildroot exists :) > >>>> > >>>> > >>>> 2012/2/13 Spenser Gilliland <spenser309@gmail.com> > >>>>> > >>>>> Alvaro, > >>>>> > >>>>> Did you have issues with the GCC tune? I had to remove that line > from > >>>>> the original patch. > >>>>> > >>>>> Spenser > >>>>> > >>>>> On Sun, Feb 12, 2012 at 5:07 PM, Alvaro Gamez < > alvaro.gamez at hazent.com> > >>>>> wrote: > >>>>> > Hi > >>>>> > > >>>>> > I am also interested on Microblaze support, hence I rescued the old > >>>>> > patch > >>>>> > from the archives, merged it against latest git revision and > >>>>> > published on > >>>>> > github.com/agamez/buildroot > >>>>> > > >>>>> > I attach the new patch, should apply cleanly to latest version on > >>>>> > git. > >>>>> > > >>>>> > Even though Stephan Hoffmann work is pretty good, I think the path > of > >>>>> > the > >>>>> > new files should be modified from > board/relinux/avnet_LX9MicroBoard/ > >>>>> > to > >>>>> > board/avnet/LX9MicroBoard/ > >>>>> > > >>>>> > I didn't want to do that myself out of respect for the real author > of > >>>>> > the > >>>>> > patch, since this is merely a repost. > >>>>> > > >>>>> > Regards, > >>>>> > > >>>>> > ?lvaro G?mez Machado > >>>>> > > >>>>> > From f4345407e3f23ebda7d91c53d81413cea51e1381 Mon Sep 17 00:00:00 > >>>>> > 2001 > >>>>> > From: Stephan Hoffmann <sho@relinux.de> > >>>>> > Date: Wed, 23 Nov 2011 11:42:40 +0100 > >>>>> > Subject: [PATCH] Added support for the Microblaze soft CPU > >>>>> > > >>>>> > --- > >>>>> > board/relinux/avnet_LX9MicroBoard/README | 64 +++++ > >>>>> > board/relinux/avnet_LX9MicroBoard/TODO | 19 ++ > >>>>> > board/relinux/avnet_LX9MicroBoard/lx9_mmu.dts | 247 > >>>>> > ++++++++++++++++++++ > >>>>> > .../relinux/avnet_LX9MicroBoard/lx9_mmu_defconfig | 68 ++++++ > >>>>> > configs/spartan6lx9_mb_defconfig | 17 ++ > >>>>> > linux/Config.in | 8 + > >>>>> > linux/linux.mk | 12 + > >>>>> > target/Config.in.arch | 6 +- > >>>>> > 8 files changed, 440 insertions(+), 1 deletions(-) > >>>>> > create mode 100644 board/relinux/avnet_LX9MicroBoard/README > >>>>> > create mode 100644 board/relinux/avnet_LX9MicroBoard/TODO > >>>>> > create mode 100644 board/relinux/avnet_LX9MicroBoard/lx9_mmu.dts > >>>>> > create mode 100644 > >>>>> > board/relinux/avnet_LX9MicroBoard/lx9_mmu_defconfig > >>>>> > create mode 100644 configs/spartan6lx9_mb_defconfig > >>>>> > > >>>>> > diff --git a/board/relinux/avnet_LX9MicroBoard/README > >>>>> > b/board/relinux/avnet_LX9MicroBoard/README > >>>>> > new file mode 100644 > >>>>> > index 0000000..a2e9247 > >>>>> > --- /dev/null > >>>>> > +++ b/board/relinux/avnet_LX9MicroBoard/README > >>>>> > @@ -0,0 +1,64 @@ > >>>>> > +This is the buildroot board support for the Avnet Spartan6 LX9 > >>>>> > MicroBoard. > >>>>> > + > >>>>> > +The board can be bought from Avnet or from Trenz for a low prize. > >>>>> > + > >>>>> > +To run the Linux built with buildroot you have to install the FPGA > >>>>> > bitfile > >>>>> > +and the u-boot boot loader as described in the totorial available > on > >>>>> > + > >>>>> > + http://www.em.avnet.com/s6microboard > >>>>> > + > >>>>> > +The image file (default name is simpleImage.lx9_mmu.ub) has to be > >>>>> > +copied to your tftp folder (often /tftpboot/). > >>>>> > + > >>>>> > +Sample session: > >>>>> > + > >>>>> > +SPI Bootloader > >>>>> > +Loading binary image > >>>>> > +from flash @ address: 00060000 > >>>>> > +to RAM address: 83f00000 > >>>>> > +Done > >>>>> > + > >>>>> > + > >>>>> > +SDRAM : > >>>>> > + Icache:ON > >>>>> > + Dcache:ON > >>>>> > + U-Boot Start:0x83f00000 > >>>>> > +SF: Got idcode 20 ba 18 10 01 > >>>>> > +*** Warning - bad CRC, using default environment > >>>>> > + > >>>>> > +Net: Xilinx_Emaclite > >>>>> > +MAC: 00:0a:35:00:63:37 > >>>>> > +U-BOOT for Avnet-LX9-Microboard-AXI-tiny-13.1 > >>>>> > + > >>>>> > +BOOTP broadcast 1 > >>>>> > +DHCP client bound to address 192.168.11.122 > >>>>> > +Hit any key to stop autoboot: 0 > >>>>> > +U-Boot-PetaLinux> tftp simpleImage.lx9_mmu.ub > >>>>> > +Using Xilinx_Emaclite device > >>>>> > +TFTP from server 192.168.11.10; our IP address is 192.168.11.122 > >>>>> > +Filename 't.ub'. > >>>>> > +Load address: 0x80002000 > >>>>> > +Loading: > >>>>> > ################################################################# > >>>>> > + > >>>>> > ################################################################# > >>>>> > + > >>>>> > ################################################################# > >>>>> > + > >>>>> > ################################################################# > >>>>> > + > >>>>> > ################################################################# > >>>>> > + ############################## > >>>>> > +done > >>>>> > +Bytes transferred = 5207724 (4f76ac hex) > >>>>> > +U-Boot-PetaLinux> bootm > >>>>> > +## Booting kernel from Legacy Image at 80002000 ... > >>>>> > + Image Name: Linux-3.1.0 > >>>>> > + Image Type: MicroBlaze Linux Kernel Image (uncompressed) > >>>>> > + Data Size: 5207660 Bytes = 5 MB > >>>>> > + Load Address: 80000000 > >>>>> > + Entry Point: 80000000 > >>>>> > + Verifying Checksum ... OK > >>>>> > + Loading Kernel Image ... OK > >>>>> > +OK > >>>>> > +## Transferring control to Linux (at address 80000000), 0x80000000 > >>>>> > ramdisk > >>>>> > 0x00000000, FDT 0x00000000... > >>>>> > +Early console on uartlite at 0x40600000 > >>>>> > +..... boot log skipped > >>>>> > + > >>>>> > +Welcome to Microblaze Buildroot > >>>>> > +Microblaze login: > >>>>> > diff --git a/board/relinux/avnet_LX9MicroBoard/TODO > >>>>> > b/board/relinux/avnet_LX9MicroBoard/TODO > >>>>> > new file mode 100644 > >>>>> > index 0000000..ca5ee94 > >>>>> > --- /dev/null > >>>>> > +++ b/board/relinux/avnet_LX9MicroBoard/TODO > >>>>> > @@ -0,0 +1,19 @@ > >>>>> > +TODO list for the Spartan LX9 Microboard > >>>>> > + > >>>>> > +Generate u-boot within buildroot > >>>>> > +================================ > >>>>> > +Currently, we need to use the u-boot provided by Avnet. > >>>>> > + > >>>>> > +Provide config files for qemu > >>>>> > +============================= > >>>>> > + > >>>>> > +Generate toolchain > >>>>> > +================== > >>>>> > +Currently the GNU toolchain provided by Xilinx has to be used. > >>>>> > +Xilinx does not provide a toolchain suitable to build a mmu-less > >>>>> > +Linux system, but omitting the mmu saved space within the FPGA. > >>>>> > + > >>>>> > +Bring up mmu-less system > >>>>> > +======================== > >>>>> > +Hopefully this is easy as soon as we have a working toolchain > >>>>> > +with flt support. > >>>>> > diff --git a/board/relinux/avnet_LX9MicroBoard/lx9_mmu.dts > >>>>> > b/board/relinux/avnet_LX9MicroBoard/lx9_mmu.dts > >>>>> > new file mode 100644 > >>>>> > index 0000000..8ffedd9 > >>>>> > --- /dev/null > >>>>> > +++ b/board/relinux/avnet_LX9MicroBoard/lx9_mmu.dts > >>>>> > @@ -0,0 +1,247 @@ > >>>>> > +/* > >>>>> > + * Device Tree Generator version: 1.3 > >>>>> > + * > >>>>> > + * (C) Copyright 2007-2008 Xilinx, Inc. > >>>>> > + * (C) Copyright 2007-2009 Michal Simek > >>>>> > + * > >>>>> > + * Michal SIMEK <monstr@monstr.eu> > >>>>> > + * > >>>>> > + * This program is free software; you can redistribute it and/or > >>>>> > + * modify it under the terms of the GNU General Public License as > >>>>> > + * published by the Free Software Foundation; either version 2 of > >>>>> > + * the License, or (at your option) any later version. > >>>>> > + * > >>>>> > + * This program is distributed in the hope that it will be useful, > >>>>> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > >>>>> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > >>>>> > + * GNU General Public License for more details. > >>>>> > + * > >>>>> > + * You should have received a copy of the GNU General Public > License > >>>>> > + * along with this program; if not, write to the Free Software > >>>>> > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, > >>>>> > + * MA 02111-1307 USA > >>>>> > + * > >>>>> > + * CAUTION: This file is automatically generated by libgen. > >>>>> > + * Version: Xilinx EDK 13.2 EDK_O.61xd > >>>>> > + * > >>>>> > + * XPS project directory: device-tree_bsp_230-orig > >>>>> > + */ > >>>>> > + > >>>>> > +/dts-v1/; > >>>>> > +/ { > >>>>> > + #address-cells = <1>; > >>>>> > + #size-cells = <1>; > >>>>> > + compatible = "xlnx,microblaze"; > >>>>> > + model = "testing"; > >>>>> > + MCB3_LPDDR: memory at 80000000 { > >>>>> > + device_type = "memory"; > >>>>> > + reg = < 0x80000000 0x4000000 >; > >>>>> > + } ; > >>>>> > + aliases { > >>>>> > + ethernet0 = &Ethernet_MAC; > >>>>> > + serial0 = &USB_Uart; > >>>>> > + } ; > >>>>> > + chosen { > >>>>> > + bootargs = "console=ttyUL0"; > >>>>> > + linux,stdout-path = "/axi at 0/serial at 40600000"; > >>>>> > + } ; > >>>>> > + cpus { > >>>>> > + #address-cells = <1>; > >>>>> > + #cpus = <0x1>; > >>>>> > + #size-cells = <0>; > >>>>> > + microblaze_0: cpu at 0 { > >>>>> > + clock-frequency = <66666667>; > >>>>> > + compatible = "xlnx,microblaze-8.20.a"; > >>>>> > + d-cache-baseaddr = <0x80000000>; > >>>>> > + d-cache-highaddr = <0x83ffffff>; > >>>>> > + d-cache-line-size = <0x10>; > >>>>> > + d-cache-size = <0x2000>; > >>>>> > + device_type = "cpu"; > >>>>> > + i-cache-baseaddr = <0x80000000>; > >>>>> > + i-cache-highaddr = <0x83ffffff>; > >>>>> > + i-cache-line-size = <0x10>; > >>>>> > + i-cache-size = <0x2000>; > >>>>> > + model = "microblaze,8.20.a"; > >>>>> > + reg = <0>; > >>>>> > + timebase-frequency = <66666667>; > >>>>> > + xlnx,addr-tag-bits = <0xd>; > >>>>> > + xlnx,allow-dcache-wr = <0x1>; > >>>>> > + xlnx,allow-icache-wr = <0x1>; > >>>>> > + xlnx,area-optimized = <0x0>; > >>>>> > + xlnx,avoid-primitives = <0x0>; > >>>>> > + xlnx,branch-target-cache-size = <0x0>; > >>>>> > + xlnx,cache-byte-size = <0x2000>; > >>>>> > + xlnx,d-axi = <0x1>; > >>>>> > + xlnx,d-lmb = <0x1>; > >>>>> > + xlnx,d-plb = <0x0>; > >>>>> > + xlnx,data-size = <0x20>; > >>>>> > + xlnx,dcache-addr-tag = <0xd>; > >>>>> > + xlnx,dcache-always-used = <0x1>; > >>>>> > + xlnx,dcache-byte-size = <0x2000>; > >>>>> > + xlnx,dcache-data-width = <0x0>; > >>>>> > + xlnx,dcache-force-tag-lutram = <0x0>; > >>>>> > + xlnx,dcache-interface = <0x0>; > >>>>> > + xlnx,dcache-line-len = <0x4>; > >>>>> > + xlnx,dcache-use-fsl = <0x0>; > >>>>> > + xlnx,dcache-use-writeback = <0x0>; > >>>>> > + xlnx,dcache-victims = <0x0>; > >>>>> > + xlnx,debug-enabled = <0x1>; > >>>>> > + xlnx,div-zero-exception = <0x0>; > >>>>> > + xlnx,dynamic-bus-sizing = <0x1>; > >>>>> > + xlnx,ecc-use-ce-exception = <0x0>; > >>>>> > + xlnx,edge-is-positive = <0x1>; > >>>>> > + xlnx,endianness = <0x1>; > >>>>> > + xlnx,family = "spartan6"; > >>>>> > + xlnx,fault-tolerant = <0x0>; > >>>>> > + xlnx,fpu-exception = <0x0>; > >>>>> > + xlnx,freq = <0x3f940ab>; > >>>>> > + xlnx,fsl-data-size = <0x20>; > >>>>> > + xlnx,fsl-exception = <0x0>; > >>>>> > + xlnx,fsl-links = <0x0>; > >>>>> > + xlnx,i-axi = <0x0>; > >>>>> > + xlnx,i-lmb = <0x1>; > >>>>> > + xlnx,i-plb = <0x0>; > >>>>> > + xlnx,icache-always-used = <0x1>; > >>>>> > + xlnx,icache-data-width = <0x0>; > >>>>> > + xlnx,icache-force-tag-lutram = <0x0>; > >>>>> > + xlnx,icache-interface = <0x0>; > >>>>> > + xlnx,icache-line-len = <0x4>; > >>>>> > + xlnx,icache-streams = <0x0>; > >>>>> > + xlnx,icache-use-fsl = <0x0>; > >>>>> > + xlnx,icache-victims = <0x0>; > >>>>> > + xlnx,ill-opcode-exception = <0x0>; > >>>>> > + xlnx,instance = "microblaze_0"; > >>>>> > + xlnx,interconnect = <0x2>; > >>>>> > + xlnx,interconnect-m-axi-dc-aw-register = <0x0>; > >>>>> > + xlnx,interconnect-m-axi-dc-read-issuing = <0x2>; > >>>>> > + xlnx,interconnect-m-axi-dc-w-register = <0x0>; > >>>>> > + xlnx,interconnect-m-axi-dc-write-issuing = <0x20>; > >>>>> > + xlnx,interconnect-m-axi-dp-read-issuing = <0x1>; > >>>>> > + xlnx,interconnect-m-axi-dp-write-issuing = <0x1>; > >>>>> > + xlnx,interconnect-m-axi-ic-read-issuing = <0x2>; > >>>>> > + xlnx,interconnect-m-axi-ip-read-issuing = <0x1>; > >>>>> > + xlnx,interrupt-is-edge = <0x0>; > >>>>> > + xlnx,lockstep-slave = <0x0>; > >>>>> > + xlnx,mmu-dtlb-size = <0x1>; > >>>>> > + xlnx,mmu-itlb-size = <0x1>; > >>>>> > + xlnx,mmu-privileged-instr = <0x0>; > >>>>> > + xlnx,mmu-tlb-access = <0x3>; > >>>>> > + xlnx,mmu-zones = <0x2>; > >>>>> > + xlnx,number-of-pc-brk = <0x1>; > >>>>> > + xlnx,number-of-rd-addr-brk = <0x0>; > >>>>> > + xlnx,number-of-wr-addr-brk = <0x0>; > >>>>> > + xlnx,opcode-0x0-illegal = <0x0>; > >>>>> > + xlnx,optimization = <0x0>; > >>>>> > + xlnx,pvr = <0x0>; > >>>>> > + xlnx,pvr-user1 = <0x0>; > >>>>> > + xlnx,pvr-user2 = <0x0>; > >>>>> > + xlnx,reset-msr = <0x0>; > >>>>> > + xlnx,sco = <0x0>; > >>>>> > + xlnx,stream-interconnect = <0x0>; > >>>>> > + xlnx,unaligned-exceptions = <0x0>; > >>>>> > + xlnx,use-barrel = <0x1>; > >>>>> > + xlnx,use-branch-target-cache = <0x0>; > >>>>> > + xlnx,use-dcache = <0x1>; > >>>>> > + xlnx,use-div = <0x0>; > >>>>> > + xlnx,use-ext-brk = <0x1>; > >>>>> > + xlnx,use-ext-nm-brk = <0x1>; > >>>>> > + xlnx,use-extended-fsl-instr = <0x0>; > >>>>> > + xlnx,use-fpu = <0x0>; > >>>>> > + xlnx,use-hw-mul = <0x1>; > >>>>> > + xlnx,use-icache = <0x1>; > >>>>> > + xlnx,use-interrupt = <0x1>; > >>>>> > + xlnx,use-mmu = <0x3>; > >>>>> > + xlnx,use-msr-instr = <0x1>; > >>>>> > + xlnx,use-pcmp-instr = <0x0>; > >>>>> > + xlnx,use-stack-protection = <0x0>; > >>>>> > + } ; > >>>>> > + } ; > >>>>> > + axi4lite_0: axi at 0 { > >>>>> > + #address-cells = <1>; > >>>>> > + #size-cells = <1>; > >>>>> > + compatible = "xlnx,axi-interconnect-1.03.a", "simple-bus"; > >>>>> > + ranges ; > >>>>> > + Ethernet_MAC: ethernet at 40e00000 { > >>>>> > + compatible = "xlnx,axi-ethernetlite-1.00.a", > >>>>> > "xlnx,xps-ethernetlite-1.00.a"; > >>>>> > + device_type = "network"; > >>>>> > + interrupt-parent = <µblaze_0_intc>; > >>>>> > + interrupts = < 2 0 >; > >>>>> > + local-mac-address = [ 00 0a 35 aa de 00 ]; > >>>>> > +// phy-handle = <&phy0>; > >>>>> > + reg = < 0x40e00000 0x10000 >; > >>>>> > + xlnx,duplex = <0x1>; > >>>>> > + xlnx,family = "spartan6"; > >>>>> > + xlnx,include-global-buffers = <0x0>; > >>>>> > + xlnx,include-internal-loopback = <0x0>; > >>>>> > + xlnx,include-mdio = <0x1>; > >>>>> > + xlnx,include-phy-constraints = <0x1>; > >>>>> > + xlnx,interconnect-s-axi-read-acceptance = <0x1>; > >>>>> > + xlnx,interconnect-s-axi-write-acceptance = <0x1>; > >>>>> > + xlnx,rx-ping-pong = <0x0>; > >>>>> > + xlnx,s-axi-aclk-period-ps = <0x3a98>; > >>>>> > + xlnx,s-axi-id-width = <0x1>; > >>>>> > + xlnx,s-axi-supports-narrow-burst = <0x0>; > >>>>> > + xlnx,tx-ping-pong = <0x0>; > >>>>> > +/* > >>>>> > + mdio { > >>>>> > + #address-cells = <1>; > >>>>> > + #size-cells = <0>; > >>>>> > + phy0: phy at 7 { > >>>>> > + compatible = "marvell,88e1111"; > >>>>> > + device_type = "ethernet-phy"; > >>>>> > + reg = <7>; > >>>>> > + } ; > >>>>> > + } ; > >>>>> > +*/ > >>>>> > + } ; > >>>>> > + SPI_FLASH: spi at 40a00000 { > >>>>> > + compatible = "xlnx,axi-spi-1.01.a", > >>>>> > "xlnx,xps-spi-2.00.a"; > >>>>> > + interrupt-parent = <µblaze_0_intc>; > >>>>> > + interrupts = < 1 2 >; > >>>>> > + reg = < 0x40a00000 0x10000 >; > >>>>> > + xlnx,family = "spartan6"; > >>>>> > + xlnx,fifo-exist = <0x1>; > >>>>> > + xlnx,num-ss-bits = <0x1>; > >>>>> > + xlnx,num-transfer-bits = <0x8>; > >>>>> > + xlnx,sck-ratio = <0x4>; > >>>>> > + } ; > >>>>> > + USB_Uart: serial at 40600000 { > >>>>> > + clock-frequency = <66666667>; > >>>>> > + compatible = "xlnx,axi-uartlite-1.02.a", > >>>>> > "xlnx,xps-uartlite-1.00.a"; > >>>>> > + current-speed = <115200>; > >>>>> > + device_type = "serial"; > >>>>> > + interrupt-parent = <µblaze_0_intc>; > >>>>> > + interrupts = < 3 0 >; > >>>>> > + port-number = <0>; > >>>>> > + reg = < 0x40600000 0x10000 >; > >>>>> > + xlnx,baudrate = <0x1c200>; > >>>>> > + xlnx,data-bits = <0x8>; > >>>>> > + xlnx,family = "spartan6"; > >>>>> > + xlnx,odd-parity = <0x1>; > >>>>> > + xlnx,s-axi-aclk-freq-hz = <0x3f940ab>; > >>>>> > + xlnx,use-parity = <0x0>; > >>>>> > + } ; > >>>>> > + microblaze_0_intc: interrupt-controller at 41200000 { > >>>>> > + #interrupt-cells = <0x2>; > >>>>> > + compatible = "xlnx,axi-intc-1.01.a", > >>>>> > "xlnx,xps-intc-1.00.a"; > >>>>> > + interrupt-controller ; > >>>>> > + reg = < 0x41200000 0x10000 >; > >>>>> > + xlnx,kind-of-intr = <0xc>; > >>>>> > + xlnx,num-intr-inputs = <0x4>; > >>>>> > + } ; > >>>>> > + system_timer: timer at 41c00000 { > >>>>> > + clock-frequency = <66666667>; > >>>>> > + compatible = "xlnx,axi-timer-1.02.a", > >>>>> > "xlnx,xps-timer-1.00.a"; > >>>>> > + interrupt-parent = <µblaze_0_intc>; > >>>>> > + interrupts = < 0 2 >; > >>>>> > + reg = < 0x41c00000 0x10000 >; > >>>>> > + xlnx,count-width = <0x20>; > >>>>> > + xlnx,family = "spartan6"; > >>>>> > + xlnx,gen0-assert = <0x1>; > >>>>> > + xlnx,gen1-assert = <0x1>; > >>>>> > + xlnx,one-timer-only = <0x0>; > >>>>> > + xlnx,trig0-assert = <0x1>; > >>>>> > + xlnx,trig1-assert = <0x1>; > >>>>> > + } ; > >>>>> > + } ; > >>>>> > +} ; > >>>>> > diff --git a/board/relinux/avnet_LX9MicroBoard/lx9_mmu_defconfig > >>>>> > b/board/relinux/avnet_LX9MicroBoard/lx9_mmu_defconfig > >>>>> > new file mode 100644 > >>>>> > index 0000000..5d01ca0 > >>>>> > --- /dev/null > >>>>> > +++ b/board/relinux/avnet_LX9MicroBoard/lx9_mmu_defconfig > >>>>> > @@ -0,0 +1,68 @@ > >>>>> > +CONFIG_EXPERIMENTAL=y > >>>>> > +CONFIG_SYSVIPC=y > >>>>> > +CONFIG_IKCONFIG=y > >>>>> > +CONFIG_IKCONFIG_PROC=y > >>>>> > +CONFIG_BLK_DEV_INITRD=y > >>>>> > +CONFIG_INITRAMFS_SOURCE="rootfs.cpio" > >>>>> > +CONFIG_INITRAMFS_COMPRESSION_GZIP=y > >>>>> > +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set > >>>>> > +CONFIG_EXPERT=y > >>>>> > +CONFIG_KALLSYMS_ALL=y > >>>>> > +CONFIG_KALLSYMS_EXTRA_PASS=y > >>>>> > +# CONFIG_HOTPLUG is not set > >>>>> > +# CONFIG_BASE_FULL is not set > >>>>> > +# CONFIG_FUTEX is not set > >>>>> > +# CONFIG_EPOLL is not set > >>>>> > +# CONFIG_SIGNALFD is not set > >>>>> > +# CONFIG_SHMEM is not set > >>>>> > +CONFIG_SLAB=y > >>>>> > +CONFIG_MODULES=y > >>>>> > +CONFIG_MODULE_UNLOAD=y > >>>>> > +# CONFIG_BLK_DEV_BSG is not set > >>>>> > +# CONFIG_OPT_LIB_ASM is not set > >>>>> > +CONFIG_KERNEL_BASE_ADDR=0x80000000 > >>>>> > +CONFIG_XILINX_MICROBLAZE0_FAMILY="spartan6" > >>>>> > +CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1 > >>>>> > +# CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR is not set > >>>>> > +CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1 > >>>>> > +CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=1 > >>>>> > +CONFIG_XILINX_MICROBLAZE0_HW_VER="8.20.a" > >>>>> > +CONFIG_HZ_100=y > >>>>> > +CONFIG_MMU=y > >>>>> > +CONFIG_CMDLINE_BOOL=y > >>>>> > +CONFIG_CMDLINE_FORCE=y > >>>>> > +CONFIG_NET=y > >>>>> > +CONFIG_PACKET=y > >>>>> > +CONFIG_UNIX=y > >>>>> > +CONFIG_INET=y > >>>>> > +# CONFIG_INET_LRO is not set > >>>>> > +# CONFIG_IPV6 is not set > >>>>> > +CONFIG_PROC_DEVICETREE=y > >>>>> > +CONFIG_BLK_DEV_RAM=y > >>>>> > +CONFIG_BLK_DEV_RAM_SIZE=8192 > >>>>> > +CONFIG_NETDEVICES=y > >>>>> > +CONFIG_NET_ETHERNET=y > >>>>> > +CONFIG_XILINX_EMACLITE=y > >>>>> > +# CONFIG_INPUT is not set > >>>>> > +# CONFIG_SERIO is not set > >>>>> > +# CONFIG_VT is not set > >>>>> > +CONFIG_SERIAL_UARTLITE=y > >>>>> > +CONFIG_SERIAL_UARTLITE_CONSOLE=y > >>>>> > +# CONFIG_HW_RANDOM is not set > >>>>> > +# CONFIG_HWMON is not set > >>>>> > +# CONFIG_USB_SUPPORT is not set > >>>>> > +CONFIG_EXT2_FS=y > >>>>> > +# CONFIG_DNOTIFY is not set > >>>>> > +CONFIG_NFS_FS=y > >>>>> > +CONFIG_NFS_V3=y > >>>>> > +CONFIG_CIFS=y > >>>>> > +CONFIG_CIFS_STATS=y > >>>>> > +CONFIG_CIFS_STATS2=y > >>>>> > +CONFIG_PARTITION_ADVANCED=y > >>>>> > +CONFIG_DEBUG_KERNEL=y > >>>>> > +CONFIG_DETECT_HUNG_TASK=y > >>>>> > +CONFIG_DEBUG_SLAB=y > >>>>> > +CONFIG_DEBUG_SPINLOCK=y > >>>>> > +CONFIG_DEBUG_INFO=y > >>>>> > +CONFIG_EARLY_PRINTK=y > >>>>> > +# CONFIG_CRYPTO_ANSI_CPRNG is not set > >>>>> > diff --git a/configs/spartan6lx9_mb_defconfig > >>>>> > b/configs/spartan6lx9_mb_defconfig > >>>>> > new file mode 100644 > >>>>> > index 0000000..0329bb4 > >>>>> > --- /dev/null > >>>>> > +++ b/configs/spartan6lx9_mb_defconfig > >>>>> > @@ -0,0 +1,17 @@ > >>>>> > +BR2_microblaze=y > >>>>> > +BR2_TOOLCHAIN_EXTERNAL=y > >>>>> > +BR2_TOOLCHAIN_EXTERNAL_PATH="/opt/microblazeel-unknown-linux-gnu/" > >>>>> > > >>>>> > > +BR2_TOOLCHAIN_EXTERNAL_CUSTOM_PREFIX="microblazeel-unknown-linux-gnu" > >>>>> > +BR2_TOOLCHAIN_EXTERNAL_CUSTOM_GLIBC=y > >>>>> > +BR2_TOOLCHAIN_EXTERNAL_CXX=y > >>>>> > +BR2_TARGET_GENERIC_HOSTNAME="Microblaze Buildroot" > >>>>> > +BR2_TARGET_GENERIC_ISSUE="Welcome to Microblaze Buildroot" > >>>>> > +BR2_TARGET_GENERIC_GETTY_PORT="ttyUL0" > >>>>> > +# BR2_TARGET_ROOTFS_TAR is not set > >>>>> > +BR2_TARGET_ROOTFS_INITRAMFS=y > >>>>> > +BR2_LINUX_KERNEL=y > >>>>> > +BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y > >>>>> > > >>>>> > > +BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(TOPDIR)/board/relinux/avnet_LX9MicroBoard/lx9_mmu_defconfig" > >>>>> > > >>>>> > > +BR2_LINUX_KERNEL_DTS_FILE="$(TOPDIR)/board/relinux/avnet_LX9MicroBoard/lx9_mmu.dts" > >>>>> > +BR2_LINUX_KERNEL_IMAGE_TARGET_CUSTOM=y > >>>>> > +BR2_LINUX_KERNEL_IMAGE_TARGET_NAME="simpleImage.lx9_mmu" > >>>>> > diff --git a/linux/Config.in b/linux/Config.in > >>>>> > index 86dc32a..138feb3 100644 > >>>>> > --- a/linux/Config.in > >>>>> > +++ b/linux/Config.in > >>>>> > @@ -120,6 +120,14 @@ config BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE > >>>>> > help > >>>>> > Path to the kernel configuration file > >>>>> > > >>>>> > +config BR2_LINUX_KERNEL_DTS_FILE > >>>>> > + string "Device Tree dts file location" > >>>>> > + depends on BR2_microblaze > >>>>> > + help > >>>>> > + Path from where the dts file has to be copied > >>>>> > + The final "custom target" name depends on the > >>>>> > + dts file name: > >>>>> > + <name>.dts --> simpleImage.<name> > >>>>> > # > >>>>> > # Binary format > >>>>> > # > >>>>> > diff --git a/linux/linux.mk b/linux/linux.mk > >>>>> > index ae236d4..4a24f18 100644 > >>>>> > --- a/linux/linux.mk > >>>>> > +++ b/linux/linux.mk > >>>>> > @@ -117,6 +117,18 @@ endef > >>>>> > > >>>>> > LINUX_POST_PATCH_HOOKS += LINUX_APPLY_PATCHES > >>>>> > > >>>>> > +ifeq ($(KERNEL_ARCH),microblaze) > >>>>> > +# on microblaze, we always want mkimage > >>>>> > +LINUX_DEPENDENCIES+=host-uboot-tools > >>>>> > + > >>>>> > +define LINUX_COPY_DTS > >>>>> > + if test -f "$(BR2_LINUX_KERNEL_DTS_FILE)" ; then \ > >>>>> > + cp $(BR2_LINUX_KERNEL_DTS_FILE) > >>>>> > $(@D)/arch/microblaze/boot/dts ; \ > >>>>> > + else \ > >>>>> > + echo "Cannot copy dts file!" ; \ > >>>>> > + fi > >>>>> > +endef > >>>>> > +endif > >>>>> > > >>>>> > ifeq ($(BR2_LINUX_KERNEL_USE_DEFCONFIG),y) > >>>>> > KERNEL_SOURCE_CONFIG = $(KERNEL_ARCH_PATH)/configs/$(call > >>>>> > qstrip,$(BR2_LINUX_KERNEL_DEFCONFIG))_defconfig > >>>>> > diff --git a/target/Config.in.arch b/target/Config.in.arch > >>>>> > index 417441d..3a75585 100644 > >>>>> > --- a/target/Config.in.arch > >>>>> > +++ b/target/Config.in.arch > >>>>> > @@ -21,6 +21,8 @@ config BR2_i386 > >>>>> > config BR2_m68k > >>>>> > bool "m68k" > >>>>> > depends on BROKEN # ice in uclibc / inet_ntoa_r > >>>>> > +config BR2_microblaze > >>>>> > + bool "microblaze" > >>>>> > config BR2_mips > >>>>> > bool "mips" > >>>>> > config BR2_mipsel > >>>>> > @@ -508,6 +510,7 @@ config BR2_ARCH > >>>>> > default "i686" if BR2_x86_athlon > >>>>> > default "i686" if BR2_x86_athlon_4 > >>>>> > default "m68k" if BR2_m68k > >>>>> > + default "microblaze" if BR2_microblaze > >>>>> > default "mips" if BR2_mips > >>>>> > default "mipsel" if BR2_mipsel > >>>>> > default "powerpc" if BR2_powerpc > >>>>> > @@ -533,7 +536,7 @@ config BR2_ARCH > >>>>> > > >>>>> > config BR2_ENDIAN > >>>>> > string > >>>>> > - default "LITTLE" if BR2_arm || BR2_bfin || BR2_i386 || > >>>>> > BR2_mipsel || \ > >>>>> > + default "LITTLE" if BR2_arm || BR2_bfin || BR2_i386 || > >>>>> > BR2_mipsel || > >>>>> > BR2_microblaze || \ > >>>>> > BR2_sh3 || BR2_sh4 || BR2_sh4a || BR2_x86_64 || > >>>>> > BR2_sh64 > >>>>> > default "BIG" if BR2_armeb || BR2_avr32 || BR2_m68k || > >>>>> > BR2_mips || \ > >>>>> > BR2_powerpc || BR2_sh2 || BR2_sh2a || \ > >>>>> > @@ -598,6 +601,7 @@ config BR2_GCC_TARGET_TUNE > >>>>> > default 68030 if BR2_m68k_68030 > >>>>> > default 68040 if BR2_m68k_68040 > >>>>> > default 68060 if BR2_m68k_68060 > >>>>> > + default microblaze if BR2_microblaze > >>>>> > default mips1 if BR2_mips_1 > >>>>> > default mips2 if BR2_mips_2 > >>>>> > default mips3 if BR2_mips_3 > >>>>> > -- > >>>>> > 1.7.9 > >>>>> > > >>>>> > > >>>>> > > >>>>> > 2012/2/11 <buildroot-request@busybox.net> > >>>>> >> > >>>>> >> > >>>>> >> On Saturday 11 February 2012 05:58:37 Spenser Gilliland wrote: > >>>>> >> > I'm using this Microblaze patch for my project. Will it be part > >>>>> >> > of > >>>>> >> > the official release that is coming up soon? > >>>>> >> > >>>>> >> I'm afraid it got lost between the cracks. Could you repost it? > >>>>> >> > >>>>> >> Regards, > >>>>> >> Arnout > >>>>> > > >>>>> > > >>>>> > > >>>>> > _______________________________________________ > >>>>> > buildroot mailing list > >>>>> > buildroot at busybox.net > >>>>> > http://lists.busybox.net/mailman/listinfo/buildroot > >>>>> > >>>>> > >>>>> > >>>>> -- > >>>>> Spenser Gilliland > >>>>> Computer Engineer > >>>>> Illinois Institute of Technology > >>>> > >>>> > >>>> > >>>> > >>>> -- > >>>> ?lvaro G?mez Machado > >>>> > >>> > >>> > >>> > >>> -- > >>> ?lvaro G?mez Machado > >>> > >>> > >>> _______________________________________________ > >>> buildroot mailing list > >>> buildroot at busybox.net > >>> http://lists.busybox.net/mailman/listinfo/buildroot > > > > > > > > > > -- > > ?lvaro G?mez Machado > > > > > > -- > Spenser Gilliland > Computer Engineer > Illinois Institute of Technology > -- ?lvaro G?mez Machado -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.busybox.net/pipermail/buildroot/attachments/20120213/81a1e123/attachment-0001.html> ^ permalink raw reply [flat|nested] 15+ messages in thread
* [Buildroot] [PATCH] Adding Microblaze support to Buildroot 2012-02-13 19:48 ` Alvaro Gamez @ 2012-02-13 19:51 ` Spenser Gilliland 2012-02-13 20:11 ` Alvaro Gamez 0 siblings, 1 reply; 15+ messages in thread From: Spenser Gilliland @ 2012-02-13 19:51 UTC (permalink / raw) To: buildroot It should be copied by the LINUX_COPY_DTS routine in linux/linux.mk that was added by the patch. Is there a line "Cannot copy dts file!" in the build output? Spenser On Mon, Feb 13, 2012 at 1:48 PM, Alvaro Gamez <alvaro.gamez@hazent.com> wrote: > No, it isn't there. > > But the refered board/avnet/LX9MicroBoard/lx9_mmu.dts in the config files > does exist. I guess something should have copied it there but failed > somehow? > > > 2012/2/13 Spenser Gilliland <spenser309@gmail.com> >> >> Is there a file named lx9_mmu.dts file in >> output/build/linux-x.x.x/arch/microblaze/boot/dts/ ? >> >> Spenser >> >> On Mon, Feb 13, 2012 at 1:40 PM, Alvaro Gamez <alvaro.gamez@hazent.com> >> wrote: >> > I checked and this is the content of the config file: >> > >> > >> > BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(TOPDIR)/board/avnet/LX9MicroBoard/lx9_mmu_defconfig" >> > >> > BR2_LINUX_KERNEL_DTS_FILE="$(TOPDIR)/board/avnet/LX9MicroBoard/lx9_mmu.dts" >> > BR2_LINUX_KERNEL_IMAGE_TARGET_NAME="simpleImage.lx9_mmu" >> > >> > so I think there has to be some other thing I'm not aware of. >> > >> > >> > 2012/2/13 Spenser Gilliland <spenser309@gmail.com> >> >> >> >> This means that the dts was not copied into the >> >> arch/microblaze/boot/dts >> >> dir or you are not building the correct target. >> >> >> >> You need to verify that the BR2_LINUX_KERNEL_DTS_FILE is set to a real >> >> file and that BR2_LINUX_KERNEL_IMAGE_TARGET_NAME is set to >> >> simpleImage.$(filename-wo-extension). >> >> >> >> IE.? if BR2_LINUX_KERNEL_DTS_FILE = /path/to/dts/xupv5.dts then >> >> BR2_LINUX_KERNEL_IMAGE_TARGET=simpleImage.xupv5. >> >> >> >> Spenser >> >> >> >> On Feb 13, 2012 1:14 PM, "Alvaro Gamez" <alvaro.gamez@hazent.com> >> >> wrote: >> >>> >> >>> Ok, now that I have a little time I'm trying to make it work. >> >>> >> >>> I haven't had any problem yet with GCC tune. However, I'm getting the >> >>> following error while trying to build the kernel >> >>> >> >>> make[2]: *** No rule to make target >> >>> `arch/microblaze/boot/lx9_mmu.dtb', >> >>> needed by `arch/microblaze/boot/system.dtb'.? Stop. >> >>> >> >>> Any idea? >> >>> >> >>> Regards >> >>> >> >>> >> >>> 2012/2/13 Alvaro Gamez <alvaro.gamez@hazent.com> >> >>>> >> >>>> I am yet to test it. I just found yersterday that buildroot exists :) >> >>>> >> >>>> >> >>>> 2012/2/13 Spenser Gilliland <spenser309@gmail.com> >> >>>>> >> >>>>> Alvaro, >> >>>>> >> >>>>> Did you have issues with the GCC tune? ?I had to remove that line >> >>>>> from >> >>>>> the original patch. >> >>>>> >> >>>>> Spenser >> >>>>> >> >>>>> On Sun, Feb 12, 2012 at 5:07 PM, Alvaro Gamez >> >>>>> <alvaro.gamez@hazent.com> >> >>>>> wrote: >> >>>>> > Hi >> >>>>> > >> >>>>> > I am also interested on Microblaze support, hence I rescued the >> >>>>> > old >> >>>>> > patch >> >>>>> > from the archives, merged it against latest git revision and >> >>>>> > published on >> >>>>> > github.com/agamez/buildroot >> >>>>> > >> >>>>> > I attach the new patch, should apply cleanly to latest version on >> >>>>> > git. >> >>>>> > >> >>>>> > Even though Stephan Hoffmann work is pretty good, I think the path >> >>>>> > of >> >>>>> > the >> >>>>> > new files should be modified from >> >>>>> > board/relinux/avnet_LX9MicroBoard/ >> >>>>> > to >> >>>>> > board/avnet/LX9MicroBoard/ >> >>>>> > >> >>>>> > I didn't want to do that myself out of respect for the real author >> >>>>> > of >> >>>>> > the >> >>>>> > patch, since this is merely a repost. >> >>>>> > >> >>>>> > Regards, >> >>>>> > >> >>>>> > ?lvaro G?mez Machado >> >>>>> > >> >>>>> > From f4345407e3f23ebda7d91c53d81413cea51e1381 Mon Sep 17 00:00:00 >> >>>>> > 2001 >> >>>>> > From: Stephan Hoffmann <sho@relinux.de> >> >>>>> > Date: Wed, 23 Nov 2011 11:42:40 +0100 >> >>>>> > Subject: [PATCH] Added support for the Microblaze soft CPU >> >>>>> > >> >>>>> > --- >> >>>>> > ?board/relinux/avnet_LX9MicroBoard/README?????????? |?? 64 +++++ >> >>>>> > ?board/relinux/avnet_LX9MicroBoard/TODO???????????? |?? 19 ++ >> >>>>> > ?board/relinux/avnet_LX9MicroBoard/lx9_mmu.dts????? |? 247 >> >>>>> > ++++++++++++++++++++ >> >>>>> > ?.../relinux/avnet_LX9MicroBoard/lx9_mmu_defconfig? |?? 68 ++++++ >> >>>>> > ?configs/spartan6lx9_mb_defconfig?????????????????? |?? 17 ++ >> >>>>> > ?linux/Config.in??????????????????????????????????? |??? 8 + >> >>>>> > ?linux/linux.mk???????????????????????????????????? |?? 12 + >> >>>>> > ?target/Config.in.arch????????????????????????????? |??? 6 +- >> >>>>> > ?8 files changed, 440 insertions(+), 1 deletions(-) >> >>>>> > ?create mode 100644 board/relinux/avnet_LX9MicroBoard/README >> >>>>> > ?create mode 100644 board/relinux/avnet_LX9MicroBoard/TODO >> >>>>> > ?create mode 100644 board/relinux/avnet_LX9MicroBoard/lx9_mmu.dts >> >>>>> > ?create mode 100644 >> >>>>> > board/relinux/avnet_LX9MicroBoard/lx9_mmu_defconfig >> >>>>> > ?create mode 100644 configs/spartan6lx9_mb_defconfig >> >>>>> > >> >>>>> > diff --git a/board/relinux/avnet_LX9MicroBoard/README >> >>>>> > b/board/relinux/avnet_LX9MicroBoard/README >> >>>>> > new file mode 100644 >> >>>>> > index 0000000..a2e9247 >> >>>>> > --- /dev/null >> >>>>> > +++ b/board/relinux/avnet_LX9MicroBoard/README >> >>>>> > @@ -0,0 +1,64 @@ >> >>>>> > +This is the buildroot board support for the Avnet Spartan6 LX9 >> >>>>> > MicroBoard. >> >>>>> > + >> >>>>> > +The board can be bought from Avnet or from Trenz for a low prize. >> >>>>> > + >> >>>>> > +To run the Linux built with buildroot you have to install the >> >>>>> > FPGA >> >>>>> > bitfile >> >>>>> > +and the u-boot boot loader as described in the totorial available >> >>>>> > on >> >>>>> > + >> >>>>> > +??? http://www.em.avnet.com/s6microboard >> >>>>> > + >> >>>>> > +The image file (default name is simpleImage.lx9_mmu.ub) has to be >> >>>>> > +copied to your tftp folder (often /tftpboot/). >> >>>>> > + >> >>>>> > +Sample session: >> >>>>> > + >> >>>>> > +SPI Bootloader >> >>>>> > +Loading binary image >> >>>>> > +from flash @ address: 00060000 >> >>>>> > +to RAM address: 83f00000 >> >>>>> > +Done >> >>>>> > + >> >>>>> > + >> >>>>> > +SDRAM : >> >>>>> > +??????????????? Icache:ON >> >>>>> > +??????????????? Dcache:ON >> >>>>> > +??????? U-Boot Start:0x83f00000 >> >>>>> > +SF: Got idcode 20 ba 18 10 01 >> >>>>> > +*** Warning - bad CRC, using default environment >> >>>>> > + >> >>>>> > +Net:?? Xilinx_Emaclite >> >>>>> > +MAC:?? 00:0a:35:00:63:37 >> >>>>> > +U-BOOT for Avnet-LX9-Microboard-AXI-tiny-13.1 >> >>>>> > + >> >>>>> > +BOOTP broadcast 1 >> >>>>> > +DHCP client bound to address 192.168.11.122 >> >>>>> > +Hit any key to stop autoboot:? 0 >> >>>>> > +U-Boot-PetaLinux> tftp simpleImage.lx9_mmu.ub >> >>>>> > +Using Xilinx_Emaclite device >> >>>>> > +TFTP from server 192.168.11.10; our IP address is 192.168.11.122 >> >>>>> > +Filename 't.ub'. >> >>>>> > +Load address: 0x80002000 >> >>>>> > +Loading: >> >>>>> > ################################################################# >> >>>>> > + >> >>>>> > ################################################################# >> >>>>> > + >> >>>>> > ################################################################# >> >>>>> > + >> >>>>> > ################################################################# >> >>>>> > + >> >>>>> > ################################################################# >> >>>>> > +???????? ############################## >> >>>>> > +done >> >>>>> > +Bytes transferred = 5207724 (4f76ac hex) >> >>>>> > +U-Boot-PetaLinux> bootm >> >>>>> > +## Booting kernel from Legacy Image at 80002000 ... >> >>>>> > +?? Image Name:?? Linux-3.1.0 >> >>>>> > +?? Image Type:?? MicroBlaze Linux Kernel Image (uncompressed) >> >>>>> > +?? Data Size:??? 5207660 Bytes =? 5 MB >> >>>>> > +?? Load Address: 80000000 >> >>>>> > +?? Entry Point:? 80000000 >> >>>>> > +?? Verifying Checksum ... OK >> >>>>> > +?? Loading Kernel Image ... OK >> >>>>> > +OK >> >>>>> > +## Transferring control to Linux (at address 80000000), >> >>>>> > 0x80000000 >> >>>>> > ramdisk >> >>>>> > 0x00000000, FDT 0x00000000... >> >>>>> > +Early console on uartlite at 0x40600000 >> >>>>> > +..... boot log skipped >> >>>>> > + >> >>>>> > +Welcome to Microblaze Buildroot >> >>>>> > +Microblaze login: >> >>>>> > diff --git a/board/relinux/avnet_LX9MicroBoard/TODO >> >>>>> > b/board/relinux/avnet_LX9MicroBoard/TODO >> >>>>> > new file mode 100644 >> >>>>> > index 0000000..ca5ee94 >> >>>>> > --- /dev/null >> >>>>> > +++ b/board/relinux/avnet_LX9MicroBoard/TODO >> >>>>> > @@ -0,0 +1,19 @@ >> >>>>> > +TODO list for the Spartan LX9 Microboard >> >>>>> > + >> >>>>> > +Generate u-boot within buildroot >> >>>>> > +================================ >> >>>>> > +Currently, we need to use the u-boot provided by Avnet. >> >>>>> > + >> >>>>> > +Provide config files for qemu >> >>>>> > +============================= >> >>>>> > + >> >>>>> > +Generate toolchain >> >>>>> > +================== >> >>>>> > +Currently the GNU toolchain provided by Xilinx has to be used. >> >>>>> > +Xilinx does not provide a toolchain suitable to build a mmu-less >> >>>>> > +Linux system, but omitting the mmu saved space within the FPGA. >> >>>>> > + >> >>>>> > +Bring up mmu-less system >> >>>>> > +======================== >> >>>>> > +Hopefully this is easy as soon as we have a working toolchain >> >>>>> > +with flt support. >> >>>>> > diff --git a/board/relinux/avnet_LX9MicroBoard/lx9_mmu.dts >> >>>>> > b/board/relinux/avnet_LX9MicroBoard/lx9_mmu.dts >> >>>>> > new file mode 100644 >> >>>>> > index 0000000..8ffedd9 >> >>>>> > --- /dev/null >> >>>>> > +++ b/board/relinux/avnet_LX9MicroBoard/lx9_mmu.dts >> >>>>> > @@ -0,0 +1,247 @@ >> >>>>> > +/* >> >>>>> > + * Device Tree Generator version: 1.3 >> >>>>> > + * >> >>>>> > + * (C) Copyright 2007-2008 Xilinx, Inc. >> >>>>> > + * (C) Copyright 2007-2009 Michal Simek >> >>>>> > + * >> >>>>> > + * Michal SIMEK <monstr@monstr.eu> >> >>>>> > + * >> >>>>> > + * This program is free software; you can redistribute it and/or >> >>>>> > + * modify it under the terms of the GNU General Public License as >> >>>>> > + * published by the Free Software Foundation; either version 2 of >> >>>>> > + * the License, or (at your option) any later version. >> >>>>> > + * >> >>>>> > + * This program is distributed in the hope that it will be >> >>>>> > useful, >> >>>>> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of >> >>>>> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the >> >>>>> > + * GNU General Public License for more details. >> >>>>> > + * >> >>>>> > + * You should have received a copy of the GNU General Public >> >>>>> > License >> >>>>> > + * along with this program; if not, write to the Free Software >> >>>>> > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, >> >>>>> > + * MA 02111-1307 USA >> >>>>> > + * >> >>>>> > + * CAUTION: This file is automatically generated by libgen. >> >>>>> > + * Version: Xilinx EDK 13.2 EDK_O.61xd >> >>>>> > + * >> >>>>> > + * XPS project directory: device-tree_bsp_230-orig >> >>>>> > + */ >> >>>>> > + >> >>>>> > +/dts-v1/; >> >>>>> > +/ { >> >>>>> > +??? #address-cells = <1>; >> >>>>> > +??? #size-cells = <1>; >> >>>>> > +??? compatible = "xlnx,microblaze"; >> >>>>> > +??? model = "testing"; >> >>>>> > +??? MCB3_LPDDR: memory at 80000000 { >> >>>>> > +??????? device_type = "memory"; >> >>>>> > +??????? reg = < 0x80000000 0x4000000 >; >> >>>>> > +??? } ; >> >>>>> > +??? aliases { >> >>>>> > +??????? ethernet0 = &Ethernet_MAC; >> >>>>> > +??????? serial0 = &USB_Uart; >> >>>>> > +??? } ; >> >>>>> > +??? chosen { >> >>>>> > +??????? bootargs = "console=ttyUL0"; >> >>>>> > +??????? linux,stdout-path = "/axi at 0/serial at 40600000"; >> >>>>> > +??? } ; >> >>>>> > +??? cpus { >> >>>>> > +??????? #address-cells = <1>; >> >>>>> > +??????? #cpus = <0x1>; >> >>>>> > +??????? #size-cells = <0>; >> >>>>> > +??????? microblaze_0: cpu at 0 { >> >>>>> > +??????????? clock-frequency = <66666667>; >> >>>>> > +??????????? compatible = "xlnx,microblaze-8.20.a"; >> >>>>> > +??????????? d-cache-baseaddr = <0x80000000>; >> >>>>> > +??????????? d-cache-highaddr = <0x83ffffff>; >> >>>>> > +??????????? d-cache-line-size = <0x10>; >> >>>>> > +??????????? d-cache-size = <0x2000>; >> >>>>> > +??????????? device_type = "cpu"; >> >>>>> > +??????????? i-cache-baseaddr = <0x80000000>; >> >>>>> > +??????????? i-cache-highaddr = <0x83ffffff>; >> >>>>> > +??????????? i-cache-line-size = <0x10>; >> >>>>> > +??????????? i-cache-size = <0x2000>; >> >>>>> > +??????????? model = "microblaze,8.20.a"; >> >>>>> > +??????????? reg = <0>; >> >>>>> > +??????????? timebase-frequency = <66666667>; >> >>>>> > +??????????? xlnx,addr-tag-bits = <0xd>; >> >>>>> > +??????????? xlnx,allow-dcache-wr = <0x1>; >> >>>>> > +??????????? xlnx,allow-icache-wr = <0x1>; >> >>>>> > +??????????? xlnx,area-optimized = <0x0>; >> >>>>> > +??????????? xlnx,avoid-primitives = <0x0>; >> >>>>> > +??????????? xlnx,branch-target-cache-size = <0x0>; >> >>>>> > +??????????? xlnx,cache-byte-size = <0x2000>; >> >>>>> > +??????????? xlnx,d-axi = <0x1>; >> >>>>> > +??????????? xlnx,d-lmb = <0x1>; >> >>>>> > +??????????? xlnx,d-plb = <0x0>; >> >>>>> > +??????????? xlnx,data-size = <0x20>; >> >>>>> > +??????????? xlnx,dcache-addr-tag = <0xd>; >> >>>>> > +??????????? xlnx,dcache-always-used = <0x1>; >> >>>>> > +??????????? xlnx,dcache-byte-size = <0x2000>; >> >>>>> > +??????????? xlnx,dcache-data-width = <0x0>; >> >>>>> > +??????????? xlnx,dcache-force-tag-lutram = <0x0>; >> >>>>> > +??????????? xlnx,dcache-interface = <0x0>; >> >>>>> > +??????????? xlnx,dcache-line-len = <0x4>; >> >>>>> > +??????????? xlnx,dcache-use-fsl = <0x0>; >> >>>>> > +??????????? xlnx,dcache-use-writeback = <0x0>; >> >>>>> > +??????????? xlnx,dcache-victims = <0x0>; >> >>>>> > +??????????? xlnx,debug-enabled = <0x1>; >> >>>>> > +??????????? xlnx,div-zero-exception = <0x0>; >> >>>>> > +??????????? xlnx,dynamic-bus-sizing = <0x1>; >> >>>>> > +??????????? xlnx,ecc-use-ce-exception = <0x0>; >> >>>>> > +??????????? xlnx,edge-is-positive = <0x1>; >> >>>>> > +??????????? xlnx,endianness = <0x1>; >> >>>>> > +??????????? xlnx,family = "spartan6"; >> >>>>> > +??????????? xlnx,fault-tolerant = <0x0>; >> >>>>> > +??????????? xlnx,fpu-exception = <0x0>; >> >>>>> > +??????????? xlnx,freq = <0x3f940ab>; >> >>>>> > +??????????? xlnx,fsl-data-size = <0x20>; >> >>>>> > +??????????? xlnx,fsl-exception = <0x0>; >> >>>>> > +??????????? xlnx,fsl-links = <0x0>; >> >>>>> > +??????????? xlnx,i-axi = <0x0>; >> >>>>> > +??????????? xlnx,i-lmb = <0x1>; >> >>>>> > +??????????? xlnx,i-plb = <0x0>; >> >>>>> > +??????????? xlnx,icache-always-used = <0x1>; >> >>>>> > +??????????? xlnx,icache-data-width = <0x0>; >> >>>>> > +??????????? xlnx,icache-force-tag-lutram = <0x0>; >> >>>>> > +??????????? xlnx,icache-interface = <0x0>; >> >>>>> > +??????????? xlnx,icache-line-len = <0x4>; >> >>>>> > +??????????? xlnx,icache-streams = <0x0>; >> >>>>> > +??????????? xlnx,icache-use-fsl = <0x0>; >> >>>>> > +??????????? xlnx,icache-victims = <0x0>; >> >>>>> > +??????????? xlnx,ill-opcode-exception = <0x0>; >> >>>>> > +??????????? xlnx,instance = "microblaze_0"; >> >>>>> > +??????????? xlnx,interconnect = <0x2>; >> >>>>> > +??????????? xlnx,interconnect-m-axi-dc-aw-register = <0x0>; >> >>>>> > +??????????? xlnx,interconnect-m-axi-dc-read-issuing = <0x2>; >> >>>>> > +??????????? xlnx,interconnect-m-axi-dc-w-register = <0x0>; >> >>>>> > +??????????? xlnx,interconnect-m-axi-dc-write-issuing = <0x20>; >> >>>>> > +??????????? xlnx,interconnect-m-axi-dp-read-issuing = <0x1>; >> >>>>> > +??????????? xlnx,interconnect-m-axi-dp-write-issuing = <0x1>; >> >>>>> > +??????????? xlnx,interconnect-m-axi-ic-read-issuing = <0x2>; >> >>>>> > +??????????? xlnx,interconnect-m-axi-ip-read-issuing = <0x1>; >> >>>>> > +??????????? xlnx,interrupt-is-edge = <0x0>; >> >>>>> > +??????????? xlnx,lockstep-slave = <0x0>; >> >>>>> > +??????????? xlnx,mmu-dtlb-size = <0x1>; >> >>>>> > +??????????? xlnx,mmu-itlb-size = <0x1>; >> >>>>> > +??????????? xlnx,mmu-privileged-instr = <0x0>; >> >>>>> > +??????????? xlnx,mmu-tlb-access = <0x3>; >> >>>>> > +??????????? xlnx,mmu-zones = <0x2>; >> >>>>> > +??????????? xlnx,number-of-pc-brk = <0x1>; >> >>>>> > +??????????? xlnx,number-of-rd-addr-brk = <0x0>; >> >>>>> > +??????????? xlnx,number-of-wr-addr-brk = <0x0>; >> >>>>> > +??????????? xlnx,opcode-0x0-illegal = <0x0>; >> >>>>> > +??????????? xlnx,optimization = <0x0>; >> >>>>> > +??????????? xlnx,pvr = <0x0>; >> >>>>> > +??????????? xlnx,pvr-user1 = <0x0>; >> >>>>> > +??????????? xlnx,pvr-user2 = <0x0>; >> >>>>> > +??????????? xlnx,reset-msr = <0x0>; >> >>>>> > +??????????? xlnx,sco = <0x0>; >> >>>>> > +??????????? xlnx,stream-interconnect = <0x0>; >> >>>>> > +??????????? xlnx,unaligned-exceptions = <0x0>; >> >>>>> > +??????????? xlnx,use-barrel = <0x1>; >> >>>>> > +??????????? xlnx,use-branch-target-cache = <0x0>; >> >>>>> > +??????????? xlnx,use-dcache = <0x1>; >> >>>>> > +??????????? xlnx,use-div = <0x0>; >> >>>>> > +??????????? xlnx,use-ext-brk = <0x1>; >> >>>>> > +??????????? xlnx,use-ext-nm-brk = <0x1>; >> >>>>> > +??????????? xlnx,use-extended-fsl-instr = <0x0>; >> >>>>> > +??????????? xlnx,use-fpu = <0x0>; >> >>>>> > +??????????? xlnx,use-hw-mul = <0x1>; >> >>>>> > +??????????? xlnx,use-icache = <0x1>; >> >>>>> > +??????????? xlnx,use-interrupt = <0x1>; >> >>>>> > +??????????? xlnx,use-mmu = <0x3>; >> >>>>> > +??????????? xlnx,use-msr-instr = <0x1>; >> >>>>> > +??????????? xlnx,use-pcmp-instr = <0x0>; >> >>>>> > +??????????? xlnx,use-stack-protection = <0x0>; >> >>>>> > +??????? } ; >> >>>>> > +??? } ; >> >>>>> > +??? axi4lite_0: axi at 0 { >> >>>>> > +??????? #address-cells = <1>; >> >>>>> > +??????? #size-cells = <1>; >> >>>>> > +??????? compatible = "xlnx,axi-interconnect-1.03.a", >> >>>>> > "simple-bus"; >> >>>>> > +??????? ranges ; >> >>>>> > +??????? Ethernet_MAC: ethernet at 40e00000 { >> >>>>> > +??????????? compatible = "xlnx,axi-ethernetlite-1.00.a", >> >>>>> > "xlnx,xps-ethernetlite-1.00.a"; >> >>>>> > +??????????? device_type = "network"; >> >>>>> > +??????????? interrupt-parent = <µblaze_0_intc>; >> >>>>> > +??????????? interrupts = < 2 0 >; >> >>>>> > +??????????? local-mac-address = [ 00 0a 35 aa de 00 ]; >> >>>>> > +//??????????? phy-handle = <&phy0>; >> >>>>> > +??????????? reg = < 0x40e00000 0x10000 >; >> >>>>> > +??????????? xlnx,duplex = <0x1>; >> >>>>> > +??????????? xlnx,family = "spartan6"; >> >>>>> > +??????????? xlnx,include-global-buffers = <0x0>; >> >>>>> > +??????????? xlnx,include-internal-loopback = <0x0>; >> >>>>> > +??????????? xlnx,include-mdio = <0x1>; >> >>>>> > +??????????? xlnx,include-phy-constraints = <0x1>; >> >>>>> > +??????????? xlnx,interconnect-s-axi-read-acceptance = <0x1>; >> >>>>> > +??????????? xlnx,interconnect-s-axi-write-acceptance = <0x1>; >> >>>>> > +??????????? xlnx,rx-ping-pong = <0x0>; >> >>>>> > +??????????? xlnx,s-axi-aclk-period-ps = <0x3a98>; >> >>>>> > +??????????? xlnx,s-axi-id-width = <0x1>; >> >>>>> > +??????????? xlnx,s-axi-supports-narrow-burst = <0x0>; >> >>>>> > +??????????? xlnx,tx-ping-pong = <0x0>; >> >>>>> > +/* >> >>>>> > +??????????? mdio { >> >>>>> > +??????????????? #address-cells = <1>; >> >>>>> > +??????????????? #size-cells = <0>; >> >>>>> > +??????????????? phy0: phy at 7 { >> >>>>> > +??????????????????? compatible = "marvell,88e1111"; >> >>>>> > +??????????????????? device_type = "ethernet-phy"; >> >>>>> > +??????????????????? reg = <7>; >> >>>>> > +??????????????? } ; >> >>>>> > +??????????? } ; >> >>>>> > +*/ >> >>>>> > +??????? } ; >> >>>>> > +??????? SPI_FLASH: spi at 40a00000 { >> >>>>> > +??????????? compatible = "xlnx,axi-spi-1.01.a", >> >>>>> > "xlnx,xps-spi-2.00.a"; >> >>>>> > +??????????? interrupt-parent = <µblaze_0_intc>; >> >>>>> > +??????????? interrupts = < 1 2 >; >> >>>>> > +??????????? reg = < 0x40a00000 0x10000 >; >> >>>>> > +??????????? xlnx,family = "spartan6"; >> >>>>> > +??????????? xlnx,fifo-exist = <0x1>; >> >>>>> > +??????????? xlnx,num-ss-bits = <0x1>; >> >>>>> > +??????????? xlnx,num-transfer-bits = <0x8>; >> >>>>> > +??????????? xlnx,sck-ratio = <0x4>; >> >>>>> > +??????? } ; >> >>>>> > +??????? USB_Uart: serial at 40600000 { >> >>>>> > +??????????? clock-frequency = <66666667>; >> >>>>> > +??????????? compatible = "xlnx,axi-uartlite-1.02.a", >> >>>>> > "xlnx,xps-uartlite-1.00.a"; >> >>>>> > +??????????? current-speed = <115200>; >> >>>>> > +??????????? device_type = "serial"; >> >>>>> > +??????????? interrupt-parent = <µblaze_0_intc>; >> >>>>> > +??????????? interrupts = < 3 0 >; >> >>>>> > +??????????? port-number = <0>; >> >>>>> > +??????????? reg = < 0x40600000 0x10000 >; >> >>>>> > +??????????? xlnx,baudrate = <0x1c200>; >> >>>>> > +??????????? xlnx,data-bits = <0x8>; >> >>>>> > +??????????? xlnx,family = "spartan6"; >> >>>>> > +??????????? xlnx,odd-parity = <0x1>; >> >>>>> > +??????????? xlnx,s-axi-aclk-freq-hz = <0x3f940ab>; >> >>>>> > +??????????? xlnx,use-parity = <0x0>; >> >>>>> > +??????? } ; >> >>>>> > +??????? microblaze_0_intc: interrupt-controller at 41200000 { >> >>>>> > +??????????? #interrupt-cells = <0x2>; >> >>>>> > +??????????? compatible = "xlnx,axi-intc-1.01.a", >> >>>>> > "xlnx,xps-intc-1.00.a"; >> >>>>> > +??????????? interrupt-controller ; >> >>>>> > +??????????? reg = < 0x41200000 0x10000 >; >> >>>>> > +??????????? xlnx,kind-of-intr = <0xc>; >> >>>>> > +??????????? xlnx,num-intr-inputs = <0x4>; >> >>>>> > +??????? } ; >> >>>>> > +??????? system_timer: timer at 41c00000 { >> >>>>> > +??????????? clock-frequency = <66666667>; >> >>>>> > +??????????? compatible = "xlnx,axi-timer-1.02.a", >> >>>>> > "xlnx,xps-timer-1.00.a"; >> >>>>> > +??????????? interrupt-parent = <µblaze_0_intc>; >> >>>>> > +??????????? interrupts = < 0 2 >; >> >>>>> > +??????????? reg = < 0x41c00000 0x10000 >; >> >>>>> > +??????????? xlnx,count-width = <0x20>; >> >>>>> > +??????????? xlnx,family = "spartan6"; >> >>>>> > +??????????? xlnx,gen0-assert = <0x1>; >> >>>>> > +??????????? xlnx,gen1-assert = <0x1>; >> >>>>> > +??????????? xlnx,one-timer-only = <0x0>; >> >>>>> > +??????????? xlnx,trig0-assert = <0x1>; >> >>>>> > +??????????? xlnx,trig1-assert = <0x1>; >> >>>>> > +??????? } ; >> >>>>> > +??? } ; >> >>>>> > +} ; >> >>>>> > diff --git a/board/relinux/avnet_LX9MicroBoard/lx9_mmu_defconfig >> >>>>> > b/board/relinux/avnet_LX9MicroBoard/lx9_mmu_defconfig >> >>>>> > new file mode 100644 >> >>>>> > index 0000000..5d01ca0 >> >>>>> > --- /dev/null >> >>>>> > +++ b/board/relinux/avnet_LX9MicroBoard/lx9_mmu_defconfig >> >>>>> > @@ -0,0 +1,68 @@ >> >>>>> > +CONFIG_EXPERIMENTAL=y >> >>>>> > +CONFIG_SYSVIPC=y >> >>>>> > +CONFIG_IKCONFIG=y >> >>>>> > +CONFIG_IKCONFIG_PROC=y >> >>>>> > +CONFIG_BLK_DEV_INITRD=y >> >>>>> > +CONFIG_INITRAMFS_SOURCE="rootfs.cpio" >> >>>>> > +CONFIG_INITRAMFS_COMPRESSION_GZIP=y >> >>>>> > +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set >> >>>>> > +CONFIG_EXPERT=y >> >>>>> > +CONFIG_KALLSYMS_ALL=y >> >>>>> > +CONFIG_KALLSYMS_EXTRA_PASS=y >> >>>>> > +# CONFIG_HOTPLUG is not set >> >>>>> > +# CONFIG_BASE_FULL is not set >> >>>>> > +# CONFIG_FUTEX is not set >> >>>>> > +# CONFIG_EPOLL is not set >> >>>>> > +# CONFIG_SIGNALFD is not set >> >>>>> > +# CONFIG_SHMEM is not set >> >>>>> > +CONFIG_SLAB=y >> >>>>> > +CONFIG_MODULES=y >> >>>>> > +CONFIG_MODULE_UNLOAD=y >> >>>>> > +# CONFIG_BLK_DEV_BSG is not set >> >>>>> > +# CONFIG_OPT_LIB_ASM is not set >> >>>>> > +CONFIG_KERNEL_BASE_ADDR=0x80000000 >> >>>>> > +CONFIG_XILINX_MICROBLAZE0_FAMILY="spartan6" >> >>>>> > +CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1 >> >>>>> > +# CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR is not set >> >>>>> > +CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1 >> >>>>> > +CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=1 >> >>>>> > +CONFIG_XILINX_MICROBLAZE0_HW_VER="8.20.a" >> >>>>> > +CONFIG_HZ_100=y >> >>>>> > +CONFIG_MMU=y >> >>>>> > +CONFIG_CMDLINE_BOOL=y >> >>>>> > +CONFIG_CMDLINE_FORCE=y >> >>>>> > +CONFIG_NET=y >> >>>>> > +CONFIG_PACKET=y >> >>>>> > +CONFIG_UNIX=y >> >>>>> > +CONFIG_INET=y >> >>>>> > +# CONFIG_INET_LRO is not set >> >>>>> > +# CONFIG_IPV6 is not set >> >>>>> > +CONFIG_PROC_DEVICETREE=y >> >>>>> > +CONFIG_BLK_DEV_RAM=y >> >>>>> > +CONFIG_BLK_DEV_RAM_SIZE=8192 >> >>>>> > +CONFIG_NETDEVICES=y >> >>>>> > +CONFIG_NET_ETHERNET=y >> >>>>> > +CONFIG_XILINX_EMACLITE=y >> >>>>> > +# CONFIG_INPUT is not set >> >>>>> > +# CONFIG_SERIO is not set >> >>>>> > +# CONFIG_VT is not set >> >>>>> > +CONFIG_SERIAL_UARTLITE=y >> >>>>> > +CONFIG_SERIAL_UARTLITE_CONSOLE=y >> >>>>> > +# CONFIG_HW_RANDOM is not set >> >>>>> > +# CONFIG_HWMON is not set >> >>>>> > +# CONFIG_USB_SUPPORT is not set >> >>>>> > +CONFIG_EXT2_FS=y >> >>>>> > +# CONFIG_DNOTIFY is not set >> >>>>> > +CONFIG_NFS_FS=y >> >>>>> > +CONFIG_NFS_V3=y >> >>>>> > +CONFIG_CIFS=y >> >>>>> > +CONFIG_CIFS_STATS=y >> >>>>> > +CONFIG_CIFS_STATS2=y >> >>>>> > +CONFIG_PARTITION_ADVANCED=y >> >>>>> > +CONFIG_DEBUG_KERNEL=y >> >>>>> > +CONFIG_DETECT_HUNG_TASK=y >> >>>>> > +CONFIG_DEBUG_SLAB=y >> >>>>> > +CONFIG_DEBUG_SPINLOCK=y >> >>>>> > +CONFIG_DEBUG_INFO=y >> >>>>> > +CONFIG_EARLY_PRINTK=y >> >>>>> > +# CONFIG_CRYPTO_ANSI_CPRNG is not set >> >>>>> > diff --git a/configs/spartan6lx9_mb_defconfig >> >>>>> > b/configs/spartan6lx9_mb_defconfig >> >>>>> > new file mode 100644 >> >>>>> > index 0000000..0329bb4 >> >>>>> > --- /dev/null >> >>>>> > +++ b/configs/spartan6lx9_mb_defconfig >> >>>>> > @@ -0,0 +1,17 @@ >> >>>>> > +BR2_microblaze=y >> >>>>> > +BR2_TOOLCHAIN_EXTERNAL=y >> >>>>> > >> >>>>> > +BR2_TOOLCHAIN_EXTERNAL_PATH="/opt/microblazeel-unknown-linux-gnu/" >> >>>>> > >> >>>>> > >> >>>>> > +BR2_TOOLCHAIN_EXTERNAL_CUSTOM_PREFIX="microblazeel-unknown-linux-gnu" >> >>>>> > +BR2_TOOLCHAIN_EXTERNAL_CUSTOM_GLIBC=y >> >>>>> > +BR2_TOOLCHAIN_EXTERNAL_CXX=y >> >>>>> > +BR2_TARGET_GENERIC_HOSTNAME="Microblaze Buildroot" >> >>>>> > +BR2_TARGET_GENERIC_ISSUE="Welcome to Microblaze Buildroot" >> >>>>> > +BR2_TARGET_GENERIC_GETTY_PORT="ttyUL0" >> >>>>> > +# BR2_TARGET_ROOTFS_TAR is not set >> >>>>> > +BR2_TARGET_ROOTFS_INITRAMFS=y >> >>>>> > +BR2_LINUX_KERNEL=y >> >>>>> > +BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y >> >>>>> > >> >>>>> > >> >>>>> > +BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(TOPDIR)/board/relinux/avnet_LX9MicroBoard/lx9_mmu_defconfig" >> >>>>> > >> >>>>> > >> >>>>> > +BR2_LINUX_KERNEL_DTS_FILE="$(TOPDIR)/board/relinux/avnet_LX9MicroBoard/lx9_mmu.dts" >> >>>>> > +BR2_LINUX_KERNEL_IMAGE_TARGET_CUSTOM=y >> >>>>> > +BR2_LINUX_KERNEL_IMAGE_TARGET_NAME="simpleImage.lx9_mmu" >> >>>>> > diff --git a/linux/Config.in b/linux/Config.in >> >>>>> > index 86dc32a..138feb3 100644 >> >>>>> > --- a/linux/Config.in >> >>>>> > +++ b/linux/Config.in >> >>>>> > @@ -120,6 +120,14 @@ config BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE >> >>>>> > ???? help >> >>>>> > ???? ? Path to the kernel configuration file >> >>>>> > >> >>>>> > +config BR2_LINUX_KERNEL_DTS_FILE >> >>>>> > +??? string "Device Tree dts file location" >> >>>>> > +??? depends on BR2_microblaze >> >>>>> > +??? help >> >>>>> > +????? Path from where the dts file has to be copied >> >>>>> > +????? The final "custom target" name depends on the >> >>>>> > +????? dts file name: >> >>>>> > +????????? <name>.dts --> simpleImage.<name> >> >>>>> > ?# >> >>>>> > ?# Binary format >> >>>>> > ?# >> >>>>> > diff --git a/linux/linux.mk b/linux/linux.mk >> >>>>> > index ae236d4..4a24f18 100644 >> >>>>> > --- a/linux/linux.mk >> >>>>> > +++ b/linux/linux.mk >> >>>>> > @@ -117,6 +117,18 @@ endef >> >>>>> > >> >>>>> > ?LINUX_POST_PATCH_HOOKS += LINUX_APPLY_PATCHES >> >>>>> > >> >>>>> > +ifeq ($(KERNEL_ARCH),microblaze) >> >>>>> > +# on microblaze, we always want mkimage >> >>>>> > +LINUX_DEPENDENCIES+=host-uboot-tools >> >>>>> > + >> >>>>> > +define LINUX_COPY_DTS >> >>>>> > +??? if test -f "$(BR2_LINUX_KERNEL_DTS_FILE)" ; then \ >> >>>>> > +??????? cp $(BR2_LINUX_KERNEL_DTS_FILE) >> >>>>> > $(@D)/arch/microblaze/boot/dts ; \ >> >>>>> > +??? else \ >> >>>>> > +??????? echo "Cannot copy dts file!" ; \ >> >>>>> > +??? fi >> >>>>> > +endef >> >>>>> > +endif >> >>>>> > >> >>>>> > ?ifeq ($(BR2_LINUX_KERNEL_USE_DEFCONFIG),y) >> >>>>> > ?KERNEL_SOURCE_CONFIG = $(KERNEL_ARCH_PATH)/configs/$(call >> >>>>> > qstrip,$(BR2_LINUX_KERNEL_DEFCONFIG))_defconfig >> >>>>> > diff --git a/target/Config.in.arch b/target/Config.in.arch >> >>>>> > index 417441d..3a75585 100644 >> >>>>> > --- a/target/Config.in.arch >> >>>>> > +++ b/target/Config.in.arch >> >>>>> > @@ -21,6 +21,8 @@ config BR2_i386 >> >>>>> > ?config BR2_m68k >> >>>>> > ???? bool "m68k" >> >>>>> > ???? depends on BROKEN # ice in uclibc / inet_ntoa_r >> >>>>> > +config BR2_microblaze >> >>>>> > +??? bool "microblaze" >> >>>>> > ?config BR2_mips >> >>>>> > ???? bool "mips" >> >>>>> > ?config BR2_mipsel >> >>>>> > @@ -508,6 +510,7 @@ config BR2_ARCH >> >>>>> > ???? default "i686"??? ??? if BR2_x86_athlon >> >>>>> > ???? default "i686"??? ??? if BR2_x86_athlon_4 >> >>>>> > ???? default "m68k"??? ??? if BR2_m68k >> >>>>> > +??? default "microblaze"??? if BR2_microblaze >> >>>>> > ???? default "mips"??? ??? if BR2_mips >> >>>>> > ???? default "mipsel"??? if BR2_mipsel >> >>>>> > ???? default "powerpc"??? if BR2_powerpc >> >>>>> > @@ -533,7 +536,7 @@ config BR2_ARCH >> >>>>> > >> >>>>> > ?config BR2_ENDIAN >> >>>>> > ???? string >> >>>>> > -??? default "LITTLE" if BR2_arm || BR2_bfin || BR2_i386 || >> >>>>> > BR2_mipsel || \ >> >>>>> > +??? default "LITTLE" if BR2_arm || BR2_bfin || BR2_i386 || >> >>>>> > BR2_mipsel || >> >>>>> > BR2_microblaze || \ >> >>>>> > ???? ??? ??? ??? BR2_sh3 || BR2_sh4 || BR2_sh4a || BR2_x86_64 || >> >>>>> > BR2_sh64 >> >>>>> > ???? default "BIG"??? if BR2_armeb || BR2_avr32 || BR2_m68k || >> >>>>> > BR2_mips || \ >> >>>>> > ???? ??? ??? ??? BR2_powerpc || BR2_sh2 || BR2_sh2a || \ >> >>>>> > @@ -598,6 +601,7 @@ config BR2_GCC_TARGET_TUNE >> >>>>> > ???? default 68030??? ??? if BR2_m68k_68030 >> >>>>> > ???? default 68040??? ??? if BR2_m68k_68040 >> >>>>> > ???? default 68060??? ??? if BR2_m68k_68060 >> >>>>> > +??? default microblaze??? if BR2_microblaze >> >>>>> > ???? default mips1??? ??? if BR2_mips_1 >> >>>>> > ???? default mips2??? ??? if BR2_mips_2 >> >>>>> > ???? default mips3??? ??? if BR2_mips_3 >> >>>>> > -- >> >>>>> > 1.7.9 >> >>>>> > >> >>>>> > >> >>>>> > >> >>>>> > 2012/2/11 <buildroot-request@busybox.net> >> >>>>> >> >> >>>>> >> >> >>>>> >> On Saturday 11 February 2012 05:58:37 Spenser Gilliland wrote: >> >>>>> >> > I'm using this Microblaze patch for my project. ?Will it be >> >>>>> >> > part >> >>>>> >> > of >> >>>>> >> > the official release that is coming up soon? >> >>>>> >> >> >>>>> >> ?I'm afraid it got lost between the cracks. ?Could you repost it? >> >>>>> >> >> >>>>> >> ?Regards, >> >>>>> >> ?Arnout >> >>>>> > >> >>>>> > >> >>>>> > >> >>>>> > _______________________________________________ >> >>>>> > buildroot mailing list >> >>>>> > buildroot at busybox.net >> >>>>> > http://lists.busybox.net/mailman/listinfo/buildroot >> >>>>> >> >>>>> >> >>>>> >> >>>>> -- >> >>>>> Spenser Gilliland >> >>>>> Computer Engineer >> >>>>> Illinois Institute of Technology >> >>>> >> >>>> >> >>>> >> >>>> >> >>>> -- >> >>>> ?lvaro G?mez Machado >> >>>> >> >>> >> >>> >> >>> >> >>> -- >> >>> ?lvaro G?mez Machado >> >>> >> >>> >> >>> _______________________________________________ >> >>> buildroot mailing list >> >>> buildroot at busybox.net >> >>> http://lists.busybox.net/mailman/listinfo/buildroot >> > >> > >> > >> > >> > -- >> > ?lvaro G?mez Machado >> > >> >> >> >> -- >> Spenser Gilliland >> Computer Engineer >> Illinois Institute of Technology > > > > > -- > ?lvaro G?mez Machado > -- Spenser Gilliland Computer Engineer Illinois Institute of Technology ^ permalink raw reply [flat|nested] 15+ messages in thread
* [Buildroot] [PATCH] Adding Microblaze support to Buildroot 2012-02-13 19:51 ` Spenser Gilliland @ 2012-02-13 20:11 ` Alvaro Gamez 0 siblings, 0 replies; 15+ messages in thread From: Alvaro Gamez @ 2012-02-13 20:11 UTC (permalink / raw) To: buildroot I couldn't find that. However, there are two process that finish with a fatal error. However, this only happens the first time I run make. If I try to make again, I will not get any reference to uboot compilation failing, but only the one about the .dtb file /home/sslayer/Proyectos/TESIS/LX9/buildroot/output/build/host-uboot-tools-2011.03/common/env_embedded.c:28:20: fatal error: config.h: No such file or directory compilation terminated. /home/sslayer/Proyectos/TESIS/LX9/buildroot/output/build/host-uboot-tools-2011.03/tools/envcrc.c:35:20: fatal error: config.h: No such file or directory compilation terminated. <stdin>:1554:2: warning: #warning syscall sendmmsg not implemented <stdin>:1562:2: warning: #warning syscall process_vm_readv not implemented <stdin>:1566:2: warning: #warning syscall process_vm_writev not implemented make[2]: *** No rule to make target `arch/microblaze/boot/lx9_mmu.dtb', needed by `arch/microblaze/boot/system.dtb'. Stop. make[1]: *** [arch/microblaze/boot] Error 2 make[1]: *** Waiting for unfinished jobs.... make: *** [/home/sslayer/Proyectos/TESIS/LX9/buildroot/output/build/linux-3.2.5/.stamp_built] Error 2 2012/2/13 Spenser Gilliland <spenser309@gmail.com> > It should be copied by the LINUX_COPY_DTS routine in linux/linux.mk > that was added by the patch. Is there a line "Cannot copy dts file!" > in the build output? > > Spenser > > On Mon, Feb 13, 2012 at 1:48 PM, Alvaro Gamez <alvaro.gamez@hazent.com> > wrote: > > No, it isn't there. > > > > But the refered board/avnet/LX9MicroBoard/lx9_mmu.dts in the config files > > does exist. I guess something should have copied it there but failed > > somehow? > > > > > > 2012/2/13 Spenser Gilliland <spenser309@gmail.com> > >> > >> Is there a file named lx9_mmu.dts file in > >> output/build/linux-x.x.x/arch/microblaze/boot/dts/ ? > >> > >> Spenser > >> > >> On Mon, Feb 13, 2012 at 1:40 PM, Alvaro Gamez <alvaro.gamez@hazent.com> > >> wrote: > >> > I checked and this is the content of the config file: > >> > > >> > > >> > > BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(TOPDIR)/board/avnet/LX9MicroBoard/lx9_mmu_defconfig" > >> > > >> > > BR2_LINUX_KERNEL_DTS_FILE="$(TOPDIR)/board/avnet/LX9MicroBoard/lx9_mmu.dts" > >> > BR2_LINUX_KERNEL_IMAGE_TARGET_NAME="simpleImage.lx9_mmu" > >> > > >> > so I think there has to be some other thing I'm not aware of. > >> > > >> > > >> > 2012/2/13 Spenser Gilliland <spenser309@gmail.com> > >> >> > >> >> This means that the dts was not copied into the > >> >> arch/microblaze/boot/dts > >> >> dir or you are not building the correct target. > >> >> > >> >> You need to verify that the BR2_LINUX_KERNEL_DTS_FILE is set to a > real > >> >> file and that BR2_LINUX_KERNEL_IMAGE_TARGET_NAME is set to > >> >> simpleImage.$(filename-wo-extension). > >> >> > >> >> IE. if BR2_LINUX_KERNEL_DTS_FILE = /path/to/dts/xupv5.dts then > >> >> BR2_LINUX_KERNEL_IMAGE_TARGET=simpleImage.xupv5. > >> >> > >> >> Spenser > >> >> > >> >> On Feb 13, 2012 1:14 PM, "Alvaro Gamez" <alvaro.gamez@hazent.com> > >> >> wrote: > >> >>> > >> >>> Ok, now that I have a little time I'm trying to make it work. > >> >>> > >> >>> I haven't had any problem yet with GCC tune. However, I'm getting > the > >> >>> following error while trying to build the kernel > >> >>> > >> >>> make[2]: *** No rule to make target > >> >>> `arch/microblaze/boot/lx9_mmu.dtb', > >> >>> needed by `arch/microblaze/boot/system.dtb'. Stop. > >> >>> > >> >>> Any idea? > >> >>> > >> >>> Regards > >> >>> > >> >>> > >> >>> 2012/2/13 Alvaro Gamez <alvaro.gamez@hazent.com> > >> >>>> > >> >>>> I am yet to test it. I just found yersterday that buildroot exists > :) > >> >>>> > >> >>>> > >> >>>> 2012/2/13 Spenser Gilliland <spenser309@gmail.com> > >> >>>>> > >> >>>>> Alvaro, > >> >>>>> > >> >>>>> Did you have issues with the GCC tune? I had to remove that line > >> >>>>> from > >> >>>>> the original patch. > >> >>>>> > >> >>>>> Spenser > >> >>>>> > >> >>>>> On Sun, Feb 12, 2012 at 5:07 PM, Alvaro Gamez > >> >>>>> <alvaro.gamez@hazent.com> > >> >>>>> wrote: > >> >>>>> > Hi > >> >>>>> > > >> >>>>> > I am also interested on Microblaze support, hence I rescued the > >> >>>>> > old > >> >>>>> > patch > >> >>>>> > from the archives, merged it against latest git revision and > >> >>>>> > published on > >> >>>>> > github.com/agamez/buildroot > >> >>>>> > > >> >>>>> > I attach the new patch, should apply cleanly to latest version > on > >> >>>>> > git. > >> >>>>> > > >> >>>>> > Even though Stephan Hoffmann work is pretty good, I think the > path > >> >>>>> > of > >> >>>>> > the > >> >>>>> > new files should be modified from > >> >>>>> > board/relinux/avnet_LX9MicroBoard/ > >> >>>>> > to > >> >>>>> > board/avnet/LX9MicroBoard/ > >> >>>>> > > >> >>>>> > I didn't want to do that myself out of respect for the real > author > >> >>>>> > of > >> >>>>> > the > >> >>>>> > patch, since this is merely a repost. > >> >>>>> > > >> >>>>> > Regards, > >> >>>>> > > >> >>>>> > ?lvaro G?mez Machado > >> >>>>> > > >> >>>>> > From f4345407e3f23ebda7d91c53d81413cea51e1381 Mon Sep 17 > 00:00:00 > >> >>>>> > 2001 > >> >>>>> > From: Stephan Hoffmann <sho@relinux.de> > >> >>>>> > Date: Wed, 23 Nov 2011 11:42:40 +0100 > >> >>>>> > Subject: [PATCH] Added support for the Microblaze soft CPU > >> >>>>> > > >> >>>>> > --- > >> >>>>> > board/relinux/avnet_LX9MicroBoard/README | 64 +++++ > >> >>>>> > board/relinux/avnet_LX9MicroBoard/TODO | 19 ++ > >> >>>>> > board/relinux/avnet_LX9MicroBoard/lx9_mmu.dts | 247 > >> >>>>> > ++++++++++++++++++++ > >> >>>>> > .../relinux/avnet_LX9MicroBoard/lx9_mmu_defconfig | 68 > ++++++ > >> >>>>> > configs/spartan6lx9_mb_defconfig | 17 ++ > >> >>>>> > linux/Config.in | 8 + > >> >>>>> > linux/linux.mk | 12 + > >> >>>>> > target/Config.in.arch | 6 +- > >> >>>>> > 8 files changed, 440 insertions(+), 1 deletions(-) > >> >>>>> > create mode 100644 board/relinux/avnet_LX9MicroBoard/README > >> >>>>> > create mode 100644 board/relinux/avnet_LX9MicroBoard/TODO > >> >>>>> > create mode 100644 > board/relinux/avnet_LX9MicroBoard/lx9_mmu.dts > >> >>>>> > create mode 100644 > >> >>>>> > board/relinux/avnet_LX9MicroBoard/lx9_mmu_defconfig > >> >>>>> > create mode 100644 configs/spartan6lx9_mb_defconfig > >> >>>>> > > >> >>>>> > diff --git a/board/relinux/avnet_LX9MicroBoard/README > >> >>>>> > b/board/relinux/avnet_LX9MicroBoard/README > >> >>>>> > new file mode 100644 > >> >>>>> > index 0000000..a2e9247 > >> >>>>> > --- /dev/null > >> >>>>> > +++ b/board/relinux/avnet_LX9MicroBoard/README > >> >>>>> > @@ -0,0 +1,64 @@ > >> >>>>> > +This is the buildroot board support for the Avnet Spartan6 LX9 > >> >>>>> > MicroBoard. > >> >>>>> > + > >> >>>>> > +The board can be bought from Avnet or from Trenz for a low > prize. > >> >>>>> > + > >> >>>>> > +To run the Linux built with buildroot you have to install the > >> >>>>> > FPGA > >> >>>>> > bitfile > >> >>>>> > +and the u-boot boot loader as described in the totorial > available > >> >>>>> > on > >> >>>>> > + > >> >>>>> > + http://www.em.avnet.com/s6microboard > >> >>>>> > + > >> >>>>> > +The image file (default name is simpleImage.lx9_mmu.ub) has to > be > >> >>>>> > +copied to your tftp folder (often /tftpboot/). > >> >>>>> > + > >> >>>>> > +Sample session: > >> >>>>> > + > >> >>>>> > +SPI Bootloader > >> >>>>> > +Loading binary image > >> >>>>> > +from flash @ address: 00060000 > >> >>>>> > +to RAM address: 83f00000 > >> >>>>> > +Done > >> >>>>> > + > >> >>>>> > + > >> >>>>> > +SDRAM : > >> >>>>> > + Icache:ON > >> >>>>> > + Dcache:ON > >> >>>>> > + U-Boot Start:0x83f00000 > >> >>>>> > +SF: Got idcode 20 ba 18 10 01 > >> >>>>> > +*** Warning - bad CRC, using default environment > >> >>>>> > + > >> >>>>> > +Net: Xilinx_Emaclite > >> >>>>> > +MAC: 00:0a:35:00:63:37 > >> >>>>> > +U-BOOT for Avnet-LX9-Microboard-AXI-tiny-13.1 > >> >>>>> > + > >> >>>>> > +BOOTP broadcast 1 > >> >>>>> > +DHCP client bound to address 192.168.11.122 > >> >>>>> > +Hit any key to stop autoboot: 0 > >> >>>>> > +U-Boot-PetaLinux> tftp simpleImage.lx9_mmu.ub > >> >>>>> > +Using Xilinx_Emaclite device > >> >>>>> > +TFTP from server 192.168.11.10; our IP address is > 192.168.11.122 > >> >>>>> > +Filename 't.ub'. > >> >>>>> > +Load address: 0x80002000 > >> >>>>> > +Loading: > >> >>>>> > > ################################################################# > >> >>>>> > + > >> >>>>> > > ################################################################# > >> >>>>> > + > >> >>>>> > > ################################################################# > >> >>>>> > + > >> >>>>> > > ################################################################# > >> >>>>> > + > >> >>>>> > > ################################################################# > >> >>>>> > + ############################## > >> >>>>> > +done > >> >>>>> > +Bytes transferred = 5207724 (4f76ac hex) > >> >>>>> > +U-Boot-PetaLinux> bootm > >> >>>>> > +## Booting kernel from Legacy Image at 80002000 ... > >> >>>>> > + Image Name: Linux-3.1.0 > >> >>>>> > + Image Type: MicroBlaze Linux Kernel Image (uncompressed) > >> >>>>> > + Data Size: 5207660 Bytes = 5 MB > >> >>>>> > + Load Address: 80000000 > >> >>>>> > + Entry Point: 80000000 > >> >>>>> > + Verifying Checksum ... OK > >> >>>>> > + Loading Kernel Image ... OK > >> >>>>> > +OK > >> >>>>> > +## Transferring control to Linux (at address 80000000), > >> >>>>> > 0x80000000 > >> >>>>> > ramdisk > >> >>>>> > 0x00000000, FDT 0x00000000... > >> >>>>> > +Early console on uartlite at 0x40600000 > >> >>>>> > +..... boot log skipped > >> >>>>> > + > >> >>>>> > +Welcome to Microblaze Buildroot > >> >>>>> > +Microblaze login: > >> >>>>> > diff --git a/board/relinux/avnet_LX9MicroBoard/TODO > >> >>>>> > b/board/relinux/avnet_LX9MicroBoard/TODO > >> >>>>> > new file mode 100644 > >> >>>>> > index 0000000..ca5ee94 > >> >>>>> > --- /dev/null > >> >>>>> > +++ b/board/relinux/avnet_LX9MicroBoard/TODO > >> >>>>> > @@ -0,0 +1,19 @@ > >> >>>>> > +TODO list for the Spartan LX9 Microboard > >> >>>>> > + > >> >>>>> > +Generate u-boot within buildroot > >> >>>>> > +================================ > >> >>>>> > +Currently, we need to use the u-boot provided by Avnet. > >> >>>>> > + > >> >>>>> > +Provide config files for qemu > >> >>>>> > +============================= > >> >>>>> > + > >> >>>>> > +Generate toolchain > >> >>>>> > +================== > >> >>>>> > +Currently the GNU toolchain provided by Xilinx has to be used. > >> >>>>> > +Xilinx does not provide a toolchain suitable to build a > mmu-less > >> >>>>> > +Linux system, but omitting the mmu saved space within the FPGA. > >> >>>>> > + > >> >>>>> > +Bring up mmu-less system > >> >>>>> > +======================== > >> >>>>> > +Hopefully this is easy as soon as we have a working toolchain > >> >>>>> > +with flt support. > >> >>>>> > diff --git a/board/relinux/avnet_LX9MicroBoard/lx9_mmu.dts > >> >>>>> > b/board/relinux/avnet_LX9MicroBoard/lx9_mmu.dts > >> >>>>> > new file mode 100644 > >> >>>>> > index 0000000..8ffedd9 > >> >>>>> > --- /dev/null > >> >>>>> > +++ b/board/relinux/avnet_LX9MicroBoard/lx9_mmu.dts > >> >>>>> > @@ -0,0 +1,247 @@ > >> >>>>> > +/* > >> >>>>> > + * Device Tree Generator version: 1.3 > >> >>>>> > + * > >> >>>>> > + * (C) Copyright 2007-2008 Xilinx, Inc. > >> >>>>> > + * (C) Copyright 2007-2009 Michal Simek > >> >>>>> > + * > >> >>>>> > + * Michal SIMEK <monstr@monstr.eu> > >> >>>>> > + * > >> >>>>> > + * This program is free software; you can redistribute it > and/or > >> >>>>> > + * modify it under the terms of the GNU General Public License > as > >> >>>>> > + * published by the Free Software Foundation; either version 2 > of > >> >>>>> > + * the License, or (at your option) any later version. > >> >>>>> > + * > >> >>>>> > + * This program is distributed in the hope that it will be > >> >>>>> > useful, > >> >>>>> > + * but WITHOUT ANY WARRANTY; without even the implied warranty > of > >> >>>>> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > >> >>>>> > + * GNU General Public License for more details. > >> >>>>> > + * > >> >>>>> > + * You should have received a copy of the GNU General Public > >> >>>>> > License > >> >>>>> > + * along with this program; if not, write to the Free Software > >> >>>>> > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, > >> >>>>> > + * MA 02111-1307 USA > >> >>>>> > + * > >> >>>>> > + * CAUTION: This file is automatically generated by libgen. > >> >>>>> > + * Version: Xilinx EDK 13.2 EDK_O.61xd > >> >>>>> > + * > >> >>>>> > + * XPS project directory: device-tree_bsp_230-orig > >> >>>>> > + */ > >> >>>>> > + > >> >>>>> > +/dts-v1/; > >> >>>>> > +/ { > >> >>>>> > + #address-cells = <1>; > >> >>>>> > + #size-cells = <1>; > >> >>>>> > + compatible = "xlnx,microblaze"; > >> >>>>> > + model = "testing"; > >> >>>>> > + MCB3_LPDDR: memory at 80000000 { > >> >>>>> > + device_type = "memory"; > >> >>>>> > + reg = < 0x80000000 0x4000000 >; > >> >>>>> > + } ; > >> >>>>> > + aliases { > >> >>>>> > + ethernet0 = &Ethernet_MAC; > >> >>>>> > + serial0 = &USB_Uart; > >> >>>>> > + } ; > >> >>>>> > + chosen { > >> >>>>> > + bootargs = "console=ttyUL0"; > >> >>>>> > + linux,stdout-path = "/axi at 0/serial at 40600000"; > >> >>>>> > + } ; > >> >>>>> > + cpus { > >> >>>>> > + #address-cells = <1>; > >> >>>>> > + #cpus = <0x1>; > >> >>>>> > + #size-cells = <0>; > >> >>>>> > + microblaze_0: cpu at 0 { > >> >>>>> > + clock-frequency = <66666667>; > >> >>>>> > + compatible = "xlnx,microblaze-8.20.a"; > >> >>>>> > + d-cache-baseaddr = <0x80000000>; > >> >>>>> > + d-cache-highaddr = <0x83ffffff>; > >> >>>>> > + d-cache-line-size = <0x10>; > >> >>>>> > + d-cache-size = <0x2000>; > >> >>>>> > + device_type = "cpu"; > >> >>>>> > + i-cache-baseaddr = <0x80000000>; > >> >>>>> > + i-cache-highaddr = <0x83ffffff>; > >> >>>>> > + i-cache-line-size = <0x10>; > >> >>>>> > + i-cache-size = <0x2000>; > >> >>>>> > + model = "microblaze,8.20.a"; > >> >>>>> > + reg = <0>; > >> >>>>> > + timebase-frequency = <66666667>; > >> >>>>> > + xlnx,addr-tag-bits = <0xd>; > >> >>>>> > + xlnx,allow-dcache-wr = <0x1>; > >> >>>>> > + xlnx,allow-icache-wr = <0x1>; > >> >>>>> > + xlnx,area-optimized = <0x0>; > >> >>>>> > + xlnx,avoid-primitives = <0x0>; > >> >>>>> > + xlnx,branch-target-cache-size = <0x0>; > >> >>>>> > + xlnx,cache-byte-size = <0x2000>; > >> >>>>> > + xlnx,d-axi = <0x1>; > >> >>>>> > + xlnx,d-lmb = <0x1>; > >> >>>>> > + xlnx,d-plb = <0x0>; > >> >>>>> > + xlnx,data-size = <0x20>; > >> >>>>> > + xlnx,dcache-addr-tag = <0xd>; > >> >>>>> > + xlnx,dcache-always-used = <0x1>; > >> >>>>> > + xlnx,dcache-byte-size = <0x2000>; > >> >>>>> > + xlnx,dcache-data-width = <0x0>; > >> >>>>> > + xlnx,dcache-force-tag-lutram = <0x0>; > >> >>>>> > + xlnx,dcache-interface = <0x0>; > >> >>>>> > + xlnx,dcache-line-len = <0x4>; > >> >>>>> > + xlnx,dcache-use-fsl = <0x0>; > >> >>>>> > + xlnx,dcache-use-writeback = <0x0>; > >> >>>>> > + xlnx,dcache-victims = <0x0>; > >> >>>>> > + xlnx,debug-enabled = <0x1>; > >> >>>>> > + xlnx,div-zero-exception = <0x0>; > >> >>>>> > + xlnx,dynamic-bus-sizing = <0x1>; > >> >>>>> > + xlnx,ecc-use-ce-exception = <0x0>; > >> >>>>> > + xlnx,edge-is-positive = <0x1>; > >> >>>>> > + xlnx,endianness = <0x1>; > >> >>>>> > + xlnx,family = "spartan6"; > >> >>>>> > + xlnx,fault-tolerant = <0x0>; > >> >>>>> > + xlnx,fpu-exception = <0x0>; > >> >>>>> > + xlnx,freq = <0x3f940ab>; > >> >>>>> > + xlnx,fsl-data-size = <0x20>; > >> >>>>> > + xlnx,fsl-exception = <0x0>; > >> >>>>> > + xlnx,fsl-links = <0x0>; > >> >>>>> > + xlnx,i-axi = <0x0>; > >> >>>>> > + xlnx,i-lmb = <0x1>; > >> >>>>> > + xlnx,i-plb = <0x0>; > >> >>>>> > + xlnx,icache-always-used = <0x1>; > >> >>>>> > + xlnx,icache-data-width = <0x0>; > >> >>>>> > + xlnx,icache-force-tag-lutram = <0x0>; > >> >>>>> > + xlnx,icache-interface = <0x0>; > >> >>>>> > + xlnx,icache-line-len = <0x4>; > >> >>>>> > + xlnx,icache-streams = <0x0>; > >> >>>>> > + xlnx,icache-use-fsl = <0x0>; > >> >>>>> > + xlnx,icache-victims = <0x0>; > >> >>>>> > + xlnx,ill-opcode-exception = <0x0>; > >> >>>>> > + xlnx,instance = "microblaze_0"; > >> >>>>> > + xlnx,interconnect = <0x2>; > >> >>>>> > + xlnx,interconnect-m-axi-dc-aw-register = <0x0>; > >> >>>>> > + xlnx,interconnect-m-axi-dc-read-issuing = <0x2>; > >> >>>>> > + xlnx,interconnect-m-axi-dc-w-register = <0x0>; > >> >>>>> > + xlnx,interconnect-m-axi-dc-write-issuing = <0x20>; > >> >>>>> > + xlnx,interconnect-m-axi-dp-read-issuing = <0x1>; > >> >>>>> > + xlnx,interconnect-m-axi-dp-write-issuing = <0x1>; > >> >>>>> > + xlnx,interconnect-m-axi-ic-read-issuing = <0x2>; > >> >>>>> > + xlnx,interconnect-m-axi-ip-read-issuing = <0x1>; > >> >>>>> > + xlnx,interrupt-is-edge = <0x0>; > >> >>>>> > + xlnx,lockstep-slave = <0x0>; > >> >>>>> > + xlnx,mmu-dtlb-size = <0x1>; > >> >>>>> > + xlnx,mmu-itlb-size = <0x1>; > >> >>>>> > + xlnx,mmu-privileged-instr = <0x0>; > >> >>>>> > + xlnx,mmu-tlb-access = <0x3>; > >> >>>>> > + xlnx,mmu-zones = <0x2>; > >> >>>>> > + xlnx,number-of-pc-brk = <0x1>; > >> >>>>> > + xlnx,number-of-rd-addr-brk = <0x0>; > >> >>>>> > + xlnx,number-of-wr-addr-brk = <0x0>; > >> >>>>> > + xlnx,opcode-0x0-illegal = <0x0>; > >> >>>>> > + xlnx,optimization = <0x0>; > >> >>>>> > + xlnx,pvr = <0x0>; > >> >>>>> > + xlnx,pvr-user1 = <0x0>; > >> >>>>> > + xlnx,pvr-user2 = <0x0>; > >> >>>>> > + xlnx,reset-msr = <0x0>; > >> >>>>> > + xlnx,sco = <0x0>; > >> >>>>> > + xlnx,stream-interconnect = <0x0>; > >> >>>>> > + xlnx,unaligned-exceptions = <0x0>; > >> >>>>> > + xlnx,use-barrel = <0x1>; > >> >>>>> > + xlnx,use-branch-target-cache = <0x0>; > >> >>>>> > + xlnx,use-dcache = <0x1>; > >> >>>>> > + xlnx,use-div = <0x0>; > >> >>>>> > + xlnx,use-ext-brk = <0x1>; > >> >>>>> > + xlnx,use-ext-nm-brk = <0x1>; > >> >>>>> > + xlnx,use-extended-fsl-instr = <0x0>; > >> >>>>> > + xlnx,use-fpu = <0x0>; > >> >>>>> > + xlnx,use-hw-mul = <0x1>; > >> >>>>> > + xlnx,use-icache = <0x1>; > >> >>>>> > + xlnx,use-interrupt = <0x1>; > >> >>>>> > + xlnx,use-mmu = <0x3>; > >> >>>>> > + xlnx,use-msr-instr = <0x1>; > >> >>>>> > + xlnx,use-pcmp-instr = <0x0>; > >> >>>>> > + xlnx,use-stack-protection = <0x0>; > >> >>>>> > + } ; > >> >>>>> > + } ; > >> >>>>> > + axi4lite_0: axi at 0 { > >> >>>>> > + #address-cells = <1>; > >> >>>>> > + #size-cells = <1>; > >> >>>>> > + compatible = "xlnx,axi-interconnect-1.03.a", > >> >>>>> > "simple-bus"; > >> >>>>> > + ranges ; > >> >>>>> > + Ethernet_MAC: ethernet at 40e00000 { > >> >>>>> > + compatible = "xlnx,axi-ethernetlite-1.00.a", > >> >>>>> > "xlnx,xps-ethernetlite-1.00.a"; > >> >>>>> > + device_type = "network"; > >> >>>>> > + interrupt-parent = <µblaze_0_intc>; > >> >>>>> > + interrupts = < 2 0 >; > >> >>>>> > + local-mac-address = [ 00 0a 35 aa de 00 ]; > >> >>>>> > +// phy-handle = <&phy0>; > >> >>>>> > + reg = < 0x40e00000 0x10000 >; > >> >>>>> > + xlnx,duplex = <0x1>; > >> >>>>> > + xlnx,family = "spartan6"; > >> >>>>> > + xlnx,include-global-buffers = <0x0>; > >> >>>>> > + xlnx,include-internal-loopback = <0x0>; > >> >>>>> > + xlnx,include-mdio = <0x1>; > >> >>>>> > + xlnx,include-phy-constraints = <0x1>; > >> >>>>> > + xlnx,interconnect-s-axi-read-acceptance = <0x1>; > >> >>>>> > + xlnx,interconnect-s-axi-write-acceptance = <0x1>; > >> >>>>> > + xlnx,rx-ping-pong = <0x0>; > >> >>>>> > + xlnx,s-axi-aclk-period-ps = <0x3a98>; > >> >>>>> > + xlnx,s-axi-id-width = <0x1>; > >> >>>>> > + xlnx,s-axi-supports-narrow-burst = <0x0>; > >> >>>>> > + xlnx,tx-ping-pong = <0x0>; > >> >>>>> > +/* > >> >>>>> > + mdio { > >> >>>>> > + #address-cells = <1>; > >> >>>>> > + #size-cells = <0>; > >> >>>>> > + phy0: phy at 7 { > >> >>>>> > + compatible = "marvell,88e1111"; > >> >>>>> > + device_type = "ethernet-phy"; > >> >>>>> > + reg = <7>; > >> >>>>> > + } ; > >> >>>>> > + } ; > >> >>>>> > +*/ > >> >>>>> > + } ; > >> >>>>> > + SPI_FLASH: spi at 40a00000 { > >> >>>>> > + compatible = "xlnx,axi-spi-1.01.a", > >> >>>>> > "xlnx,xps-spi-2.00.a"; > >> >>>>> > + interrupt-parent = <µblaze_0_intc>; > >> >>>>> > + interrupts = < 1 2 >; > >> >>>>> > + reg = < 0x40a00000 0x10000 >; > >> >>>>> > + xlnx,family = "spartan6"; > >> >>>>> > + xlnx,fifo-exist = <0x1>; > >> >>>>> > + xlnx,num-ss-bits = <0x1>; > >> >>>>> > + xlnx,num-transfer-bits = <0x8>; > >> >>>>> > + xlnx,sck-ratio = <0x4>; > >> >>>>> > + } ; > >> >>>>> > + USB_Uart: serial at 40600000 { > >> >>>>> > + clock-frequency = <66666667>; > >> >>>>> > + compatible = "xlnx,axi-uartlite-1.02.a", > >> >>>>> > "xlnx,xps-uartlite-1.00.a"; > >> >>>>> > + current-speed = <115200>; > >> >>>>> > + device_type = "serial"; > >> >>>>> > + interrupt-parent = <µblaze_0_intc>; > >> >>>>> > + interrupts = < 3 0 >; > >> >>>>> > + port-number = <0>; > >> >>>>> > + reg = < 0x40600000 0x10000 >; > >> >>>>> > + xlnx,baudrate = <0x1c200>; > >> >>>>> > + xlnx,data-bits = <0x8>; > >> >>>>> > + xlnx,family = "spartan6"; > >> >>>>> > + xlnx,odd-parity = <0x1>; > >> >>>>> > + xlnx,s-axi-aclk-freq-hz = <0x3f940ab>; > >> >>>>> > + xlnx,use-parity = <0x0>; > >> >>>>> > + } ; > >> >>>>> > + microblaze_0_intc: interrupt-controller at 41200000 { > >> >>>>> > + #interrupt-cells = <0x2>; > >> >>>>> > + compatible = "xlnx,axi-intc-1.01.a", > >> >>>>> > "xlnx,xps-intc-1.00.a"; > >> >>>>> > + interrupt-controller ; > >> >>>>> > + reg = < 0x41200000 0x10000 >; > >> >>>>> > + xlnx,kind-of-intr = <0xc>; > >> >>>>> > + xlnx,num-intr-inputs = <0x4>; > >> >>>>> > + } ; > >> >>>>> > + system_timer: timer at 41c00000 { > >> >>>>> > + clock-frequency = <66666667>; > >> >>>>> > + compatible = "xlnx,axi-timer-1.02.a", > >> >>>>> > "xlnx,xps-timer-1.00.a"; > >> >>>>> > + interrupt-parent = <µblaze_0_intc>; > >> >>>>> > + interrupts = < 0 2 >; > >> >>>>> > + reg = < 0x41c00000 0x10000 >; > >> >>>>> > + xlnx,count-width = <0x20>; > >> >>>>> > + xlnx,family = "spartan6"; > >> >>>>> > + xlnx,gen0-assert = <0x1>; > >> >>>>> > + xlnx,gen1-assert = <0x1>; > >> >>>>> > + xlnx,one-timer-only = <0x0>; > >> >>>>> > + xlnx,trig0-assert = <0x1>; > >> >>>>> > + xlnx,trig1-assert = <0x1>; > >> >>>>> > + } ; > >> >>>>> > + } ; > >> >>>>> > +} ; > >> >>>>> > diff --git a/board/relinux/avnet_LX9MicroBoard/lx9_mmu_defconfig > >> >>>>> > b/board/relinux/avnet_LX9MicroBoard/lx9_mmu_defconfig > >> >>>>> > new file mode 100644 > >> >>>>> > index 0000000..5d01ca0 > >> >>>>> > --- /dev/null > >> >>>>> > +++ b/board/relinux/avnet_LX9MicroBoard/lx9_mmu_defconfig > >> >>>>> > @@ -0,0 +1,68 @@ > >> >>>>> > +CONFIG_EXPERIMENTAL=y > >> >>>>> > +CONFIG_SYSVIPC=y > >> >>>>> > +CONFIG_IKCONFIG=y > >> >>>>> > +CONFIG_IKCONFIG_PROC=y > >> >>>>> > +CONFIG_BLK_DEV_INITRD=y > >> >>>>> > +CONFIG_INITRAMFS_SOURCE="rootfs.cpio" > >> >>>>> > +CONFIG_INITRAMFS_COMPRESSION_GZIP=y > >> >>>>> > +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set > >> >>>>> > +CONFIG_EXPERT=y > >> >>>>> > +CONFIG_KALLSYMS_ALL=y > >> >>>>> > +CONFIG_KALLSYMS_EXTRA_PASS=y > >> >>>>> > +# CONFIG_HOTPLUG is not set > >> >>>>> > +# CONFIG_BASE_FULL is not set > >> >>>>> > +# CONFIG_FUTEX is not set > >> >>>>> > +# CONFIG_EPOLL is not set > >> >>>>> > +# CONFIG_SIGNALFD is not set > >> >>>>> > +# CONFIG_SHMEM is not set > >> >>>>> > +CONFIG_SLAB=y > >> >>>>> > +CONFIG_MODULES=y > >> >>>>> > +CONFIG_MODULE_UNLOAD=y > >> >>>>> > +# CONFIG_BLK_DEV_BSG is not set > >> >>>>> > +# CONFIG_OPT_LIB_ASM is not set > >> >>>>> > +CONFIG_KERNEL_BASE_ADDR=0x80000000 > >> >>>>> > +CONFIG_XILINX_MICROBLAZE0_FAMILY="spartan6" > >> >>>>> > +CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1 > >> >>>>> > +# CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR is not set > >> >>>>> > +CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1 > >> >>>>> > +CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=1 > >> >>>>> > +CONFIG_XILINX_MICROBLAZE0_HW_VER="8.20.a" > >> >>>>> > +CONFIG_HZ_100=y > >> >>>>> > +CONFIG_MMU=y > >> >>>>> > +CONFIG_CMDLINE_BOOL=y > >> >>>>> > +CONFIG_CMDLINE_FORCE=y > >> >>>>> > +CONFIG_NET=y > >> >>>>> > +CONFIG_PACKET=y > >> >>>>> > +CONFIG_UNIX=y > >> >>>>> > +CONFIG_INET=y > >> >>>>> > +# CONFIG_INET_LRO is not set > >> >>>>> > +# CONFIG_IPV6 is not set > >> >>>>> > +CONFIG_PROC_DEVICETREE=y > >> >>>>> > +CONFIG_BLK_DEV_RAM=y > >> >>>>> > +CONFIG_BLK_DEV_RAM_SIZE=8192 > >> >>>>> > +CONFIG_NETDEVICES=y > >> >>>>> > +CONFIG_NET_ETHERNET=y > >> >>>>> > +CONFIG_XILINX_EMACLITE=y > >> >>>>> > +# CONFIG_INPUT is not set > >> >>>>> > +# CONFIG_SERIO is not set > >> >>>>> > +# CONFIG_VT is not set > >> >>>>> > +CONFIG_SERIAL_UARTLITE=y > >> >>>>> > +CONFIG_SERIAL_UARTLITE_CONSOLE=y > >> >>>>> > +# CONFIG_HW_RANDOM is not set > >> >>>>> > +# CONFIG_HWMON is not set > >> >>>>> > +# CONFIG_USB_SUPPORT is not set > >> >>>>> > +CONFIG_EXT2_FS=y > >> >>>>> > +# CONFIG_DNOTIFY is not set > >> >>>>> > +CONFIG_NFS_FS=y > >> >>>>> > +CONFIG_NFS_V3=y > >> >>>>> > +CONFIG_CIFS=y > >> >>>>> > +CONFIG_CIFS_STATS=y > >> >>>>> > +CONFIG_CIFS_STATS2=y > >> >>>>> > +CONFIG_PARTITION_ADVANCED=y > >> >>>>> > +CONFIG_DEBUG_KERNEL=y > >> >>>>> > +CONFIG_DETECT_HUNG_TASK=y > >> >>>>> > +CONFIG_DEBUG_SLAB=y > >> >>>>> > +CONFIG_DEBUG_SPINLOCK=y > >> >>>>> > +CONFIG_DEBUG_INFO=y > >> >>>>> > +CONFIG_EARLY_PRINTK=y > >> >>>>> > +# CONFIG_CRYPTO_ANSI_CPRNG is not set > >> >>>>> > diff --git a/configs/spartan6lx9_mb_defconfig > >> >>>>> > b/configs/spartan6lx9_mb_defconfig > >> >>>>> > new file mode 100644 > >> >>>>> > index 0000000..0329bb4 > >> >>>>> > --- /dev/null > >> >>>>> > +++ b/configs/spartan6lx9_mb_defconfig > >> >>>>> > @@ -0,0 +1,17 @@ > >> >>>>> > +BR2_microblaze=y > >> >>>>> > +BR2_TOOLCHAIN_EXTERNAL=y > >> >>>>> > > >> >>>>> > > +BR2_TOOLCHAIN_EXTERNAL_PATH="/opt/microblazeel-unknown-linux-gnu/" > >> >>>>> > > >> >>>>> > > >> >>>>> > > +BR2_TOOLCHAIN_EXTERNAL_CUSTOM_PREFIX="microblazeel-unknown-linux-gnu" > >> >>>>> > +BR2_TOOLCHAIN_EXTERNAL_CUSTOM_GLIBC=y > >> >>>>> > +BR2_TOOLCHAIN_EXTERNAL_CXX=y > >> >>>>> > +BR2_TARGET_GENERIC_HOSTNAME="Microblaze Buildroot" > >> >>>>> > +BR2_TARGET_GENERIC_ISSUE="Welcome to Microblaze Buildroot" > >> >>>>> > +BR2_TARGET_GENERIC_GETTY_PORT="ttyUL0" > >> >>>>> > +# BR2_TARGET_ROOTFS_TAR is not set > >> >>>>> > +BR2_TARGET_ROOTFS_INITRAMFS=y > >> >>>>> > +BR2_LINUX_KERNEL=y > >> >>>>> > +BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y > >> >>>>> > > >> >>>>> > > >> >>>>> > > +BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(TOPDIR)/board/relinux/avnet_LX9MicroBoard/lx9_mmu_defconfig" > >> >>>>> > > >> >>>>> > > >> >>>>> > > +BR2_LINUX_KERNEL_DTS_FILE="$(TOPDIR)/board/relinux/avnet_LX9MicroBoard/lx9_mmu.dts" > >> >>>>> > +BR2_LINUX_KERNEL_IMAGE_TARGET_CUSTOM=y > >> >>>>> > +BR2_LINUX_KERNEL_IMAGE_TARGET_NAME="simpleImage.lx9_mmu" > >> >>>>> > diff --git a/linux/Config.in b/linux/Config.in > >> >>>>> > index 86dc32a..138feb3 100644 > >> >>>>> > --- a/linux/Config.in > >> >>>>> > +++ b/linux/Config.in > >> >>>>> > @@ -120,6 +120,14 @@ config BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE > >> >>>>> > help > >> >>>>> > Path to the kernel configuration file > >> >>>>> > > >> >>>>> > +config BR2_LINUX_KERNEL_DTS_FILE > >> >>>>> > + string "Device Tree dts file location" > >> >>>>> > + depends on BR2_microblaze > >> >>>>> > + help > >> >>>>> > + Path from where the dts file has to be copied > >> >>>>> > + The final "custom target" name depends on the > >> >>>>> > + dts file name: > >> >>>>> > + <name>.dts --> simpleImage.<name> > >> >>>>> > # > >> >>>>> > # Binary format > >> >>>>> > # > >> >>>>> > diff --git a/linux/linux.mk b/linux/linux.mk > >> >>>>> > index ae236d4..4a24f18 100644 > >> >>>>> > --- a/linux/linux.mk > >> >>>>> > +++ b/linux/linux.mk > >> >>>>> > @@ -117,6 +117,18 @@ endef > >> >>>>> > > >> >>>>> > LINUX_POST_PATCH_HOOKS += LINUX_APPLY_PATCHES > >> >>>>> > > >> >>>>> > +ifeq ($(KERNEL_ARCH),microblaze) > >> >>>>> > +# on microblaze, we always want mkimage > >> >>>>> > +LINUX_DEPENDENCIES+=host-uboot-tools > >> >>>>> > + > >> >>>>> > +define LINUX_COPY_DTS > >> >>>>> > + if test -f "$(BR2_LINUX_KERNEL_DTS_FILE)" ; then \ > >> >>>>> > + cp $(BR2_LINUX_KERNEL_DTS_FILE) > >> >>>>> > $(@D)/arch/microblaze/boot/dts ; \ > >> >>>>> > + else \ > >> >>>>> > + echo "Cannot copy dts file!" ; \ > >> >>>>> > + fi > >> >>>>> > +endef > >> >>>>> > +endif > >> >>>>> > > >> >>>>> > ifeq ($(BR2_LINUX_KERNEL_USE_DEFCONFIG),y) > >> >>>>> > KERNEL_SOURCE_CONFIG = $(KERNEL_ARCH_PATH)/configs/$(call > >> >>>>> > qstrip,$(BR2_LINUX_KERNEL_DEFCONFIG))_defconfig > >> >>>>> > diff --git a/target/Config.in.arch b/target/Config.in.arch > >> >>>>> > index 417441d..3a75585 100644 > >> >>>>> > --- a/target/Config.in.arch > >> >>>>> > +++ b/target/Config.in.arch > >> >>>>> > @@ -21,6 +21,8 @@ config BR2_i386 > >> >>>>> > config BR2_m68k > >> >>>>> > bool "m68k" > >> >>>>> > depends on BROKEN # ice in uclibc / inet_ntoa_r > >> >>>>> > +config BR2_microblaze > >> >>>>> > + bool "microblaze" > >> >>>>> > config BR2_mips > >> >>>>> > bool "mips" > >> >>>>> > config BR2_mipsel > >> >>>>> > @@ -508,6 +510,7 @@ config BR2_ARCH > >> >>>>> > default "i686" if BR2_x86_athlon > >> >>>>> > default "i686" if BR2_x86_athlon_4 > >> >>>>> > default "m68k" if BR2_m68k > >> >>>>> > + default "microblaze" if BR2_microblaze > >> >>>>> > default "mips" if BR2_mips > >> >>>>> > default "mipsel" if BR2_mipsel > >> >>>>> > default "powerpc" if BR2_powerpc > >> >>>>> > @@ -533,7 +536,7 @@ config BR2_ARCH > >> >>>>> > > >> >>>>> > config BR2_ENDIAN > >> >>>>> > string > >> >>>>> > - default "LITTLE" if BR2_arm || BR2_bfin || BR2_i386 || > >> >>>>> > BR2_mipsel || \ > >> >>>>> > + default "LITTLE" if BR2_arm || BR2_bfin || BR2_i386 || > >> >>>>> > BR2_mipsel || > >> >>>>> > BR2_microblaze || \ > >> >>>>> > BR2_sh3 || BR2_sh4 || BR2_sh4a || BR2_x86_64 || > >> >>>>> > BR2_sh64 > >> >>>>> > default "BIG" if BR2_armeb || BR2_avr32 || BR2_m68k || > >> >>>>> > BR2_mips || \ > >> >>>>> > BR2_powerpc || BR2_sh2 || BR2_sh2a || \ > >> >>>>> > @@ -598,6 +601,7 @@ config BR2_GCC_TARGET_TUNE > >> >>>>> > default 68030 if BR2_m68k_68030 > >> >>>>> > default 68040 if BR2_m68k_68040 > >> >>>>> > default 68060 if BR2_m68k_68060 > >> >>>>> > + default microblaze if BR2_microblaze > >> >>>>> > default mips1 if BR2_mips_1 > >> >>>>> > default mips2 if BR2_mips_2 > >> >>>>> > default mips3 if BR2_mips_3 > >> >>>>> > -- > >> >>>>> > 1.7.9 > >> >>>>> > > >> >>>>> > > >> >>>>> > > >> >>>>> > 2012/2/11 <buildroot-request@busybox.net> > >> >>>>> >> > >> >>>>> >> > >> >>>>> >> On Saturday 11 February 2012 05:58:37 Spenser Gilliland wrote: > >> >>>>> >> > I'm using this Microblaze patch for my project. Will it be > >> >>>>> >> > part > >> >>>>> >> > of > >> >>>>> >> > the official release that is coming up soon? > >> >>>>> >> > >> >>>>> >> I'm afraid it got lost between the cracks. Could you repost > it? > >> >>>>> >> > >> >>>>> >> Regards, > >> >>>>> >> Arnout > >> >>>>> > > >> >>>>> > > >> >>>>> > > >> >>>>> > _______________________________________________ > >> >>>>> > buildroot mailing list > >> >>>>> > buildroot at busybox.net > >> >>>>> > http://lists.busybox.net/mailman/listinfo/buildroot > >> >>>>> > >> >>>>> > >> >>>>> > >> >>>>> -- > >> >>>>> Spenser Gilliland > >> >>>>> Computer Engineer > >> >>>>> Illinois Institute of Technology > >> >>>> > >> >>>> > >> >>>> > >> >>>> > >> >>>> -- > >> >>>> ?lvaro G?mez Machado > >> >>>> > >> >>> > >> >>> > >> >>> > >> >>> -- > >> >>> ?lvaro G?mez Machado > >> >>> > >> >>> > >> >>> _______________________________________________ > >> >>> buildroot mailing list > >> >>> buildroot at busybox.net > >> >>> http://lists.busybox.net/mailman/listinfo/buildroot > >> > > >> > > >> > > >> > > >> > -- > >> > ?lvaro G?mez Machado > >> > > >> > >> > >> > >> -- > >> Spenser Gilliland > >> Computer Engineer > >> Illinois Institute of Technology > > > > > > > > > > -- > > ?lvaro G?mez Machado > > > > > > -- > Spenser Gilliland > Computer Engineer > Illinois Institute of Technology > -- ?lvaro G?mez Machado -------------- next part -------------- An HTML attachment was scrubbed... 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* [Buildroot] [PATCH] Adding Microblaze support to Buildroot 2012-02-12 23:07 [Buildroot] [PATCH] Adding Microblaze support to Buildroot Alvaro Gamez 2012-02-13 0:11 ` Spenser Gilliland @ 2012-02-13 7:59 ` Peter Korsgaard 2012-02-13 18:06 ` Stephan Hoffmann 1 sibling, 1 reply; 15+ messages in thread From: Peter Korsgaard @ 2012-02-13 7:59 UTC (permalink / raw) To: buildroot >>>>> "Alvaro" == Alvaro Gamez <alvaro.gamez@hazent.com> writes: Hi, Alvaro> I am also interested on Microblaze support, hence I rescued the Alvaro> old patch from the archives, merged it against latest git Alvaro> revision and published on github.com /agamez/buildroot Alvaro> I attach the new patch, should apply cleanly to latest version Alvaro> on git. Thanks. Alvaro> Even though Stephan Hoffmann work is pretty good, I think the Alvaro> path of the new files should be modified from Alvaro> board/relinux/avnet_LX9MicroBoard/ to board/avnet/LX9MicroBoard/ I agree. Alvaro> +++ b/configs/spartan6lx9_mb_defconfig Alvaro> @@ -0,0 +1,17 @@ Alvaro> +BR2_microblaze=y Alvaro> +BR2_TOOLCHAIN_EXTERNAL=y Alvaro> +BR2_TOOLCHAIN_EXTERNAL_PATH="/opt/microblazeel-unknown-linux-gnu/" Alvaro> +BR2_TOOLCHAIN_EXTERNAL_CUSTOM_PREFIX="microblazeel-unknown-linux-gnu" Is this toolchain available somewhere so I can test this? Having a defconfig which refers to something locally on a developer machine imho doesn't make much sense. -- Bye, Peter Korsgaard ^ permalink raw reply [flat|nested] 15+ messages in thread
* [Buildroot] [PATCH] Adding Microblaze support to Buildroot 2012-02-13 7:59 ` Peter Korsgaard @ 2012-02-13 18:06 ` Stephan Hoffmann 0 siblings, 0 replies; 15+ messages in thread From: Stephan Hoffmann @ 2012-02-13 18:06 UTC (permalink / raw) To: buildroot Am 13.02.2012 08:59, schrieb Peter Korsgaard: >>>>>> "Alvaro" == Alvaro Gamez <alvaro.gamez@hazent.com> writes: > Hi, > > Alvaro> I am also interested on Microblaze support, hence I rescued the > Alvaro> old patch from the archives, merged it against latest git > Alvaro> revision and published on github.com /agamez/buildroot > > Alvaro> I attach the new patch, should apply cleanly to latest version > Alvaro> on git. > > Thanks. > > Alvaro> Even though Stephan Hoffmann work is pretty good, I think the > Alvaro> path of the new files should be modified from > Alvaro> board/relinux/avnet_LX9MicroBoard/ to board/avnet/LX9MicroBoard/ > > I agree. That's perfectly O.K. for me. > Alvaro> +++ b/configs/spartan6lx9_mb_defconfig > Alvaro> @@ -0,0 +1,17 @@ > Alvaro> +BR2_microblaze=y > Alvaro> +BR2_TOOLCHAIN_EXTERNAL=y > Alvaro> +BR2_TOOLCHAIN_EXTERNAL_PATH="/opt/microblazeel-unknown-linux-gnu/" > Alvaro> +BR2_TOOLCHAIN_EXTERNAL_CUSTOM_PREFIX="microblazeel-unknown-linux-gnu" > > Is this toolchain available somewhere so I can test this? Unfortunatelly, at the time I submitted my patch, toolchain and u-boot were only available for download from xilinx or avnet. The toolchain (tgz archive, binary) is available at: |git://git.xilinx.com/xldk/microblaze_v1.0_le.git| Some more information can be found in the Xilinx Wiki: http://xilinx.wikidot.com/microblaze-linux-le I tried to build u-boot, but did not succeed, mostly because of lack of time. There are patches for gcc available in the internet, maybe someone can try to build the toolchain using them. It would be a great benefit being able to build a mmu-less toolchain for small systems. Unfortunatelly, I don't have much time for this in the next few months. That is also true for the qemu-config. I believe it is only a few lines in some config file away, but I am not experienced with qemu. Someone who knows qemu and device trees may manage it quickly. > Having a defconfig which refers to something locally on a developer > machine imho doesn't make much sense. > Of course. Kind regards Stephan -- reLinux - Stephan Hoffmann Am Schmidtgrund 124 50765 K?ln Tel. +49.221.95595-19 Fax: -64 www.reLinux.de sho at reLinux.de -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.busybox.net/pipermail/buildroot/attachments/20120213/9b41d10f/attachment-0001.html> ^ permalink raw reply [flat|nested] 15+ messages in thread
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* [Buildroot] Adding Microblaze support to Buildroot [not found] <4EBC554E.7050605@gmail.com> @ 2011-11-10 22:55 ` Spenser Gilliland 2011-11-11 12:45 ` Stephan Hoffmann 0 siblings, 1 reply; 15+ messages in thread From: Spenser Gilliland @ 2011-11-10 22:55 UTC (permalink / raw) To: buildroot Hi, I'm trying to add the Microblaze arch to buildroot. However, I'm having some issues. The following error comes up when building the intermediate compiler. zh_HK.utf8 zh_SG.utf8 zh_TW.utf8 zu_ZA.utf8 /usr/bin/make -j1 -C /home/spenser/Research/buildroot/buildroot/output/toolchain/uClibc \ ARCH="microblaze" \ PREFIX=/home/spenser/Research/buildroot/buildroot/output/toolchain/uClibc_dev/ \ DEVEL_PREFIX=/usr/ \ RUNTIME_PREFIX=/home/spenser/Research/buildroot/buildroot/output/toolchain/uClibc_dev/ \ HOSTCC="/usr/bin/gcc" headers \ lib/crt1.o lib/crti.o lib/crtn.o \ install_headers make[1]: Entering directory `/home/spenser/Research/buildroot/buildroot/output/toolchain/uClibc' make[1]: Nothing to be done for `headers'. make[1]: `lib/crt1.o' is up to date. make[1]: `lib/crti.o' is up to date. make[1]: `lib/crtn.o' is up to date. INSTALL include -> /home/spenser/Research/buildroot/buildroot/output/toolchain/uClibc_dev//usr/include unifdef: can't open include/bits/semaphore.h: No such file or directory unifdef: can't open include/bits/pthreadtypes.h: No such file or directory make[1]: Leaving directory `/home/spenser/Research/buildroot/buildroot/output/toolchain/uClibc' # Install the kernel headers to the first stage gcc include dir # if necessary if [ ! -f /home/spenser/Research/buildroot/buildroot/output/toolchain/uClibc_dev/usr/include/linux/version.h ]; then \ cp -pLR /home/spenser/Research/buildroot/buildroot/output/toolchain/linux/include/* \ /home/spenser/Research/buildroot/buildroot/output/toolchain/uClibc_dev/usr/include/; \ fi /home/spenser/Research/buildroot/buildroot/output/host/usr/bin/microblaze-unknown-linux-uclibc-gcc -nostdlib -nostartfiles -shared -x c /dev/null -o /home/spenser/Research/buildroot/buildroot/output/toolchain/uClibc_dev/usr/lib/libc.so /tmp/ccU2bXNp.o: could not read symbols: No error collect2: ld returned 1 exit status make: *** [/home/spenser/Research/buildroot/buildroot/output/toolchain/uClibc/.configured] Error 1 The part which states "could not read symbols: No error" leaves me with very little idea on how to proceed. Additionally, the missing semaphore.h and pthreadtypes.h could be related. Which component provides these files and how do I ensure they are installed correctly. My changes are available at git://github.com/Spenser309/buildroot.git Thanks, Spenser -- Spenser Gilliland Illinois Institute of Technology Computer Engineering ^ permalink raw reply [flat|nested] 15+ messages in thread
* [Buildroot] Adding Microblaze support to Buildroot 2011-11-10 22:55 ` [Buildroot] " Spenser Gilliland @ 2011-11-11 12:45 ` Stephan Hoffmann 2011-11-22 8:52 ` Stephan Hoffmann 0 siblings, 1 reply; 15+ messages in thread From: Stephan Hoffmann @ 2011-11-11 12:45 UTC (permalink / raw) To: buildroot Am 10.11.2011 23:55, schrieb Spenser Gilliland: > Hi, I'm trying to add the Microblaze arch to buildroot. Hello Spenser, I am also working on Microblaze, but did not try to build a toolchain yet. There is some information on this on the internet, especially here: http://www.monstr.eu/. There are lots of patches for the toolchain and I don't know how complete the Bicroblaze support in the original gcc is. Instead I use the glibc toolchain provided by Xilinx and the u-boot provided by Avnet for my Avnet Spartan 6 LX9 MicroBoard. I made a small patch adding the config options and default configurations for buildroot and the kernel. The modifications I made are inspired by prior work I found at some places in the web. I am also planning to publish my microblaze configuration, but this is still work in progress. Originally, I tried to build a nommu configuration because my FPGA is very small and I wanted to save space. This did not work because the toolchain for FLT binaries that I found on the net did not harmonize with the kernel, the kernel was not able to load the binaries. Finally, I suspended this because of lack of time. If your efforts to buils a toolchain succeed this approach might get interesting again. Xilinx supports only the mmu configuration for Linux. Regarding the Linux kernel recent versions (3.x) work more or less out of the box after providing a valid device tree file matching the Microblaze configuration. Kind regards Stephan > > My changes are available at git://github.com/Spenser309/buildroot.git > > Thanks, > Spenser > From: Stephan Hoffmann <sho@relinux.de> Date: Mon, 31 Oct 2011 14:15:55 +0100 Subject: [PATCH] Added support for MicroBlaze soft cpu Signed-off-by: Stephan Hoffmann <sho@relinux.de> --- board/relinux/s6lx9microboard/s6lx9_mmu_defconfig | 67 +++++++++++++++++++++ configs/spartan6lx9_mb_defconfig | 21 +++++++ linux/Config.in | 5 ++ linux/linux.mk | 8 +++ target/Config.in.arch | 6 ++- 5 files changed, 106 insertions(+), 1 deletions(-) create mode 100644 board/relinux/s6lx9microboard/s6lx9_mmu_defconfig create mode 100644 configs/spartan6lx9_mb_defconfig diff --git a/board/relinux/s6lx9microboard/s6lx9_mmu_defconfig b/board/relinux/s6lx9microboard/s6lx9_mmu_defconfig new file mode 100644 index 0000000..ef398de --- /dev/null +++ b/board/relinux/s6lx9microboard/s6lx9_mmu_defconfig @@ -0,0 +1,67 @@ +CONFIG_EXPERIMENTAL=y +CONFIG_SYSVIPC=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="rootfs.cpio" +CONFIG_INITRAMFS_COMPRESSION_GZIP=y +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_EXPERT=y +CONFIG_KALLSYMS_ALL=y +CONFIG_KALLSYMS_EXTRA_PASS=y +# CONFIG_HOTPLUG is not set +# CONFIG_BASE_FULL is not set +# CONFIG_FUTEX is not set +# CONFIG_EPOLL is not set +# CONFIG_SIGNALFD is not set +# CONFIG_SHMEM is not set +CONFIG_SLAB=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_BLK_DEV_BSG is not set +CONFIG_KERNEL_BASE_ADDR=0x80000000 +CONFIG_XILINX_MICROBLAZE0_FAMILY="spartan6" +CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1 +CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR=1 +CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1 +CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=1 +CONFIG_XILINX_MICROBLAZE0_HW_VER="8.20.a" +CONFIG_HZ_100=y +CONFIG_MMU=y +CONFIG_CMDLINE_BOOL=y +CONFIG_CMDLINE_FORCE=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_INET=y +# CONFIG_INET_LRO is not set +# CONFIG_IPV6 is not set +CONFIG_PROC_DEVICETREE=y +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_SIZE=8192 +CONFIG_NETDEVICES=y +CONFIG_NET_ETHERNET=y +CONFIG_XILINX_EMACLITE=y +# CONFIG_INPUT is not set +# CONFIG_SERIO is not set +# CONFIG_VT is not set +CONFIG_SERIAL_UARTLITE=y +CONFIG_SERIAL_UARTLITE_CONSOLE=y +# CONFIG_HW_RANDOM is not set +# CONFIG_HWMON is not set +# CONFIG_USB_SUPPORT is not set +CONFIG_EXT2_FS=y +# CONFIG_DNOTIFY is not set +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +CONFIG_CIFS=y +CONFIG_CIFS_STATS=y +CONFIG_CIFS_STATS2=y +CONFIG_PARTITION_ADVANCED=y +CONFIG_DEBUG_KERNEL=y +CONFIG_DETECT_HUNG_TASK=y +CONFIG_DEBUG_SLAB=y +CONFIG_DEBUG_SPINLOCK=y +CONFIG_DEBUG_INFO=y +CONFIG_EARLY_PRINTK=y +# CONFIG_CRYPTO_ANSI_CPRNG is not set diff --git a/configs/spartan6lx9_mb_defconfig b/configs/spartan6lx9_mb_defconfig new file mode 100644 index 0000000..150ad88 --- /dev/null +++ b/configs/spartan6lx9_mb_defconfig @@ -0,0 +1,21 @@ +BR2_microblaze=y +BR2_JLEVEL=4 +BR2_TOOLCHAIN_EXTERNAL=y +BR2_TOOLCHAIN_EXTERNAL_PATH="/opt/microblazeel-unknown-linux-gnu/" +BR2_TOOLCHAIN_EXTERNAL_CUSTOM_PREFIX="microblazeel-unknown-linux-gnu" +BR2_TOOLCHAIN_EXTERNAL_CUSTOM_GLIBC=y +BR2_TOOLCHAIN_EXTERNAL_CXX=y +BR2_TARGET_GENERIC_HOSTNAME="Microblaze Buildroot" +BR2_TARGET_GENERIC_ISSUE="Welcome to Microblaze Buildroot" +BR2_TARGET_GENERIC_GETTY_PORT="ttyUL0" +# BR2_TARGET_ROOTFS_TAR is not set +BR2_TARGET_ROOTFS_INITRAMFS=y +BR2_LINUX_KERNEL=y +BR2_LINUX_KERNEL_CUSTOM_VERSION=y +BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="3.0.7" +BR2_LINUX_KERNEL_VERSION="3.0.7" +BR2_LINUX_KERNEL_PATCH="http://www.kernel.org/pub/linux/kernel/projects/rt/3.0/patch-3.0.7-rt20.patch" +BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y +BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(TOPDIR)/board/relinux/s6lx9microboard/s6lx9_mmu_defconfig" +BR2_LINUX_KERNEL_IMAGE_TARGET_CUSTOM=y +BR2_LINUX_KERNEL_IMAGE_TARGET_NAME="simpleImage.xilinx" diff --git a/linux/Config.in b/linux/Config.in index 0082ca8..358747d 100644 --- a/linux/Config.in +++ b/linux/Config.in @@ -121,6 +121,11 @@ config BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE help Path to the kernel configuration file +config BR2_LINUX_KERNEL_DTS_FILE + string "Device Tree dts file location" + depends on BR2_microblaze + help + Path from where the dts file has to be copied # # Binary format # diff --git a/linux/linux.mk b/linux/linux.mk index 9beb706..690d9f4 100644 --- a/linux/linux.mk +++ b/linux/linux.mk @@ -117,6 +117,14 @@ endef LINUX_POST_PATCH_HOOKS += LINUX_APPLY_PATCHES +ifeq ($(KERNEL_ARCH),microblaze) +define LINUX_COPY_DTS + if test -f "$(BR2_LINUX_KERNEL_DTS_FILE)" ; then \ + cp $(BR2_LINUX_KERNEL_DTS_FILE) $(@D)/arch/microblaze/boot/dts ; \ + fi +endef +LINUX_POST_PATCH_HOOKS += LINUX_COPY_DTS +endif ifeq ($(BR2_LINUX_KERNEL_USE_DEFCONFIG),y) KERNEL_SOURCE_CONFIG = $(KERNEL_ARCH_PATH)/configs/$(call qstrip,$(BR2_LINUX_KERNEL_DEFCONFIG))_defconfig diff --git a/target/Config.in.arch b/target/Config.in.arch index 5e9fad4..24edfa5 100644 --- a/target/Config.in.arch +++ b/target/Config.in.arch @@ -21,6 +21,8 @@ config BR2_i386 config BR2_m68k bool "m68k" depends on BROKEN # ice in uclibc / inet_ntoa_r +config BR2_microblaze + bool "microblaze" config BR2_mips bool "mips" config BR2_mipsel @@ -490,6 +492,7 @@ config BR2_ARCH default "i686" if BR2_x86_athlon default "i686" if BR2_x86_athlon_4 default "m68k" if BR2_m68k + default "microblaze" if BR2_microblaze default "mips" if BR2_mips default "mipsel" if BR2_mipsel default "powerpc" if BR2_powerpc @@ -515,7 +518,7 @@ config BR2_ARCH config BR2_ENDIAN string - default "LITTLE" if BR2_arm || BR2_bfin || BR2_i386 || BR2_mipsel || \ + default "LITTLE" if BR2_arm || BR2_bfin || BR2_i386 || BR2_mipsel || BR2_microblaze || \ BR2_sh3 || BR2_sh4 || BR2_sh4a || BR2_x86_64 || BR2_sh64 default "BIG" if BR2_armeb || BR2_avr32 || BR2_m68k || BR2_mips || \ BR2_powerpc || BR2_sh2 || BR2_sh2a || \ @@ -580,6 +583,7 @@ config BR2_GCC_TARGET_TUNE default 68030 if BR2_m68k_68030 default 68040 if BR2_m68k_68040 default 68060 if BR2_m68k_68060 + default microblaze if BR2_microblaze default mips1 if BR2_mips_1 default mips2 if BR2_mips_2 default mips3 if BR2_mips_3 -- 1.7.0.4 -- reLinux - Stephan Hoffmann Am Schmidtgrund 124 50765 K?ln Tel. +49.221.95595-19 Fax: -64 www.reLinux.de sho at reLinux.de ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [Buildroot] Adding Microblaze support to Buildroot 2011-11-11 12:45 ` Stephan Hoffmann @ 2011-11-22 8:52 ` Stephan Hoffmann 2011-11-22 9:14 ` Peter Korsgaard 0 siblings, 1 reply; 15+ messages in thread From: Stephan Hoffmann @ 2011-11-22 8:52 UTC (permalink / raw) To: buildroot Am 11.11.2011 13:45, schrieb Stephan Hoffmann: > Am 10.11.2011 23:55, schrieb Spenser Gilliland: >> Hi, I'm trying to add the Microblaze arch to buildroot. > Hello Spenser, > > I am also working on Microblaze, but did not try to build a toolchain > yet. There is some information on this on the internet, especially here: > http://www.monstr.eu/. There are lots of patches for the toolchain and I > don't know how complete the Microblaze support in the original gcc is. Hello Spenser, did you have any success in building the toolchain in the meantime? Hello all, is there an interest in adding the Microblaze architecture to buildroot? And, if it is, would it be acceptable to rely on toolchain and/or bootloader coming from the board vendor or Xilinx, at least for some time? Kind regards Stephan -- reLinux - Stephan Hoffmann Am Schmidtgrund 124 50765 K?ln Tel. +49.221.95595-19 Fax: -64 www.reLinux.de sho at reLinux.de ^ permalink raw reply [flat|nested] 15+ messages in thread
* [Buildroot] Adding Microblaze support to Buildroot 2011-11-22 8:52 ` Stephan Hoffmann @ 2011-11-22 9:14 ` Peter Korsgaard 2011-11-23 11:09 ` Stephan Hoffmann 0 siblings, 1 reply; 15+ messages in thread From: Peter Korsgaard @ 2011-11-22 9:14 UTC (permalink / raw) To: buildroot >>>>> "Stephan" == Stephan Hoffmann <sho@relinux.de> writes: Stephan> Hello all, Stephan> is there an interest in adding the Microblaze architecture to Stephan> buildroot? Yes, I would say so. Stephan> And, if it is, would it be acceptable to rely on toolchain Stephan> and/or bootloader coming from the board vendor or Xilinx, at Stephan> least for some time? We're doing that already for avr32, so that's not really a big problem. I'm more worrying about how much we need to patch individual packages to work on microblaze. In the past we had quite some avr32 patches, which made it harder to move to newer versions and added extra complexity to BR. But as long as the microblaze developers work on getting their changes upstream, I don't have a problem with adding microblaze support. -- Bye, Peter Korsgaard ^ permalink raw reply [flat|nested] 15+ messages in thread
* [Buildroot] Adding Microblaze support to Buildroot 2011-11-22 9:14 ` Peter Korsgaard @ 2011-11-23 11:09 ` Stephan Hoffmann 2011-11-23 13:54 ` Thomas Petazzoni 0 siblings, 1 reply; 15+ messages in thread From: Stephan Hoffmann @ 2011-11-23 11:09 UTC (permalink / raw) To: buildroot Am 22.11.2011 10:14, schrieb Peter Korsgaard: >>>>>> "Stephan" == Stephan Hoffmann <sho@relinux.de> writes: > Stephan> Hello all, > > Stephan> is there an interest in adding the Microblaze architecture to > Stephan> buildroot? > > Yes, I would say so. > > I'm more worrying about how much we need to patch individual > packages to work on microblaze. To which extend do you expect individual packages being tested on the different architectures? By now I have a busybox only configuration that can boot with the U-Boot available from the Avnet website. I can send a patch against buildroot's next branch if desired. Stephan -- reLinux - Stephan Hoffmann Am Schmidtgrund 124 50765 K?ln Tel. +49.221.95595-19 Fax: -64 www.reLinux.de sho at reLinux.de ^ permalink raw reply [flat|nested] 15+ messages in thread
* [Buildroot] Adding Microblaze support to Buildroot 2011-11-23 11:09 ` Stephan Hoffmann @ 2011-11-23 13:54 ` Thomas Petazzoni 2011-11-27 17:38 ` [Buildroot] [PATCH] " Stephan Hoffmann 0 siblings, 1 reply; 15+ messages in thread From: Thomas Petazzoni @ 2011-11-23 13:54 UTC (permalink / raw) To: buildroot Le Wed, 23 Nov 2011 12:09:53 +0100, Stephan Hoffmann <sho@relinux.de> a ?crit : > To which extend do you expect individual packages being tested on the > different architectures? On Blackfin, there are many packages that don't build, because they simply cannot build on !MMU systems. Our goal is to progressively add the "depends on BR2_USE_MMU" on all packages that need a MMU to build/work properly. So, it's definitely not a problem if not all packages have not been tested with Microblaze. I'll add a Microblaze toolchain into my Buildroot testing stuff, it will raise issues, and we will fix them as we go. > By now I have a busybox only configuration that can boot with the > U-Boot available from the Avnet website. > > I can send a patch against buildroot's next branch if desired. Excellent. Would be good to have : * A patch adding the general Microblaze support * A patch that adds some defconfig for the Microblaze board you have * It would be even better if another patch could add a defconfig for the Microblaze Qemu emulation, so that those not having a Microblaze board can test. Best regards, Thomas -- Thomas Petazzoni, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com ^ permalink raw reply [flat|nested] 15+ messages in thread
* [Buildroot] [PATCH] Adding Microblaze support to Buildroot 2011-11-23 13:54 ` Thomas Petazzoni @ 2011-11-27 17:38 ` Stephan Hoffmann 2011-11-28 5:26 ` Baruch Siach 0 siblings, 1 reply; 15+ messages in thread From: Stephan Hoffmann @ 2011-11-27 17:38 UTC (permalink / raw) To: buildroot Am 23.11.2011 14:54, schrieb Thomas Petazzoni: > Excellent. Would be good to have : > > * A patch adding the general Microblaze support > > * A patch that adds some defconfig for the Microblaze board you have > Hello all, here is my patch to introduce MicroBlaze to buildroot. Comments are highly welcome! Kind regards Stephan Hoffmann ^ permalink raw reply [flat|nested] 15+ messages in thread
* [Buildroot] [PATCH] Adding Microblaze support to Buildroot 2011-11-27 17:38 ` [Buildroot] [PATCH] " Stephan Hoffmann @ 2011-11-28 5:26 ` Baruch Siach 2012-02-11 4:58 ` Spenser Gilliland 0 siblings, 1 reply; 15+ messages in thread From: Baruch Siach @ 2011-11-28 5:26 UTC (permalink / raw) To: buildroot Hi Stephan, On Sun, Nov 27, 2011 at 06:38:45PM +0100, Stephan Hoffmann wrote: > Am 23.11.2011 14:54, schrieb Thomas Petazzoni: > > Excellent. Would be good to have : > > > > * A patch adding the general Microblaze support > > > > * A patch that adds some defconfig for the Microblaze board you have > > > Hello all, > > here is my patch to introduce MicroBlaze to buildroot. Comments are > highly welcome! [snip] > +This is the buildroot board support for the Avnet Spartan6 LX9 MicroBoard. > + > +The board can be bought from Avnet or from Trenz for a low prize. s/prize/price/ baruch -- ~. .~ Tk Open Systems =}------------------------------------------------ooO--U--Ooo------------{= - baruch at tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il - ^ permalink raw reply [flat|nested] 15+ messages in thread
* [Buildroot] [PATCH] Adding Microblaze support to Buildroot 2011-11-28 5:26 ` Baruch Siach @ 2012-02-11 4:58 ` Spenser Gilliland 2012-02-11 16:18 ` Arnout Vandecappelle 0 siblings, 1 reply; 15+ messages in thread From: Spenser Gilliland @ 2012-02-11 4:58 UTC (permalink / raw) To: buildroot Hey, I'm using this Microblaze patch for my project. Will it be part of the official release that is coming up soon? Spenser On Sun, Nov 27, 2011 at 11:26 PM, Baruch Siach <baruch@tkos.co.il> wrote: > Hi Stephan, > > On Sun, Nov 27, 2011 at 06:38:45PM +0100, Stephan Hoffmann wrote: >> Am 23.11.2011 14:54, schrieb Thomas Petazzoni: >> > Excellent. Would be good to have : >> > >> > ?* A patch adding the general Microblaze support >> > >> > ?* A patch that adds some defconfig for the Microblaze board you have >> > >> Hello all, >> >> here is my patch to introduce MicroBlaze to buildroot. Comments are >> highly welcome! > > [snip] > >> +This is the buildroot board support for the Avnet Spartan6 LX9 MicroBoard. >> + >> +The board can be bought from Avnet or from Trenz for a low prize. > > s/prize/price/ > > baruch > > -- > ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ~. .~ ? Tk Open Systems > =}------------------------------------------------ooO--U--Ooo------------{= > ? - baruch at tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il - > _______________________________________________ > buildroot mailing list > buildroot at busybox.net > http://lists.busybox.net/mailman/listinfo/buildroot -- Spenser Gilliland Computer Engineer Illinois Institute of Technology ^ permalink raw reply [flat|nested] 15+ messages in thread
* [Buildroot] [PATCH] Adding Microblaze support to Buildroot 2012-02-11 4:58 ` Spenser Gilliland @ 2012-02-11 16:18 ` Arnout Vandecappelle 2012-02-12 22:44 ` Spenser Gilliland 0 siblings, 1 reply; 15+ messages in thread From: Arnout Vandecappelle @ 2012-02-11 16:18 UTC (permalink / raw) To: buildroot On Saturday 11 February 2012 05:58:37 Spenser Gilliland wrote: > I'm using this Microblaze patch for my project. Will it be part of > the official release that is coming up soon? I'm afraid it got lost between the cracks. Could you repost it? Regards, Arnout -- Arnout Vandecappelle arnout at mind be Senior Embedded Software Architect +32-16-286540 Essensium/Mind http://www.mind.be G.Geenslaan 9, 3001 Leuven, Belgium BE 872 984 063 RPR Leuven LinkedIn profile: http://www.linkedin.com/in/arnoutvandecappelle GPG fingerprint: 7CB5 E4CC 6C2E EFD4 6E3D A754 F963 ECAB 2450 2F1F ^ permalink raw reply [flat|nested] 15+ messages in thread
* [Buildroot] [PATCH] Adding Microblaze support to Buildroot 2012-02-11 16:18 ` Arnout Vandecappelle @ 2012-02-12 22:44 ` Spenser Gilliland 0 siblings, 0 replies; 15+ messages in thread From: Spenser Gilliland @ 2012-02-12 22:44 UTC (permalink / raw) To: buildroot Sure what's the best way to do that? I had to make some changes to the initial patch. Spenser On Sat, Feb 11, 2012 at 10:18 AM, Arnout Vandecappelle <arnout@mind.be> wrote: > On Saturday 11 February 2012 05:58:37 Spenser Gilliland wrote: >> I'm using this Microblaze patch for my project. ?Will it be part of >> the official release that is coming up soon? > > ?I'm afraid it got lost between the cracks. ?Could you repost it? > > ?Regards, > ?Arnout > > -- > Arnout Vandecappelle ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? arnout at mind be > Senior Embedded Software Architect ? ? ? ? ? ? ? ? +32-16-286540 > Essensium/Mind ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? http://www.mind.be > G.Geenslaan 9, 3001 Leuven, Belgium ? ? ? ? ? ? ? ?BE 872 984 063 RPR Leuven > LinkedIn profile: http://www.linkedin.com/in/arnoutvandecappelle > GPG fingerprint: ?7CB5 E4CC 6C2E EFD4 6E3D A754 F963 ECAB 2450 2F1F -- Spenser Gilliland Computer Engineer Illinois Institute of Technology ^ permalink raw reply [flat|nested] 15+ messages in thread
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2012-02-12 23:07 [Buildroot] [PATCH] Adding Microblaze support to Buildroot Alvaro Gamez
2012-02-13 0:11 ` Spenser Gilliland
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2012-02-13 19:13 ` Alvaro Gamez
[not found] ` <CA+appbN9=yvud1LwSCpgMvUh=Qc8DoQbz=gyjfvOUmzmpsopfQ@mail.gmail.com>
2012-02-13 19:40 ` Alvaro Gamez
2012-02-13 19:46 ` Spenser Gilliland
2012-02-13 19:48 ` Alvaro Gamez
2012-02-13 19:51 ` Spenser Gilliland
2012-02-13 20:11 ` Alvaro Gamez
2012-02-13 7:59 ` Peter Korsgaard
2012-02-13 18:06 ` Stephan Hoffmann
[not found] <4EBC554E.7050605@gmail.com>
2011-11-10 22:55 ` [Buildroot] " Spenser Gilliland
2011-11-11 12:45 ` Stephan Hoffmann
2011-11-22 8:52 ` Stephan Hoffmann
2011-11-22 9:14 ` Peter Korsgaard
2011-11-23 11:09 ` Stephan Hoffmann
2011-11-23 13:54 ` Thomas Petazzoni
2011-11-27 17:38 ` [Buildroot] [PATCH] " Stephan Hoffmann
2011-11-28 5:26 ` Baruch Siach
2012-02-11 4:58 ` Spenser Gilliland
2012-02-11 16:18 ` Arnout Vandecappelle
2012-02-12 22:44 ` Spenser Gilliland
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