Re: [Buildroot] [PATCH v2 4/4] configs/qemu_riscv32_nommu_virt_defconfig: New defconfig

[Waldemar Brodkorb <wbx@openadk.org>]

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Hi Romain,
Romain Naour wrote,

> Hi Waldemar,
> 
> Le 01/10/2023 à 13:39, Waldemar Brodkorb a écrit :
> > Hi Romain,
> > 
> > Romain Naour wrote,
> > 
> >> Hello,
> >>
> >> Le 17/12/2022 à 06:13, Jesse Taube a écrit :
> >>> Add RISC-V 32-bit nommu defconfig for QEMU virt machine with MMU
> >>> disabled.
> >>>
> >>> Unlike qemu_riscv32_virt, qemu_riscv32_nommu_virt does not use OpenSBI,
> >>> since the kernel is running in machine mode (M-mode).
> >>>
> >>> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
> >>> Cc: Yimin Gu <ustcymgu@gmail.com>
> >>
> >> I rebased the elf2flt patch for risc32 [1] on top of elf2flt 2023.09 release,
> >> then I enabled the risc32 uclibc-ng support [2] without patching it since we use
> >> the latest release (v1.0.44) containing this commit [3].
> >>
> >> But the system doesn't boot due to a reloc issue:
> >>
> >> binfmt_flat: reloc outside program 0xfff7b6dc (0 - 0x9cec0/0x8a180), killing sh!
> >> Starting init: /bin/sh exists but couldn't execute it (error -8)
> >>
> >> This issue may be related to the toolchain used to build this defconfig (gcc
> >> 12.3.0 and binutils 2.40) that is newer than the toolchain used at the time this
> >> series was tested.
> > 
> > Can you share your elf2flt patch, please. 
> 
> Sure, It the initial patch from Jesse Taube but without the relocation part that
> was part of riscv64 commit:
> 
> https://github.com/uclinux-dev/elf2flt/commit/c5c8043c4d79a1cdd9bd359a542e6fdf3b04d5a1
> 
> I hope this can help.

See attached patch I am using, there is one change missing in your
patch.

best regards
 Waldemar

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diff -Nur elf2flt-v2023.04.orig/elf2flt.c elf2flt-v2023.04/elf2flt.c
--- elf2flt-v2023.04.orig/elf2flt.c	2023-09-04 11:29:05.952417209 +0200
+++ elf2flt-v2023.04/elf2flt.c	2023-09-04 11:30:05.371065966 +0200
@@ -81,7 +81,7 @@
 #include <elf/v850.h>
 #elif defined(TARGET_xtensa)
 #include <elf/xtensa.h>
-#elif defined(TARGET_riscv64)
+#elif defined(TARGET_riscv64) || defined(TARGET_riscv32)
 #include <elf/riscv.h>
 #endif
 
@@ -127,6 +127,8 @@
 #define ARCH	"xtensa"
 #elif defined(TARGET_riscv64)
 #define ARCH	"riscv64"
+#elif defined(TARGET_riscv32)
+#define ARCH	"riscv32"
 #else
 #error "Don't know how to support your CPU architecture??"
 #endif
@@ -822,7 +824,7 @@
 					goto good_32bit_resolved_reloc_update_text;
 				default:
 					goto bad_resolved_reloc;
-#elif defined(TARGET_riscv64)
+#elif defined(TARGET_riscv64) || defined(TARGET_riscv32)
 				case R_RISCV_NONE:
 				case R_RISCV_32_PCREL:
 				case R_RISCV_ADD8:
diff -Nur elf2flt-v2023.04.orig/ld-elf2flt.c elf2flt-v2023.04/ld-elf2flt.c
--- elf2flt-v2023.04.orig/ld-elf2flt.c	2023-09-04 11:28:59.072573514 +0200
+++ elf2flt-v2023.04/ld-elf2flt.c	2023-09-04 11:29:32.507813592 +0200
@@ -327,7 +327,7 @@
 	/* riscv adds a global pointer symbol to the linker file with the
 	   "RISCV_GP:" prefix. Remove the prefix for riscv64 architecture and
 	   the entire line for other architectures. */
-	if (streq(TARGET_CPU, "riscv64"))
+	if (streq(TARGET_CPU, "riscv64") || streq(TARGET_CPU, "riscv32"))
 		append_sed(&sed, "^RISCV_GP:", "");
 	else
 		append_sed(&sed, "^RISCV_GP:", NULL);

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