[PATCH v1 0/4] cros_ec: add support for newer versions of the Framework Laptop

["Dustin L. Howett" <dustin@howett.net>]

This patch series adds support for newer models of the Framework Laptop (both
13" and 16").

Currently-shipping models of the Framework Laptop use a Microchip embedded
controller that conforms to the MEC EC protocol -- that is, data and host
command exchanges occur on I/O ports 0x800 to 0x807 (inclusive). Newer models
have switched to an NPCX embedded controller, which uses the original Chrome EC
"Linear" memory-mapped I/O model.

However, those devices move the MMIO region for EC memory from the original
Chrome EC port range of 0x900-0x9FF to 0xE00-0xEFF. In addition, the ACPI node
for the EC device on these laptops indicates an I/O resource spanning 0x800 to
0x8FE when in truth, the device supports communication all the way through
0x8FF. 

To address these differences without impacting cros_ec_lpcs' compatibility with
Chromebook/Chromebox devices, this patch series adds DMI-match-specific driver
data through which we can detect per-machine "quirks". Quirks indicate changes
in behavior from cros_ec_lpcs' expectation, such as remapping the memory MMIO
window and handling I/O reservation windows differently.

Dustin L. Howett (4):
  cros_ec_lpc: introduce lpc_driver_data, a priv struct for the lpc
    device
  cros_ec_lpc: pass driver_data from DMI down to the device
  cros_ec_lpc: add a quirks system, and propagate quirks from DMI
  cros_ec_lpc: add quirks for the Framework Laptop

 drivers/platform/chrome/cros_ec_lpc.c | 61 ++++++++++++++++++++++++---
 1 file changed, 55 insertions(+), 6 deletions(-)

-- 
2.42.0