RE: [cip-dev] [PATCH 5.10.y-cip] clk: renesas: rzg2l: Fix FOUTPOSTDIV clk

RE: [cip-dev] [PATCH 5.10.y-cip] clk: renesas: rzg2l: Fix FOUTPOSTDIV clk

[Prabhakar Mahadev Lad]

> From: cip-dev@lists.cip-project.org <cip-dev@lists.cip-project.org> On
> Behalf Of Lad Prabhakar via lists.cip-project.org
> Sent: 11 December 2024 18:15
> To: cip-dev@lists.cip-project.org; Nobuhiro Iwamatsu
> <nobuhiro1.iwamatsu@toshiba.co.jp>; Pavel Machek <pavel@denx.de>
> Cc: Biju Das <biju.das.jz@bp.renesas.com>
> Subject: [cip-dev] [PATCH 5.10.y-cip] clk: renesas: rzg2l: Fix FOUTPOSTDIV
> clk
> 
> From: Biju Das <biju.das.jz@bp.renesas.com>
> 
> commit dabf72b85f298970e86891b5218459c17b57b26a upstream.
> 
> While computing foutpostdiv_rate, the value of params->pl5_fracin is
> discarded, which results in the wrong refresh rate. Fix the formula for
> computing foutpostdiv_rate.
> 
> Fixes: 1561380ee72f ("clk: renesas: rzg2l: Add FOUTPOSTDIV clk support")
> Signed-off-by: Hien Huynh <hien.huynh.px@renesas.com>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> Link: https://lore.kernel.org/20241024134236.315289-1-
> biju.das.jz@bp.renesas.com
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> ---
>  drivers/clk/renesas/rzg2l-cpg.c | 11 ++++++-----
>  1 file changed, 6 insertions(+), 5 deletions(-)
>
Gentle ping for review.

Cheers,
Prabhakar
 
> diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-
> cpg.c index b1952d2ee8c2..379292eb6fb1 100644
> --- a/drivers/clk/renesas/rzg2l-cpg.c
> +++ b/drivers/clk/renesas/rzg2l-cpg.c
> @@ -556,7 +556,7 @@ static unsigned long
> rzg2l_cpg_get_foutpostdiv_rate(struct rzg2l_pll5_param *params,
>  			       unsigned long rate)
>  {
> -	unsigned long foutpostdiv_rate;
> +	unsigned long foutpostdiv_rate, foutvco_rate;
> 
>  	params->pl5_intin = rate / MEGA;
>  	params->pl5_fracin = div_u64(((u64)rate % MEGA) << 24, MEGA); @@ -
> 565,10 +565,11 @@ rzg2l_cpg_get_foutpostdiv_rate(struct rzg2l_pll5_param
> *params,
>  	params->pl5_postdiv2 = 1;
>  	params->pl5_spread = 0x16;
> 
> -	foutpostdiv_rate =
> -		EXTAL_FREQ_IN_MEGA_HZ * MEGA / params->pl5_refdiv *
> -		((((params->pl5_intin << 24) + params->pl5_fracin)) >> 24) /
> -		(params->pl5_postdiv1 * params->pl5_postdiv2);
> +	foutvco_rate = div_u64(mul_u32_u32(EXTAL_FREQ_IN_MEGA_HZ * MEGA,
> +					   (params->pl5_intin << 24) + params-
> >pl5_fracin),
> +			       params->pl5_refdiv) >> 24;
> +	foutpostdiv_rate = DIV_ROUND_CLOSEST_ULL(foutvco_rate,
> +						 params->pl5_postdiv1 * params-
> >pl5_postdiv2);
> 
>  	return foutpostdiv_rate;
>  }
> --
> 2.43.0

Re: [cip-dev] [PATCH 5.10.y-cip] clk: renesas: rzg2l: Fix FOUTPOSTDIV clk

[Pavel Machek]

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Hi!

> > While computing foutpostdiv_rate, the value of params->pl5_fracin is
> > discarded, which results in the wrong refresh rate. Fix the formula for
> > computing foutpostdiv_rate.
> > 
> > Fixes: 1561380ee72f ("clk: renesas: rzg2l: Add FOUTPOSTDIV clk support")
> > Signed-off-by: Hien Huynh <hien.huynh.px@renesas.com>
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > Link: https://lore.kernel.org/20241024134236.315289-1-
> > biju.das.jz@bp.renesas.com
> > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > ---
> >  drivers/clk/renesas/rzg2l-cpg.c | 11 ++++++-----
> >  1 file changed, 6 insertions(+), 5 deletions(-)
> >
> Gentle ping for review.

Again, sorry for the delay. Should we have similar patch for 6.1? I
can't seem to find that in my mailbox...

Best regards,
								Pavel
-- 
DENX Software Engineering GmbH,        Managing Director: Erika Unter
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

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RE: [cip-dev] [PATCH 5.10.y-cip] clk: renesas: rzg2l: Fix FOUTPOSTDIV clk

[nobuhiro1.iwamatsu]

Hi all,

> -----Original Message-----
> From: Pavel Machek <pavel@denx.de>
> Sent: Thursday, December 19, 2024 12:53 AM
> To: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Cc: cip-dev@lists.cip-project.org; iwamatsu nobuhiro(岩松 信洋 ○ＤＩＴＣ□
> ＤＩＴ○ＯＳＴ) <nobuhiro1.iwamatsu@toshiba.co.jp>; Pavel Machek
> <pavel@denx.de>; Biju Das <biju.das.jz@bp.renesas.com>
> Subject: Re: [cip-dev] [PATCH 5.10.y-cip] clk: renesas: rzg2l: Fix
> FOUTPOSTDIV clk
> 
> Hi!
> 
> > > While computing foutpostdiv_rate, the value of params->pl5_fracin is
> > > discarded, which results in the wrong refresh rate. Fix the formula
> > > for computing foutpostdiv_rate.
> > >
> > > Fixes: 1561380ee72f ("clk: renesas: rzg2l: Add FOUTPOSTDIV clk
> > > support")
> > > Signed-off-by: Hien Huynh <hien.huynh.px@renesas.com>
> > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > > Link: https://lore.kernel.org/20241024134236.315289-1-
> > > biju.das.jz@bp.renesas.com
> > > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > > Signed-off-by: Lad Prabhakar
> > > <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > > ---
> > >  drivers/clk/renesas/rzg2l-cpg.c | 11 ++++++-----
> > >  1 file changed, 6 insertions(+), 5 deletions(-)
> > >
> > Gentle ping for review.
> 
> Again, sorry for the delay. Should we have similar patch for 6.1? I can't seem to
> find that in my mailbox...
> 

I could not find it either from mailbox and patchwork.
Perhaps a patch for 6.1.y-cip has not been posted.

Prabhakar, If we need this patch to 6.1.y-cip, could you send it ?

Best regards,
  Nobuhiro

RE: [cip-dev] [PATCH 5.10.y-cip] clk: renesas: rzg2l: Fix FOUTPOSTDIV clk

[Prabhakar Mahadev Lad]

Hi Pavel,

> From: Pavel Machek <pavel@denx.de>
> Sent: 18 December 2024 15:53
> To: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Cc: cip-dev@lists.cip-project.org; Nobuhiro Iwamatsu
> <nobuhiro1.iwamatsu@toshiba.co.jp>; Pavel Machek <pavel@denx.de>; Biju Das
> <biju.das.jz@bp.renesas.com>
> Subject: Re: [cip-dev] [PATCH 5.10.y-cip] clk: renesas: rzg2l: Fix
> FOUTPOSTDIV clk
> 
> Hi!
> 
> > > While computing foutpostdiv_rate, the value of params->pl5_fracin is
> > > discarded, which results in the wrong refresh rate. Fix the formula
> > > for computing foutpostdiv_rate.
> > >
> > > Fixes: 1561380ee72f ("clk: renesas: rzg2l: Add FOUTPOSTDIV clk
> > > support")
> > > Signed-off-by: Hien Huynh <hien.huynh.px@renesas.com>
> > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > > Link: https://lore.kernel.org/20241024134236.315289-1-
> > > biju.das.jz@bp.renesas.com
> > > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > > Signed-off-by: Lad Prabhakar
> > > <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > > ---
> > >  drivers/clk/renesas/rzg2l-cpg.c | 11 ++++++-----
> > >  1 file changed, 6 insertions(+), 5 deletions(-)
> > >
> > Gentle ping for review.
> 
> Again, sorry for the delay. Should we have similar patch for 6.1? I can't
> seem to find that in my mailbox...
> 
Thank you for the review. For 6.1 this patch should automatically land into CIP
via stable due to fixes tag.

Cheers,
Prabhakar

Re: [cip-dev] [PATCH 5.10.y-cip] clk: renesas: rzg2l: Fix FOUTPOSTDIV clk

[Pavel Machek]

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Hi!

> > Again, sorry for the delay. Should we have similar patch for 6.1? I can't
> > seem to find that in my mailbox...
> > 
> Thank you for the review. For 6.1 this patch should automatically land into CIP
> via stable due to fixes tag.

Ok, thanks for the info. Unless it is urgent, I believe it will be
better to wait for patch to land to 6.1 before merging 5.10 versions,
in future.

Best regards,
								Pavel
-- 
DENX Software Engineering GmbH,        Managing Director: Erika Unter
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

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[PATCH 5.10.y-cip] clk: renesas: rzg2l: Fix FOUTPOSTDIV clk

[Prabhakar]

From: Biju Das <biju.das.jz@bp.renesas.com>

commit dabf72b85f298970e86891b5218459c17b57b26a upstream.

While computing foutpostdiv_rate, the value of params->pl5_fracin
is discarded, which results in the wrong refresh rate. Fix the formula
for computing foutpostdiv_rate.

Fixes: 1561380ee72f ("clk: renesas: rzg2l: Add FOUTPOSTDIV clk support")
Signed-off-by: Hien Huynh <hien.huynh.px@renesas.com>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20241024134236.315289-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/clk/renesas/rzg2l-cpg.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-cpg.c
index b1952d2ee8c2..379292eb6fb1 100644
--- a/drivers/clk/renesas/rzg2l-cpg.c
+++ b/drivers/clk/renesas/rzg2l-cpg.c
@@ -556,7 +556,7 @@ static unsigned long
 rzg2l_cpg_get_foutpostdiv_rate(struct rzg2l_pll5_param *params,
 			       unsigned long rate)
 {
-	unsigned long foutpostdiv_rate;
+	unsigned long foutpostdiv_rate, foutvco_rate;
 
 	params->pl5_intin = rate / MEGA;
 	params->pl5_fracin = div_u64(((u64)rate % MEGA) << 24, MEGA);
@@ -565,10 +565,11 @@ rzg2l_cpg_get_foutpostdiv_rate(struct rzg2l_pll5_param *params,
 	params->pl5_postdiv2 = 1;
 	params->pl5_spread = 0x16;
 
-	foutpostdiv_rate =
-		EXTAL_FREQ_IN_MEGA_HZ * MEGA / params->pl5_refdiv *
-		((((params->pl5_intin << 24) + params->pl5_fracin)) >> 24) /
-		(params->pl5_postdiv1 * params->pl5_postdiv2);
+	foutvco_rate = div_u64(mul_u32_u32(EXTAL_FREQ_IN_MEGA_HZ * MEGA,
+					   (params->pl5_intin << 24) + params->pl5_fracin),
+			       params->pl5_refdiv) >> 24;
+	foutpostdiv_rate = DIV_ROUND_CLOSEST_ULL(foutvco_rate,
+						 params->pl5_postdiv1 * params->pl5_postdiv2);
 
 	return foutpostdiv_rate;
 }
-- 
2.43.0

Re: [cip-dev] [PATCH 5.10.y-cip] clk: renesas: rzg2l: Fix FOUTPOSTDIV clk

[Pavel Machek]

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Hi!

> commit dabf72b85f298970e86891b5218459c17b57b26a upstream.
> 
> While computing foutpostdiv_rate, the value of params->pl5_fracin
> is discarded, which results in the wrong refresh rate. Fix the formula
> for computing foutpostdiv_rate.

Sorry for the delay. This looks okay to me, and I can apply it (*).

Best regards,
								Pavel
(*) if it tests ok and nobody raises objections.
-- 
DENX Software Engineering GmbH,        Managing Director: Erika Unter
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

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