From: Pavel Machek <pavel@nabladev.com>
To: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Cc: cip-dev@lists.cip-project.org,
Nobuhiro Iwamatsu <nobuhiro.iwamatsu.x90@mail.toshiba>,
Pavel Machek <pavel@nabladev.com>,
Biju Das <biju.das.jz@bp.renesas.com>
Subject: Re: [PATCH 6.12.y-cip v2 07/10] dt-bindings: pinctrl: renesas,r9a09g077: Document pin configuration properties
Date: Tue, 7 Jul 2026 22:17:45 +0200 [thread overview]
Message-ID: <ak1e6WV392sQ09le@duo.ucw.cz> (raw)
In-Reply-To: <20260702102349.23431-8-prabhakar.mahadev-lad.rj@bp.renesas.com>
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Hi!
> +++ b/Documentation/devicetree/bindings/pinctrl/renesas,r9a09g077-pinctrl.yaml
> @@ -72,6 +72,23 @@ definitions:
> input: true
> input-enable: true
> output-enable: true
> + bias-disable: true
> + bias-pull-down: true
> + bias-pull-up: true
> + input-schmitt-enable: true
> + input-schmitt-disable: true
> + slew-rate:
> + description: 0 is slow slew rate, 1 is fast slew rate
> + enum: [0, 1]
Elsewhere in tree we have
Documentation/devicetree/bindings/clock/renesas,9series.yaml
renesas,slew-rate:
$ref: /schemas/types.yaml#/definitions/uint32
enum: [ 2000000, 3000000 ]
description: Output clock slew rate select in V/ns
atmel,at91-pio4-pinctrl.txt:
- for microchip,sama7g5-pinctrl only:
- slew-rate: 0 - disabled, 1 - enabled (default)
I guess having one solution would be best, and specifying real units
(V/ns) rather than fast/slow seems good to me.
Best regards,
Pavel
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next prev parent reply other threads:[~2026-07-07 20:17 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-02 10:23 [PATCH 6.12.y-cip v2 00/10] Add pin configuration and GPIO IRQ support to Renesas RZ/T2H SoC Lad Prabhakar
2026-07-02 10:23 ` [PATCH 6.12.y-cip v2 01/10] pinctrl: renesas: Remove unneeded semicolons Lad Prabhakar
2026-07-02 10:23 ` [PATCH 6.12.y-cip v2 02/10] pinctrl: renesas: rzt2h: Move GPIO enable/disable into separate function Lad Prabhakar
2026-07-02 10:23 ` [PATCH 6.12.y-cip v2 03/10] pinctrl: renesas: rzt2h: Allow .get_direction() for IRQ function GPIOs Lad Prabhakar
2026-07-07 20:17 ` Pavel Machek
2026-07-02 10:23 ` [PATCH 6.12.y-cip v2 04/10] pinctrl: renesas: rzt2h: Add GPIO IRQ chip to handle interrupts Lad Prabhakar
2026-07-02 10:23 ` [PATCH 6.12.y-cip v2 05/10] pinctrl: renesas: rzt2h: Fix device node leak in rzt2h_gpio_register() Lad Prabhakar
2026-07-02 10:23 ` [PATCH 6.12.y-cip v2 06/10] pinctrl: renesas: rzt2h: Fix invalid wait context Lad Prabhakar
2026-07-02 10:23 ` [PATCH 6.12.y-cip v2 07/10] dt-bindings: pinctrl: renesas,r9a09g077: Document pin configuration properties Lad Prabhakar
2026-07-07 20:17 ` Pavel Machek [this message]
2026-07-02 10:23 ` [PATCH 6.12.y-cip v2 08/10] pinctrl: renesas: rzt2h: Add pin configuration support Lad Prabhakar
2026-07-02 10:23 ` [PATCH 6.12.y-cip v2 09/10] pinctrl: renesas: rzt2h: Remove unused variable in rzt2h_pinctrl_register() Lad Prabhakar
2026-07-02 10:23 ` [PATCH 6.12.y-cip v2 10/10] pinctrl: renesas: rzt2h: Skip PFC mode configuration if already set Lad Prabhakar
2026-07-07 8:19 ` [PATCH 6.12.y-cip v2 00/10] Add pin configuration and GPIO IRQ support to Renesas RZ/T2H SoC nobuhiro.iwamatsu.x90
2026-07-07 20:17 ` [cip-dev] " Pavel Machek
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