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From: Pavel Machek <pavel@nabladev.com>
To: biju.das.jz@bp.renesas.com
Cc: "nobuhiro.iwamatsu.x90@mail.toshiba"
	<nobuhiro.iwamatsu.x90@mail.toshiba>,
	"pavel@nabladev.com" <pavel@nabladev.com>,
	"biju.das.au" <biju.das.au@gmail.com>,
	"cip-dev@lists.cip-project.org" <cip-dev@lists.cip-project.org>,
	Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: Re: [cip-dev] [PATCH 6.12.y-cip 02/23] dt-bindings: pinctrl: renesas: Document RZ/G3L SoC
Date: Thu, 16 Jul 2026 12:42:14 +0200	[thread overview]
Message-ID: <ali1hhUOV931Lxb4@duo.ucw.cz> (raw)
In-Reply-To: <TY3PR01MB113465350CAAF966182F658E786C72@TY3PR01MB11346.jpnprd01.prod.outlook.com>

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Hi!

> > > -----Original Message-----
> > > From: cip-dev@lists.cip-project.org <cip-dev@lists.cip-project.org> On
> > > Behalf Of Pavel Machek via lists.cip-project.org
> > > Sent: Wednesday, July 15, 2026 7:12 PM
> > > To: Biju <biju.das.au@gmail.com>
> > > Cc: cip-dev@lists.cip-project.org; iwamatsu nobuhiro(岩松 信洋 □DITC○
> > > CPT) <nobuhiro.iwamatsu.x90@mail.toshiba>; Pavel Machek
> > > <pavel@nabladev.com>; Biju Das <biju.das.jz@bp.renesas.com>; Lad
> > > Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > > Subject: Re: [cip-dev] [PATCH 6.12.y-cip 02/23] dt-bindings: pinctrl: renesas:
> > > Document RZ/G3L SoC
> > >
> > > Hi!
> > >
> > > There seems to be something wrong here:
> > >
> > > > Add documentation for the pin controller found on the Renesas RZ/G3L
> > > > (R9A08G046) SoC. The RZ/G3L PFC is similar to the RZ/G3S SoC but has
> > > > more pins.
> > > ...
> > > > Document renesas,clonech property for controlling clone channel
> > > > control register located on SYSC IP block on RZ/G3L SoC.
> > >
> > > Ok, no mention of deleting constraints for *57.
> > >
> > > > +++ b/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.
> > > > +++ yaml
> > > > @@ -154,15 +165,10 @@ allOf:
> > > >        properties:
> > > >          compatible:
> > > >            contains:
> > > > -            const: renesas,r9a09g057-pinctrl
> > > > +            const: renesas,r9a08g046-pinctrl
> > > >      then:
> > > > -      properties:
> > > > -        resets:
> > > > -          maxItems: 2
> > > > -    else:
> > > > -      properties:
> > > > -        resets:
> > > > -          minItems: 3
> > > > +      required:
> > > > +        - renesas,clonech
> > > >
> > > >    - if:
> > > >        properties:
> > >
> > > But now we delete constraints for *57, and add constraints for *46.
> > > That looks wrong?
> > 
> > This is a side effect by backporting.
> > Depending on the order of commits, the contents of the commit log may not match those of the patch.
> 
> The issue is we applied a patch twice in 6.12.y-cip which created duplicate entries
> 
> Patch 1:
> 
> commit 64e2071b58f579b758c83ae3170f2eee5b46fb03
> dt-bindings: pinctrl: renesas: Document RZ/V2H(P) SoC
> 
> Patch 2:
> 
> commit fb73d663b31398aea8528fb231e660c4958b29ff
> dt-bindings: pinctrl: renesas: Document RZ/V2H(P) SoC
> 
> If we need a clean history we need to revert a patch or
> 
> Options:
> 
> 1) Revert offending patch to remove duplicate entry and send new version
> 
> 2) Update the change log while applying.
> 
> Please let me know how you want to proceed.

Aha, ok, I see, thanks for explanation.

Best regards,
								Pavel

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  reply	other threads:[~2026-07-16 10:42 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-03 10:58 [PATCH 6.12.y-cip 00/23] Add support for RZ/G3L pincontrol Biju
2026-07-03 10:58 ` [PATCH 6.12.y-cip 01/23] dt-bindings: pinctrl: renesas,rzg2l-pinctrl: Document reset-names Biju
2026-07-03 10:58 ` [PATCH 6.12.y-cip 02/23] dt-bindings: pinctrl: renesas: Document RZ/G3L SoC Biju
2026-07-15 10:12   ` Pavel Machek
2026-07-16  1:19     ` [cip-dev] " nobuhiro.iwamatsu.x90
2026-07-16 10:03       ` Biju Das
2026-07-16 10:42         ` Pavel Machek [this message]
2026-07-03 10:58 ` [PATCH 6.12.y-cip 03/23] pinctrl: renesas: rzg2l: Refactor OEN register PWPR handling Biju
2026-07-03 10:58 ` [PATCH 6.12.y-cip 04/23] pinctrl: renesas: rzg2l: Fix SMT register cache handling Biju
2026-07-03 10:58 ` [PATCH 6.12.y-cip 05/23] pinctrl: renesas: rzg2l: Add SR register cache for PM suspend/resume Biju
2026-07-03 10:58 ` [PATCH 6.12.y-cip 06/23] pinctrl: renesas: rzg2l: Handle RZ/V2H(P) IOLH configuration in PM cache Biju
2026-07-03 10:58 ` [PATCH 6.12.y-cip 07/23] pinctrl: renesas: rzg2l: Add NOD register cache for PM suspend/resume Biju
2026-07-03 10:58 ` [PATCH 6.12.y-cip 08/23] pinctrl: renesas: rzg2l: Handle PUPD for RZ/V2H(P) dedicated pins in PM Biju
2026-07-03 10:59 ` [PATCH 6.12.y-cip 09/23] pinctrl: renesas: rzg2l: Make QSPI register handling conditional Biju
2026-07-03 10:59 ` [PATCH 6.12.y-cip 10/23] pinctrl: renesas: rzg2l: Add support for selecting power source for {WDT,AWO,ISO} Biju
2026-07-15 10:18   ` Pavel Machek
2026-07-03 10:59 ` [PATCH 6.12.y-cip 11/23] pinctrl: renesas: rzg2l: Update OEN pin validation to use exact match Biju
2026-07-03 10:59 ` [PATCH 6.12.y-cip 12/23] pinctrl: renesas: rzg2l: Add support for RZ/G3L SoC Biju
2026-07-03 10:59 ` [PATCH 6.12.y-cip 13/23] pinctrl: renesas: rzg2l: Simplify rzg2l_pinctrl_set_mux() Biju
2026-07-03 10:59 ` [PATCH 6.12.y-cip 14/23] mfd: syscon: Allow syscon nodes without a "syscon" compatible Biju
2026-07-15 10:20   ` Pavel Machek
2026-07-03 10:59 ` [PATCH 6.12.y-cip 15/23] pinctrl: renesas: rzg2l: Add support for clone channel control Biju
2026-07-15 10:23   ` Pavel Machek
2026-07-03 10:59 ` [PATCH 6.12.y-cip 16/23] arm64: dts: renesas: Add pinctrl reset-names for RZ/G2L and RZ/V2H family SoCs Biju
2026-07-03 10:59 ` [PATCH 6.12.y-cip 17/23] arm64: dts: renesas: Drop "syscon" fallback compatible from sysc/sys nodes Biju
2026-07-03 10:59 ` [PATCH 6.12.y-cip 18/23] arm64: dts: renesas: r9a08g046: Add ICU node Biju
2026-07-03 10:59 ` [PATCH 6.12.y-cip 19/23] arm64: dts: renesas: r9a08g046: Add pincontrol node Biju
2026-07-03 10:59 ` [PATCH 6.12.y-cip 20/23] arm64: dts: renesas: r9a08g046l48-smarc: Add SCIF0 pincontrol Biju
2026-07-03 10:59 ` [PATCH 6.12.y-cip 21/23] arm64: dts: renesas: rzg3l-smarc-som: Add pinctrl configuration for ETH0 Biju
2026-07-03 10:59 ` [PATCH 6.12.y-cip 22/23] arm64: dts: renesas: rzg3l-smarc-som: Enable eth1 (GBETH1) interface Biju
2026-07-03 10:59 ` [PATCH 6.12.y-cip 23/23] arm64: dts: renesas: r9a08g046l48-smarc: Add gpio keys Biju
2026-07-15 10:23 ` [PATCH 6.12.y-cip 00/23] Add support for RZ/G3L pincontrol Pavel Machek
     [not found] ` <18C26F8AB223D098.2287905@lists.cip-project.org>
2026-07-16  7:56   ` [cip-dev] " Pavel Machek
2026-07-16 10:11     ` Biju Das
2026-07-16 10:44       ` Pavel Machek

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