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* [PATCH 1/1] restart only same bit-ness
@ 2010-02-08 17:05 Serge E. Hallyn
       [not found] ` <20100208170555.GA16943-r/Jw6+rmf7HQT0dZR+AlfA@public.gmane.org>
  0 siblings, 1 reply; 2+ messages in thread
From: Serge E. Hallyn @ 2010-02-08 17:05 UTC (permalink / raw)
  To: Linux Containers

v19-rc3 actually tries to reset the TIF_IA32 flag according to
how it was set at checkpoint.  It should not, at least for now.

Signed-off-by: Serge E. Hallyn <serue-r/Jw6+rmf7HQT0dZR+AlfA@public.gmane.org>
---
 arch/x86/kernel/checkpoint.c |   21 +++++++++++++++------
 1 files changed, 15 insertions(+), 6 deletions(-)

diff --git a/arch/x86/kernel/checkpoint.c b/arch/x86/kernel/checkpoint.c
index 5952e27..b01a2fc 100644
--- a/arch/x86/kernel/checkpoint.c
+++ b/arch/x86/kernel/checkpoint.c
@@ -283,12 +283,21 @@ int restore_thread(struct ckpt_ctx *ctx)
 	load_TLS(thread, cpu);
 	put_cpu();
 
-#if defined(CONFIG_X86_64) && defined(CONFIG_COMPAT)
-	if (h->thread_info_flags & _TIF_IA32)
-		set_thread_flag(TIF_IA32);
-	else
-		clear_thread_flag(TIF_IA32);
-#endif
+	{
+		int pre, post;
+		/*
+		 * Eventually we'd like to support mixed-bit restart, but for
+		 * now don't pretend to.
+		 */
+		pre = test_thread_flag(TIF_IA32);
+		post = h->thread_info_flags & _TIF_IA32;
+		if ((pre && !post) || (post && !pre)) {
+			ret = -EINVAL;
+			ckpt_err(ctx, ret, "%d-bit restarting %d-bit\n",
+				pre ? 32 : 64, post ? 32 : 64);
+			goto out;
+		}
+	}
 
 	/* TODO: restore TIF flags as necessary (e.g. TIF_NOTSC) */
 
-- 
1.6.0.4

^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH 1/1] restart only same bit-ness
       [not found] ` <20100208170555.GA16943-r/Jw6+rmf7HQT0dZR+AlfA@public.gmane.org>
@ 2010-02-08 20:39   ` Matt Helsley
  0 siblings, 0 replies; 2+ messages in thread
From: Matt Helsley @ 2010-02-08 20:39 UTC (permalink / raw)
  To: Serge E. Hallyn; +Cc: Linux Containers

On Mon, Feb 08, 2010 at 11:05:55AM -0600, Serge E. Hallyn wrote:
> v19-rc3 actually tries to reset the TIF_IA32 flag according to
> how it was set at checkpoint.  It should not, at least for now.
> 
> Signed-off-by: Serge E. Hallyn <serue-r/Jw6+rmf7HQT0dZR+AlfA@public.gmane.org>

Reviewed-by: Matt Helsley <matthltc-r/Jw6+rmf7HQT0dZR+AlfA@public.gmane.org>

> ---
>  arch/x86/kernel/checkpoint.c |   21 +++++++++++++++------
>  1 files changed, 15 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/x86/kernel/checkpoint.c b/arch/x86/kernel/checkpoint.c
> index 5952e27..b01a2fc 100644
> --- a/arch/x86/kernel/checkpoint.c
> +++ b/arch/x86/kernel/checkpoint.c
> @@ -283,12 +283,21 @@ int restore_thread(struct ckpt_ctx *ctx)
>  	load_TLS(thread, cpu);
>  	put_cpu();
> 
> -#if defined(CONFIG_X86_64) && defined(CONFIG_COMPAT)
> -	if (h->thread_info_flags & _TIF_IA32)
> -		set_thread_flag(TIF_IA32);
> -	else
> -		clear_thread_flag(TIF_IA32);
> -#endif
> +	{
> +		int pre, post;
> +		/*
> +		 * Eventually we'd like to support mixed-bit restart, but for
> +		 * now don't pretend to.
> +		 */
> +		pre = test_thread_flag(TIF_IA32);
> +		post = h->thread_info_flags & _TIF_IA32;
> +		if ((pre && !post) || (post && !pre)) {

This might be clearer:

		pre = test_thread_flag(TIF_IA32);
		post = !!(h->thread_info_flags & _TIF_IA32);
		if (pre != post) {

Cheers,
	-Matt Helsley

^ permalink raw reply	[flat|nested] 2+ messages in thread

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2010-02-08 17:05 [PATCH 1/1] restart only same bit-ness Serge E. Hallyn
     [not found] ` <20100208170555.GA16943-r/Jw6+rmf7HQT0dZR+AlfA@public.gmane.org>
2010-02-08 20:39   ` Matt Helsley

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