* [v4,3/6] dt-bindings: fsl-qdma: Add NXP Layerscpae qDMA controller bindings
@ 2018-05-14 12:03 Wen He
0 siblings, 0 replies; 5+ messages in thread
From: Wen He @ 2018-05-14 12:03 UTC (permalink / raw)
To: vinod.koul, dmaengine
Cc: robh+dt, devicetree, leoyang.li, jiafei.pan, jiaheng.fan, Wen He
Document the devicetree bindings for NXP Layerscape qDMA controller
which could be found on NXP QorIQ Layerscape SoCs.
Signed-off-by: Wen He <wen.he_1@nxp.com>
---
change in v4:
- Rewrite the bindings document that follows generic DMA bindings file
change in v3:
- no change
change in v2:
- Remove indentation
- Add "Should be" before 'fsl,ls1021a-qdma'
- Replace 'channels' by 'dma-channels'
- Replace 'qdma@8390000' by 'dma-controller@8390000'
Documentation/devicetree/bindings/dma/fsl-qdma.txt | 41 ++++++++++++++++++++
1 files changed, 41 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/dma/fsl-qdma.txt
diff --git a/Documentation/devicetree/bindings/dma/fsl-qdma.txt b/Documentation/devicetree/bindings/dma/fsl-qdma.txt
new file mode 100644
index 0000000..368c4e7
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/fsl-qdma.txt
@@ -0,0 +1,41 @@
+NXP Layerscape SoC qDMA Controller
+==================================
+
+This device follows the generic DMA bindings defined in dma/dma.txt.
+
+Required properties:
+
+- compatible: Must be one of
+ "fsl,ls1021a-qdma": for LS1021A Board
+ "fsl,ls1043a-qdma": for ls1043A Board
+ "fsl,ls1046a-qdma": for ls1046A Board
+- reg: Should contain the register's base address and length.
+- interrupts: Should contain a reference to the interrupt used by this
+ device.
+- interrupt-names: Should contain interrupt names:
+ "qdma-error": the error interrupt
+ "qdma-queue": the queue interrupt
+- queues: Should contain number of queues supported.
+
+Optional properties:
+
+- dma-channels: Number of DMA channels supported by the controller.
+- big-endian: If present registers and hardware scatter/gather descriptors
+ of the qDMA are implemented in big endian mode, otherwise in little
+ mode.
+
+Examples:
+
+ qdma: dma-controller@8390000 {
+ compatible = "fsl,ls1021a-qdma";
+ reg = <0x0 0x8398000 0x0 0x2000 /* Controller registers */
+ 0x0 0x839a000 0x0 0x2000>; /* Block registers */
+ interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "qdma-error", "qdma-queue";
+ dma-channels = <8>;
+ queues = <2>;
+ big-endian;
+ };
+
+DMA clients must use the format described in dma/dma.txt file.
^ permalink raw reply related [flat|nested] 5+ messages in thread* [v4,3/6] dt-bindings: fsl-qdma: Add NXP Layerscpae qDMA controller bindings
@ 2018-05-18 21:26 Rob Herring
0 siblings, 0 replies; 5+ messages in thread
From: Rob Herring @ 2018-05-18 21:26 UTC (permalink / raw)
To: Wen He
Cc: vinod.koul, dmaengine, devicetree, leoyang.li, jiafei.pan,
jiaheng.fan
On Mon, May 14, 2018 at 08:03:04PM +0800, Wen He wrote:
> Document the devicetree bindings for NXP Layerscape qDMA controller
> which could be found on NXP QorIQ Layerscape SoCs.
>
> Signed-off-by: Wen He <wen.he_1@nxp.com>
> ---
> change in v4:
> - Rewrite the bindings document that follows generic DMA bindings file
>
> change in v3:
> - no change
>
> change in v2:
> - Remove indentation
> - Add "Should be" before 'fsl,ls1021a-qdma'
> - Replace 'channels' by 'dma-channels'
> - Replace 'qdma@8390000' by 'dma-controller@8390000'
>
> Documentation/devicetree/bindings/dma/fsl-qdma.txt | 41 ++++++++++++++++++++
> 1 files changed, 41 insertions(+), 0 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/dma/fsl-qdma.txt
>
> diff --git a/Documentation/devicetree/bindings/dma/fsl-qdma.txt b/Documentation/devicetree/bindings/dma/fsl-qdma.txt
> new file mode 100644
> index 0000000..368c4e7
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dma/fsl-qdma.txt
> @@ -0,0 +1,41 @@
> +NXP Layerscape SoC qDMA Controller
> +==================================
> +
> +This device follows the generic DMA bindings defined in dma/dma.txt.
> +
> +Required properties:
> +
> +- compatible: Must be one of
> + "fsl,ls1021a-qdma": for LS1021A Board
> + "fsl,ls1043a-qdma": for ls1043A Board
> + "fsl,ls1046a-qdma": for ls1046A Board
> +- reg: Should contain the register's base address and length.
> +- interrupts: Should contain a reference to the interrupt used by this
> + device.
> +- interrupt-names: Should contain interrupt names:
> + "qdma-error": the error interrupt
> + "qdma-queue": the queue interrupt
> +- queues: Should contain number of queues supported.
Needs a vendor prefix.
> +
> +Optional properties:
> +
> +- dma-channels: Number of DMA channels supported by the controller.
> +- big-endian: If present registers and hardware scatter/gather descriptors
> + of the qDMA are implemented in big endian mode, otherwise in little
> + mode.
> +
> +Examples:
> +
> + qdma: dma-controller@8390000 {
> + compatible = "fsl,ls1021a-qdma";
> + reg = <0x0 0x8398000 0x0 0x2000 /* Controller registers */
> + 0x0 0x839a000 0x0 0x2000>; /* Block registers */
> + interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "qdma-error", "qdma-queue";
> + dma-channels = <8>;
> + queues = <2>;
> + big-endian;
> + };
> +
> +DMA clients must use the format described in dma/dma.txt file.
> --
> 1.7.1
>
> --
> To unsubscribe from this list: send the line "unsubscribe devicetree" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
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^ permalink raw reply [flat|nested] 5+ messages in thread* [v4,3/6] dt-bindings: fsl-qdma: Add NXP Layerscpae qDMA controller bindings
@ 2018-05-21 5:52 Wen He
0 siblings, 0 replies; 5+ messages in thread
From: Wen He @ 2018-05-21 5:52 UTC (permalink / raw)
To: Rob Herring
Cc: vinod.koul@intel.com, dmaengine@vger.kernel.org,
devicetree@vger.kernel.org, Leo Li, Jiafei Pan, Jiaheng Fan
Hi Rob,
Please see my comments inline.
Best Regards,
Wen
> -----Original Message-----
> From: Rob Herring [mailto:robh@kernel.org]
> Sent: 2018年5月19日 5:26
> To: Wen He <wen.he_1@nxp.com>
> Cc: vinod.koul@intel.com; dmaengine@vger.kernel.org;
> devicetree@vger.kernel.org; Leo Li <leoyang.li@nxp.com>; Jiafei Pan
> <jiafei.pan@nxp.com>; Jiaheng Fan <jiaheng.fan@nxp.com>
> Subject: Re: [v4 3/6] dt-bindings: fsl-qdma: Add NXP Layerscpae qDMA
> controller bindings
>
> On Mon, May 14, 2018 at 08:03:04PM +0800, Wen He wrote:
> > Document the devicetree bindings for NXP Layerscape qDMA controller
> > which could be found on NXP QorIQ Layerscape SoCs.
> >
> > Signed-off-by: Wen He <wen.he_1@nxp.com>
> > ---
> > change in v4:
> > - Rewrite the bindings document that follows generic DMA bindings
> > file
> >
> > change in v3:
> > - no change
> >
> > change in v2:
> > - Remove indentation
> > - Add "Should be" before 'fsl,ls1021a-qdma'
> > - Replace 'channels' by 'dma-channels'
> > - Replace 'qdma@8390000' by 'dma-controller@8390000'
> >
> > Documentation/devicetree/bindings/dma/fsl-qdma.txt | 41
> ++++++++++++++++++++
> > 1 files changed, 41 insertions(+), 0 deletions(-) create mode 100644
> > Documentation/devicetree/bindings/dma/fsl-qdma.txt
> >
> > diff --git a/Documentation/devicetree/bindings/dma/fsl-qdma.txt
> > b/Documentation/devicetree/bindings/dma/fsl-qdma.txt
> > new file mode 100644
> > index 0000000..368c4e7
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/dma/fsl-qdma.txt
> > @@ -0,0 +1,41 @@
> > +NXP Layerscape SoC qDMA Controller
> > +==================================
> > +
> > +This device follows the generic DMA bindings defined in dma/dma.txt.
> > +
> > +Required properties:
> > +
> > +- compatible: Must be one of
> > + "fsl,ls1021a-qdma": for LS1021A Board
> > + "fsl,ls1043a-qdma": for ls1043A Board
> > + "fsl,ls1046a-qdma": for ls1046A Board
> > +- reg: Should contain the register's base address and length.
> > +- interrupts: Should contain a reference to the interrupt used by
> this
> > + device.
> > +- interrupt-names: Should contain interrupt names:
> > + "qdma-error": the error interrupt
> > + "qdma-queue": the queue interrupt
> > +- queues: Should contain number of queues supported.
>
> Needs a vendor prefix.
>
Does means: The queues filed need a vendor prefix ?
like 'fsl-queues' ? right?
> > +
> > +Optional properties:
> > +
> > +- dma-channels: Number of DMA channels supported by the
> controller.
> > +- big-endian: If present registers and hardware scatter/gather
> descriptors
> > + of the qDMA are implemented in big endian mode, otherwise in
> little
> > + mode.
> > +
> > +Examples:
> > +
> > + qdma: dma-controller@8390000 {
> > + compatible = "fsl,ls1021a-qdma";
> > + reg = <0x0 0x8398000 0x0 0x2000 /* Controller registers */
> > + 0x0 0x839a000 0x0 0x2000>; /* Block registers */
> > + interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
> > + <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
> > + interrupt-names = "qdma-error", "qdma-queue";
> > + dma-channels = <8>;
> > + queues = <2>;
> > + big-endian;
> > + };
> > +
> > +DMA clients must use the format described in dma/dma.txt file.
> > --
> > 1.7.1
> >
> > --
> > To unsubscribe from this list: send the line "unsubscribe devicetree"
> > in the body of a message to majordomo@vger.kernel.org More majordomo
> > info at
> >
> https://emea01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fvger
> > .kernel.org%2Fmajordomo-info.html&data=02%7C01%7Cwen.he_1%40nxp
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> >
> afe9f30f68654b36085408d5bd05f856%7C686ea1d3bc2b4c6fa92cd99c5c301
> 635%7C
> >
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> Om8GojXdES2
> > mVNzQpIE%3D&reserved=0
^ permalink raw reply [flat|nested] 5+ messages in thread* [v4,3/6] dt-bindings: fsl-qdma: Add NXP Layerscpae qDMA controller bindings
@ 2018-05-23 19:59 Rob Herring
0 siblings, 0 replies; 5+ messages in thread
From: Rob Herring @ 2018-05-23 19:59 UTC (permalink / raw)
To: Wen He
Cc: dmaengine@vger.kernel.org, devicetree@vger.kernel.org, Leo Li,
Jiafei Pan, Jiaheng Fan, Vinod
Updated Vinod's email...
On Mon, May 21, 2018 at 12:52 AM, Wen He <wen.he_1@nxp.com> wrote:
> Hi Rob,
>
> Please see my comments inline.
>
> Best Regards,
> Wen
>
>> -----Original Message-----
>> From: Rob Herring [mailto:robh@kernel.org]
>> Sent: 2018年5月19日 5:26
>> To: Wen He <wen.he_1@nxp.com>
>> Cc: vinod.koul@intel.com; dmaengine@vger.kernel.org;
>> devicetree@vger.kernel.org; Leo Li <leoyang.li@nxp.com>; Jiafei Pan
>> <jiafei.pan@nxp.com>; Jiaheng Fan <jiaheng.fan@nxp.com>
>> Subject: Re: [v4 3/6] dt-bindings: fsl-qdma: Add NXP Layerscpae qDMA
>> controller bindings
>>
>> On Mon, May 14, 2018 at 08:03:04PM +0800, Wen He wrote:
>> > Document the devicetree bindings for NXP Layerscape qDMA controller
>> > which could be found on NXP QorIQ Layerscape SoCs.
>> >
>> > Signed-off-by: Wen He <wen.he_1@nxp.com>
>> > ---
>> > change in v4:
>> > - Rewrite the bindings document that follows generic DMA bindings
>> > file
>> >
>> > change in v3:
>> > - no change
>> >
>> > change in v2:
>> > - Remove indentation
>> > - Add "Should be" before 'fsl,ls1021a-qdma'
>> > - Replace 'channels' by 'dma-channels'
>> > - Replace 'qdma@8390000' by 'dma-controller@8390000'
>> >
>> > Documentation/devicetree/bindings/dma/fsl-qdma.txt | 41
>> ++++++++++++++++++++
>> > 1 files changed, 41 insertions(+), 0 deletions(-) create mode 100644
>> > Documentation/devicetree/bindings/dma/fsl-qdma.txt
>> >
>> > diff --git a/Documentation/devicetree/bindings/dma/fsl-qdma.txt
>> > b/Documentation/devicetree/bindings/dma/fsl-qdma.txt
>> > new file mode 100644
>> > index 0000000..368c4e7
>> > --- /dev/null
>> > +++ b/Documentation/devicetree/bindings/dma/fsl-qdma.txt
>> > @@ -0,0 +1,41 @@
>> > +NXP Layerscape SoC qDMA Controller
>> > +==================================
>> > +
>> > +This device follows the generic DMA bindings defined in dma/dma.txt.
>> > +
>> > +Required properties:
>> > +
>> > +- compatible: Must be one of
>> > + "fsl,ls1021a-qdma": for LS1021A Board
>> > + "fsl,ls1043a-qdma": for ls1043A Board
>> > + "fsl,ls1046a-qdma": for ls1046A Board
>> > +- reg: Should contain the register's base address and length.
>> > +- interrupts: Should contain a reference to the interrupt used by
>> this
>> > + device.
>> > +- interrupt-names: Should contain interrupt names:
>> > + "qdma-error": the error interrupt
>> > + "qdma-queue": the queue interrupt
>> > +- queues: Should contain number of queues supported.
>>
>> Needs a vendor prefix.
>>
>
> Does means: The queues filed need a vendor prefix ?
> like 'fsl-queues' ? right?
No, vendor prefixes end with a comma: fsl,queues
Rob
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To unsubscribe from this list: send the line "unsubscribe dmaengine" in
the body of a message to majordomo@vger.kernel.org
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^ permalink raw reply [flat|nested] 5+ messages in thread
* [v4,3/6] dt-bindings: fsl-qdma: Add NXP Layerscpae qDMA controller bindings
@ 2018-05-24 7:20 Wen He
0 siblings, 0 replies; 5+ messages in thread
From: Wen He @ 2018-05-24 7:20 UTC (permalink / raw)
To: Rob Herring
Cc: dmaengine@vger.kernel.org, devicetree@vger.kernel.org, Leo Li,
Jiafei Pan, Jiaheng Fan, Vinod
> -----Original Message-----
> From: Rob Herring [mailto:robh@kernel.org]
> Sent: 2018年5月24日 3:59
> To: Wen He <wen.he_1@nxp.com>
> Cc: dmaengine@vger.kernel.org; devicetree@vger.kernel.org; Leo Li
> <leoyang.li@nxp.com>; Jiafei Pan <jiafei.pan@nxp.com>; Jiaheng Fan
> <jiaheng.fan@nxp.com>; Vinod <vkoul@kernel.org>
> Subject: Re: [v4 3/6] dt-bindings: fsl-qdma: Add NXP Layerscpae qDMA
> controller bindings
>
> Updated Vinod's email...
>
> On Mon, May 21, 2018 at 12:52 AM, Wen He <wen.he_1@nxp.com> wrote:
> > Hi Rob,
> >
> > Please see my comments inline.
> >
> > Best Regards,
> > Wen
> >
> >> -----Original Message-----
> >> From: Rob Herring [mailto:robh@kernel.org]
> >> Sent: 2018年5月19日 5:26
> >> To: Wen He <wen.he_1@nxp.com>
> >> Cc: vinod.koul@intel.com; dmaengine@vger.kernel.org;
> >> devicetree@vger.kernel.org; Leo Li <leoyang.li@nxp.com>; Jiafei Pan
> >> <jiafei.pan@nxp.com>; Jiaheng Fan <jiaheng.fan@nxp.com>
> >> Subject: Re: [v4 3/6] dt-bindings: fsl-qdma: Add NXP Layerscpae qDMA
> >> controller bindings
> >>
> >> On Mon, May 14, 2018 at 08:03:04PM +0800, Wen He wrote:
> >> > Document the devicetree bindings for NXP Layerscape qDMA controller
> >> > which could be found on NXP QorIQ Layerscape SoCs.
> >> >
> >> > Signed-off-by: Wen He <wen.he_1@nxp.com>
> >> > ---
> >> > change in v4:
> >> > - Rewrite the bindings document that follows generic DMA
> >> > bindings file
> >> >
> >> > change in v3:
> >> > - no change
> >> >
> >> > change in v2:
> >> > - Remove indentation
> >> > - Add "Should be" before 'fsl,ls1021a-qdma'
> >> > - Replace 'channels' by 'dma-channels'
> >> > - Replace 'qdma@8390000' by 'dma-controller@8390000'
> >> >
> >> > Documentation/devicetree/bindings/dma/fsl-qdma.txt | 41
> >> ++++++++++++++++++++
> >> > 1 files changed, 41 insertions(+), 0 deletions(-) create mode
> >> > 100644 Documentation/devicetree/bindings/dma/fsl-qdma.txt
> >> >
> >> > diff --git a/Documentation/devicetree/bindings/dma/fsl-qdma.txt
> >> > b/Documentation/devicetree/bindings/dma/fsl-qdma.txt
> >> > new file mode 100644
> >> > index 0000000..368c4e7
> >> > --- /dev/null
> >> > +++ b/Documentation/devicetree/bindings/dma/fsl-qdma.txt
> >> > @@ -0,0 +1,41 @@
> >> > +NXP Layerscape SoC qDMA Controller
> >> > +==================================
> >> > +
> >> > +This device follows the generic DMA bindings defined in dma/dma.txt.
> >> > +
> >> > +Required properties:
> >> > +
> >> > +- compatible: Must be one of
> >> > + "fsl,ls1021a-qdma": for LS1021A Board
> >> > + "fsl,ls1043a-qdma": for ls1043A Board
> >> > + "fsl,ls1046a-qdma": for ls1046A Board
> >> > +- reg: Should contain the register's base
> address and length.
> >> > +- interrupts: Should contain a reference to the
> interrupt used by
> >> this
> >> > + device.
> >> > +- interrupt-names: Should contain interrupt names:
> >> > + "qdma-error": the error interrupt
> >> > + "qdma-queue": the queue interrupt
> >> > +- queues: Should contain number of queues supported.
> >>
> >> Needs a vendor prefix.
> >>
> >
> > Does means: The queues filed need a vendor prefix ?
> > like 'fsl-queues' ? right?
>
> No, vendor prefixes end with a comma: fsl,queues
>
> Rob
Done.
Thanks for your review, the issue will next version fix.
Best Regards,
Wen
^ permalink raw reply [flat|nested] 5+ messages in thread
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