DMA Engine development
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From: Vinod Koul <vkoul@kernel.org>
To: Dmitry Osipenko <digetx@gmail.com>
Cc: Laxman Dewangan <ldewangan@nvidia.com>,
	Thierry Reding <thierry.reding@gmail.com>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	dmaengine@vger.kernel.org, linux-tegra@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: [v1] dmaengine: tegra: Use relaxed versions of readl/writel
Date: Fri, 26 Apr 2019 18:17:48 +0530	[thread overview]
Message-ID: <20190426124748.GF28103@vkoul-mobl> (raw)

On 26-04-19, 15:19, Dmitry Osipenko wrote:
> 26.04.2019 15:01, Vinod Koul пишет:
> > On 25-04-19, 02:17, Dmitry Osipenko wrote:
> >> The readl/writel functions are inserting memory barrier in order to
> >> ensure that memory stores are completed. On Tegra20 and Tegra30 this
> >> results in L2 cache syncing which isn't a cheapest operation. The
> >> tegra20-apb-dma driver doesn't need to synchronize generic memory
> >> accesses, hence use the relaxed versions of the functions.
> > 
> > Subsystem name is **dmaengine** not dma! Please fix that
> > 
> 
> Looks like you answered to a wrong email.

Yes looks like I did, apologies for that :(

WARNING: multiple messages have this Message-ID (diff)
From: Vinod Koul <vkoul@kernel.org>
To: Dmitry Osipenko <digetx@gmail.com>
Cc: Laxman Dewangan <ldewangan@nvidia.com>,
	Thierry Reding <thierry.reding@gmail.com>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	dmaengine@vger.kernel.org, linux-tegra@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v1] dmaengine: tegra: Use relaxed versions of readl/writel
Date: Fri, 26 Apr 2019 18:17:48 +0530	[thread overview]
Message-ID: <20190426124748.GF28103@vkoul-mobl> (raw)
Message-ID: <20190426124748.fVpL7jdnnbATixwd8_oUq5v-hUsN9r7IK2zxef_elCs@z> (raw)
In-Reply-To: <68c342e2-5662-5632-82aa-659da0381f54@gmail.com>

On 26-04-19, 15:19, Dmitry Osipenko wrote:
> 26.04.2019 15:01, Vinod Koul пишет:
> > On 25-04-19, 02:17, Dmitry Osipenko wrote:
> >> The readl/writel functions are inserting memory barrier in order to
> >> ensure that memory stores are completed. On Tegra20 and Tegra30 this
> >> results in L2 cache syncing which isn't a cheapest operation. The
> >> tegra20-apb-dma driver doesn't need to synchronize generic memory
> >> accesses, hence use the relaxed versions of the functions.
> > 
> > Subsystem name is **dmaengine** not dma! Please fix that
> > 
> 
> Looks like you answered to a wrong email.

Yes looks like I did, apologies for that :(

-- 
~Vinod

         reply	other threads:[~2019-04-26 12:47 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-24 23:17 [v1] dmaengine: tegra: Use relaxed versions of readl/writel Dmitry Osipenko
2019-04-24 23:17 ` [PATCH v1] " Dmitry Osipenko
2019-04-26  9:52 ` [v1] " Jon Hunter
2019-04-26  9:52   ` [PATCH v1] " Jon Hunter
2019-04-26 10:45   ` [v1] " Dmitry Osipenko
2019-04-26 10:45     ` [PATCH v1] " Dmitry Osipenko
2019-04-26 11:13     ` [v1] " Jon Hunter
2019-04-26 11:13       ` [PATCH v1] " Jon Hunter
2019-04-26 12:18       ` [v1] " Dmitry Osipenko
2019-04-26 12:18         ` [PATCH v1] " Dmitry Osipenko
2019-04-26 12:42         ` [v1] " Dmitry Osipenko
2019-04-26 12:42           ` [PATCH v1] " Dmitry Osipenko
2019-04-26 13:03           ` [v1] " Dmitry Osipenko
2019-04-26 13:03             ` [PATCH v1] " Dmitry Osipenko
2019-04-26 15:11             ` [v1] " Thierry Reding
2019-04-26 15:11               ` [PATCH v1] " Thierry Reding
2019-04-30 12:25               ` [v1] " Dmitry Osipenko
2019-04-30 12:25                 ` [PATCH v1] " Dmitry Osipenko
2019-04-26 12:01 ` [v1] " Vinod Koul
2019-04-26 12:01   ` [PATCH v1] " Vinod Koul
2019-04-26 12:19   ` [v1] " Dmitry Osipenko
2019-04-26 12:19     ` [PATCH v1] " Dmitry Osipenko
2019-04-26 12:47     ` Vinod Koul [this message]
2019-04-26 12:47       ` Vinod Koul

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