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From: Vinod Koul <vkoul@kernel.org>
To: Gustavo Pimentel <Gustavo.Pimentel@synopsys.com>
Cc: "dmaengine@vger.kernel.org" <dmaengine@vger.kernel.org>,
	Joao Pinto <Joao.Pinto@synopsys.com>,
	"stable@vger.kernel.org" <stable@vger.kernel.org>
Subject: Re: [PATCH] dmaengine: dw-edma: Fix linked list physical address calculation on non-64 bits architectures
Date: Thu, 27 Aug 2020 10:40:48 +0530	[thread overview]
Message-ID: <20200827051048.GH2639@vkoul-mobl> (raw)
In-Reply-To: <DM5PR12MB127696E920BD51BA1788CDE0DA540@DM5PR12MB1276.namprd12.prod.outlook.com>

On 26-08-20, 12:31, Gustavo Pimentel wrote:
> On Tue, Aug 25, 2020 at 12:9:37, Vinod Koul <vkoul@kernel.org> wrote:
> 
> > On 13-08-20, 16:13, Gustavo Pimentel wrote:
> > > Fix linked list physical address calculation on non-64 bits architectures.
> > > 
> > > The paddr variable is phys_addr_t type, which can assume a different
> > > type (u64 or u32) depending on the conditional compilation flag
> > > CONFIG_PHYS_ADDR_T_64BIT.
> > > 
> > > Since this variable is used in with upper_32 bits() macro to get the
> > > value from 32 to 63 bits, on a non-64 bits architecture this variable
> > > will assume a u32 type, it can cause a compilation warning.
> > > 
> > > This issue was reported by a Coverity analysis.
> > > 
> > > Fixes: 7e4b8a4fbe2c ("dmaengine: Add Synopsys eDMA IP version 0 support")
> > > 
> > > Cc: Joao Pinto <jpinto@synopsys.com>
> > > Cc: stable@vger.kernel.org
> > > Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
> > > ---
> > >  drivers/dma/dw-edma/dw-edma-v0-core.c | 23 +++++++++++++++++------
> > >  1 file changed, 17 insertions(+), 6 deletions(-)
> > > 
> > > diff --git a/drivers/dma/dw-edma/dw-edma-v0-core.c b/drivers/dma/dw-edma/dw-edma-v0-core.c
> > > index 692de47..cfabbf5 100644
> > > --- a/drivers/dma/dw-edma/dw-edma-v0-core.c
> > > +++ b/drivers/dma/dw-edma/dw-edma-v0-core.c
> > > @@ -229,8 +229,13 @@ static void dw_edma_v0_core_write_chunk(struct dw_edma_chunk *chunk)
> > >  	/* Channel control */
> > >  	SET_LL(&llp->control, control);
> > >  	/* Linked list  - low, high */
> > > -	SET_LL(&llp->llp_low, lower_32_bits(chunk->ll_region.paddr));
> > > -	SET_LL(&llp->llp_high, upper_32_bits(chunk->ll_region.paddr));
> > > +	#ifdef CONFIG_PHYS_ADDR_T_64BIT
> > > +		SET_LL(&llp->llp_low, lower_32_bits(chunk->ll_region.paddr));
> > > +		SET_LL(&llp->llp_high, upper_32_bits(chunk->ll_region.paddr));
> > > +	#else /* CONFIG_PHYS_ADDR_T_64BIT */
> > > +		SET_LL(&llp->llp_low, chunk->ll_region.paddr);
> > > +		SET_LL(&llp->llp_high, 0x0);
> > 
> > Shouldn't upper_32_bits(chunk->ll_region.paddr) return zero for non
> > 64bit archs?
> 
> At the time when I made this patch, I got a compiler warning about the 
> u32 vs u64 type mixing (phys_addr_t) and the macro usage upper_32 bits() 
> on non-64 bits architectures. That's why I made this patch, but now I 
> don't see this warning anymore.
> 
> Vinod, please disregard this patch.

Ok dropped

-- 
~Vinod

      reply	other threads:[~2020-08-27  5:10 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-13 14:13 [PATCH] dmaengine: dw-edma: Fix linked list physical address calculation on non-64 bits architectures Gustavo Pimentel
2020-08-13 17:07 ` kernel test robot
2020-08-25 11:09 ` Vinod Koul
2020-08-26 12:31   ` Gustavo Pimentel
2020-08-27  5:10     ` Vinod Koul [this message]

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