From: Peter Korsgaard <peter@korsgaard.com>
To: Vinod Koul <vkoul@kernel.org>, dmaengine@vger.kernel.org
Cc: Michal Simek <michal.simek@amd.com>,
Peter Korsgaard <peter@korsgaard.com>
Subject: [PATCH] dmaengine: xilinx_dma: check for invalid vdma interleaved parameters
Date: Fri, 5 Jan 2024 11:59:56 +0100 [thread overview]
Message-ID: <20240105105956.1370220-1-peter@korsgaard.com> (raw)
The VDMA HSIZE register (corresponding to sgl[0].size) is only 16bit wide /
the VSIZE register (corresponding to numf) is only 13bit wide, so reject
requests not fitting within that rather than silently transferring too
little data.
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
---
drivers/dma/xilinx/xilinx_dma.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c
index e40696f6f864..5eb51ae93e89 100644
--- a/drivers/dma/xilinx/xilinx_dma.c
+++ b/drivers/dma/xilinx/xilinx_dma.c
@@ -112,7 +112,9 @@
/* Register Direct Mode Registers */
#define XILINX_DMA_REG_VSIZE 0x0000
+#define XILINX_DMA_VSIZE_MASK GENMASK(12, 0)
#define XILINX_DMA_REG_HSIZE 0x0004
+#define XILINX_DMA_HSIZE_MASK GENMASK(15, 0)
#define XILINX_DMA_REG_FRMDLY_STRIDE 0x0008
#define XILINX_DMA_FRMDLY_STRIDE_FRMDLY_SHIFT 24
@@ -2050,6 +2052,10 @@ xilinx_vdma_dma_prep_interleaved(struct dma_chan *dchan,
if (!xt->numf || !xt->sgl[0].size)
return NULL;
+ if (xt->numf & ~XILINX_DMA_VSIZE_MASK ||
+ xt->sgl[0].size & ~XILINX_DMA_HSIZE_MASK)
+ return NULL;
+
if (xt->frame_size != 1)
return NULL;
--
2.39.2
next reply other threads:[~2024-01-05 11:00 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-05 10:59 Peter Korsgaard [this message]
2024-01-05 18:48 ` [PATCH] dmaengine: xilinx_dma: check for invalid vdma interleaved parameters Pandey, Radhey Shyam
2024-01-22 16:25 ` Vinod Koul
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