Re: [PATCH 4/5] dmaengine: lgm-dma: Added HDMA software mode TX function.

[kernel test robot <lkp@intel.com>]

Hi Zhu,

kernel test robot noticed the following build warnings:

[auto build test WARNING on vkoul-dmaengine/next]
[also build test WARNING on linus/master v6.16 next-20250730]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Zhu-Yixin/dmaengine-lgm-dma-Correct-ORRC-MAX-counter-value/20250730-105748
base:   https://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine.git next
patch link:    https://lore.kernel.org/r/20250730024547.3160871-4-yzhu%40maxlinear.com
patch subject: [PATCH 4/5] dmaengine: lgm-dma: Added HDMA software mode TX function.
config: i386-buildonly-randconfig-003-20250730 (https://download.01.org/0day-ci/archive/20250730/202507302344.XEgGylg3-lkp@intel.com/config)
compiler: gcc-12 (Debian 12.2.0-14+deb12u1) 12.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250730/202507302344.XEgGylg3-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202507302344.XEgGylg3-lkp@intel.com/

All warnings (new ones prefixed by >>):

   drivers/dma/lgm/lgm-hdma.c: In function 'hdma_irq_stat':
>> drivers/dma/lgm/lgm-hdma.c:253:27: warning: left shift count >= width of type [-Wshift-count-overflow]
     253 |         return high ? ret << 32 : ret;
         |                           ^~
   In file included from include/linux/device.h:15,
                    from include/linux/dma-mapping.h:5,
                    from drivers/dma/lgm/lgm-hdma.c:10:
   drivers/dma/lgm/lgm-hdma.c: In function 'hdma_alloc_chan_resources':
>> drivers/dma/lgm/lgm-hdma.c:339:22: warning: format '%llx' expects argument of type 'long long unsigned int', but argument 5 has type 'dma_addr_t' {aka 'unsigned int'} [-Wformat=]
     339 |         dev_dbg(dev, "DMA CH: %u, phy addr: 0x%llx, desc cnt: %u\n",
         |                      ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   include/linux/dev_printk.h:139:49: note: in definition of macro 'dev_no_printk'
     139 |                         _dev_printk(level, dev, fmt, ##__VA_ARGS__);    \
         |                                                 ^~~
   include/linux/dev_printk.h:171:40: note: in expansion of macro 'dev_fmt'
     171 |         dev_no_printk(KERN_DEBUG, dev, dev_fmt(fmt), ##__VA_ARGS__)
         |                                        ^~~~~~~
   drivers/dma/lgm/lgm-hdma.c:339:9: note: in expansion of macro 'dev_dbg'
     339 |         dev_dbg(dev, "DMA CH: %u, phy addr: 0x%llx, desc cnt: %u\n",
         |         ^~~~~~~
   drivers/dma/lgm/lgm-hdma.c:339:50: note: format string is defined here
     339 |         dev_dbg(dev, "DMA CH: %u, phy addr: 0x%llx, desc cnt: %u\n",
         |                                               ~~~^
         |                                                  |
         |                                                  long long unsigned int
         |                                               %x
   drivers/dma/lgm/lgm-hdma.c: In function 'hdma_prep_slave_sg':
>> drivers/dma/lgm/lgm-hdma.c:508:29: warning: variable 'desc_hw' set but not used [-Wunused-but-set-variable]
     508 |         struct dw4_desc_hw *desc_hw;
         |                             ^~~~~~~


vim +253 drivers/dma/lgm/lgm-hdma.c

   213	
   214	static unsigned long hdma_irq_stat(struct ldma_dev *d, int high)
   215	{
   216		u32 irnen, irncr, en_off, cr_off, cid;
   217		unsigned long flags;
   218		unsigned long ret;
   219	
   220		spin_lock_irqsave(&d->dev_lock, flags);
   221	
   222		hdma_get_irq_off(high, &en_off, &cr_off);
   223	
   224		irncr = readl(d->base + cr_off);
   225		irnen = readl(d->base + en_off);
   226	
   227		if (!irncr || !irnen || !(irncr & irnen)) {
   228			writel(irncr, d->base + cr_off);
   229			spin_unlock_irqrestore(&d->dev_lock, flags);
   230			return 0;
   231		}
   232	
   233		/* disable EOP interrupt for the channel */
   234		for_each_set_bit(cid, (const unsigned long *)&irncr, d->chan_nrs) {
   235			/* select DMA channel */
   236			ldma_update_bits(d, DMA_CS_MASK, cid, DMA_CS);
   237			/* Clear EOP interrupt status */
   238			writel(readl(d->base + DMA_CIS), d->base + DMA_CIS);
   239			/* Disable EOP interrupt */
   240			writel(0, d->base + DMA_CIE);
   241		}
   242	
   243		/* ACK interrupt */
   244		writel(irncr, d->base + cr_off);
   245		irnen &= ~irncr;
   246		/* Disable interrupt */
   247		writel(irnen, d->base + en_off);
   248	
   249		spin_unlock_irqrestore(&d->dev_lock, flags);
   250	
   251		ret = irncr;
   252	
 > 253		return high ? ret << 32 : ret;
   254	}
   255	
   256	static irqreturn_t hdma_interrupt(int irq, void *dev_id)
   257	{
   258		struct ldma_dev *d = dev_id;
   259		struct hdma_chan *chan;
   260		u32 cid;
   261		unsigned long stat;
   262	
   263		stat = hdma_irq_stat(d, 0) | hdma_irq_stat(d, 1);
   264		if (!stat)
   265			return IRQ_HANDLED;
   266	
   267		for_each_set_bit(cid, (const unsigned long *)&stat, d->chan_nrs) {
   268			chan = (struct hdma_chan *)d->chans[cid].priv;
   269			tasklet_schedule(&chan->task);
   270		}
   271	
   272		return IRQ_HANDLED;
   273	}
   274	
   275	static int hdma_irq_init(struct ldma_dev *d, struct platform_device *pdev)
   276	{
   277		if (d->flags & DMA_CHAN_HW_DESC)
   278			return 0;
   279	
   280		d->irq = platform_get_irq(pdev, 0);
   281		if (d->irq < 0)
   282			return d->irq;
   283	
   284		return devm_request_irq(d->dev, d->irq, hdma_interrupt, 0,
   285					DRIVER_NAME, d);
   286	}
   287	
   288	/**
   289	 * Allocate DMA descriptor list
   290	 */
   291	static int hdma_alloc_chan_resources(struct dma_chan *dma_chan)
   292	{
   293		struct ldma_chan *c = to_ldma_chan(dma_chan);
   294		struct hdma_chan *chan = (struct hdma_chan *)c->priv;
   295		struct device *dev = c->vchan.chan.device->dev;
   296		struct dw4_desc_sw *desc_sw;
   297		struct dw4_desc_hw *desc_hw;
   298		size_t desc_sz;
   299		int i;
   300	
   301		/* HW allocate DMA descriptors */
   302		if (ldma_chan_is_hw_desc(c)) {
   303			c->flags |= CHAN_IN_USE;
   304			dev_dbg(dev, "desc in hw\n");
   305			return 0;
   306		}
   307	
   308		if (!c->desc_cnt) {
   309			dev_err(dev, "descriptor count is not set\n");
   310			return -EINVAL;
   311		}
   312	
   313		desc_sz = c->desc_cnt * sizeof(*desc_hw);
   314	
   315		c->desc_base = kzalloc(desc_sz, GFP_KERNEL);
   316		if (!c->desc_base)
   317			return -ENOMEM;
   318	
   319		c->desc_phys = dma_map_single(dev, c->desc_base,
   320					      desc_sz, DMA_TO_DEVICE);
   321		if (dma_mapping_error(dev, c->desc_phys)) {
   322			dev_err(dev, "dma mapping error for dma desc list\n");
   323			goto desc_err;
   324		}
   325	
   326		desc_sz = c->desc_cnt * sizeof(*desc_sw);
   327		chan->ds = kzalloc(desc_sz, GFP_KERNEL);
   328	
   329		if (!chan->ds)
   330			goto desc_err;
   331	
   332		desc_hw = (struct dw4_desc_hw *)c->desc_base;
   333		for (i = 0; i < c->desc_cnt; i++) {
   334			desc_sw = chan->ds + i;
   335			desc_sw->chan = c;
   336			desc_sw->desc_hw = desc_hw + i;
   337		}
   338	
 > 339		dev_dbg(dev, "DMA CH: %u, phy addr: 0x%llx, desc cnt: %u\n",
   340			c->nr, c->desc_phys, c->desc_cnt);
   341	
   342		ldma_chan_desc_hw_cfg(c, c->desc_phys, c->desc_cnt);
   343		ldma_chan_on(c);
   344	
   345		return c->desc_cnt;
   346	
   347	desc_err:
   348		kfree(c->desc_base);
   349		return -EINVAL;
   350	}
   351	

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