* [PATCH 1/2] dt-bindings: dma: apple,admac: Add M3 generation ADMACs
2026-07-25 12:25 [PATCH 0/2] dmaengine: apple-admac: Add support for M3 generation Sasha Finkelstein
@ 2026-07-25 12:25 ` Sasha Finkelstein
2026-07-25 12:25 ` [PATCH 2/2] dmaengine: apple-admac: " Sasha Finkelstein
1 sibling, 0 replies; 4+ messages in thread
From: Sasha Finkelstein @ 2026-07-25 12:25 UTC (permalink / raw)
To: Sven Peter, Janne Grunau, Neal Gompa, Vinod Koul, Frank Li,
Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Martin Povišer
Cc: asahi, linux-arm-kernel, dmaengine, devicetree, linux-kernel,
Sasha Finkelstein
The admacs seen in M3-generation SoCs (t603x, t8122) need additional
configuration writes and so are getting a new compatible chain.
Signed-off-by: Sasha Finkelstein <k@chaosmail.tech>
---
Documentation/devicetree/bindings/dma/apple,admac.yaml | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/dma/apple,admac.yaml b/Documentation/devicetree/bindings/dma/apple,admac.yaml
index 6a200cbd7d02..5b4fd8348f99 100644
--- a/Documentation/devicetree/bindings/dma/apple,admac.yaml
+++ b/Documentation/devicetree/bindings/dma/apple,admac.yaml
@@ -10,7 +10,7 @@ description: |
Apple's Audio DMA Controller (ADMAC) is used to fetch and store audio samples
on SoCs from the "Apple Silicon" family.
- The controller has been seen with up to 24 channels. Even-numbered channels
+ The controller has been seen with up to 32 channels. Even-numbered channels
are TX-only, odd-numbered are RX-only. Individual channels are coupled to
fixed device endpoints.
@@ -33,6 +33,12 @@ properties:
- apple,t8103-admac
- apple,t8112-admac
- const: apple,admac
+ - items:
+ - enum:
+ - apple,t6030-admac
+ - apple,t6031-admac
+ - const: apple,t8122-admac
+ - const: apple,t8122-admac
reg:
maxItems: 1
@@ -43,7 +49,7 @@ properties:
Clients specify a single cell with channel number.
dma-channels:
- maximum: 24
+ maximum: 32
interrupts:
minItems: 4
--
2.55.0
^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH 2/2] dmaengine: apple-admac: Add M3 generation ADMACs
2026-07-25 12:25 [PATCH 0/2] dmaengine: apple-admac: Add support for M3 generation Sasha Finkelstein
2026-07-25 12:25 ` [PATCH 1/2] dt-bindings: dma: apple,admac: Add M3 generation ADMACs Sasha Finkelstein
@ 2026-07-25 12:25 ` Sasha Finkelstein
2026-07-25 12:35 ` sashiko-bot
1 sibling, 1 reply; 4+ messages in thread
From: Sasha Finkelstein @ 2026-07-25 12:25 UTC (permalink / raw)
To: Sven Peter, Janne Grunau, Neal Gompa, Vinod Koul, Frank Li,
Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Martin Povišer
Cc: asahi, linux-arm-kernel, dmaengine, devicetree, linux-kernel,
Sasha Finkelstein
The admacs present on t8122 and t603x SoCs need additional writes in
order to operate correctly. The exact purpose of this register
is unknown
Signed-off-by: Sasha Finkelstein <k@chaosmail.tech>
---
drivers/dma/apple-admac.c | 32 ++++++++++++++++++++++++++++++--
1 file changed, 30 insertions(+), 2 deletions(-)
diff --git a/drivers/dma/apple-admac.c b/drivers/dma/apple-admac.c
index 14a5ee14a481..7ee9a59081c1 100644
--- a/drivers/dma/apple-admac.c
+++ b/drivers/dma/apple-admac.c
@@ -39,10 +39,14 @@
#define FLAG_DESC_NOTIFY BIT(16)
+#define T8122_UNK_28_VAL 0x200000
+
#define REG_TX_START 0x0000
#define REG_TX_STOP 0x0004
#define REG_RX_START 0x0008
#define REG_RX_STOP 0x000c
+#define REG_UNK_28 0x0028
+#define REG_UNK_2C 0x002c
#define REG_IMPRINT 0x0090
#define REG_TX_SRAM_SIZE 0x0094
#define REG_RX_SRAM_SIZE 0x0098
@@ -127,6 +131,7 @@ struct admac_data {
struct mutex cache_alloc_lock;
struct admac_sram txcache, rxcache;
+ bool set_unk28;
int irq;
int irq_index;
int nchannels;
@@ -147,6 +152,10 @@ struct admac_tx {
struct list_head node;
};
+struct admac_hw {
+ bool set_unk28;
+};
+
static int admac_alloc_sram_carveout(struct admac_data *ad,
enum dma_transfer_direction dir,
u32 *out)
@@ -747,6 +756,11 @@ static int admac_device_config(struct dma_chan *chan,
u32 bus_width = readl_relaxed(ad->base + REG_BUS_WIDTH(adchan->no)) &
~(BUS_WIDTH_WORD_SIZE | BUS_WIDTH_FRAME_SIZE);
+ if (ad->set_unk28) {
+ writel_relaxed(T8122_UNK_28_VAL, ad->base + REG_UNK_28);
+ writel_relaxed(T8122_UNK_28_VAL, ad->base + REG_UNK_2C);
+ }
+
switch (is_tx ? config->dst_addr_width : config->src_addr_width) {
case DMA_SLAVE_BUSWIDTH_1_BYTE:
wordsize = 1;
@@ -805,6 +819,7 @@ static int admac_probe(struct platform_device *pdev)
struct device_node *np = pdev->dev.of_node;
struct admac_data *ad;
struct dma_device *dma;
+ const struct admac_hw *hw;
int nchannels;
int err, irq, i;
@@ -813,6 +828,9 @@ static int admac_probe(struct platform_device *pdev)
dev_err(&pdev->dev, "missing or invalid dma-channels property\n");
return -EINVAL;
}
+ hw = of_device_get_match_data(&pdev->dev);
+ if (!hw)
+ return -EINVAL;
ad = devm_kzalloc(&pdev->dev, struct_size(ad, channels, nchannels), GFP_KERNEL);
if (!ad)
@@ -821,6 +839,7 @@ static int admac_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, ad);
ad->dev = &pdev->dev;
ad->nchannels = nchannels;
+ ad->set_unk28 = hw->set_unk28;
mutex_init(&ad->cache_alloc_lock);
/*
@@ -935,9 +954,18 @@ static void admac_remove(struct platform_device *pdev)
reset_control_rearm(ad->rstc);
}
+static const struct admac_hw admac_t8013_hw = {
+ .set_unk28 = false,
+};
+
+static const struct admac_hw admac_t8122_hw = {
+ .set_unk28 = true,
+};
+
static const struct of_device_id admac_of_match[] = {
- { .compatible = "apple,t8103-admac", },
- { .compatible = "apple,admac", },
+ { .compatible = "apple,t8122-admac", .data = &admac_t8122_hw },
+ { .compatible = "apple,t8103-admac", .data = &admac_t8013_hw },
+ { .compatible = "apple,admac", .data = &admac_t8013_hw },
{ }
};
MODULE_DEVICE_TABLE(of, admac_of_match);
--
2.55.0
^ permalink raw reply related [flat|nested] 4+ messages in thread