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From: Linus Walleij <linusw@kernel.org>
To: Vinod Koul <vkoul@kernel.org>, Frank Li <Frank.Li@kernel.org>
Cc: dmaengine@vger.kernel.org, phone-devel@vger.kernel.org,
	 Linus Walleij <linusw@kernel.org>
Subject: [PATCH v4 03/23] dmaengine: ste_dma40: Recover coalesced cyclic callbacks
Date: Sun, 20 Sep 2026 00:22:14 +0200	[thread overview]
Message-ID: <20260920-dma40-fixes-v4-3-d751b2d9c23f@kernel.org> (raw)
In-Reply-To: <20260920-dma40-fixes-v4-0-d751b2d9c23f@kernel.org>

DMA40 exposes one terminal-count status bit per channel. If more than one
cyclic period completes before the interrupt handler clears the bit, the
events coalesce and the driver schedules only one callback. Short audio
periods can consequently lose period notifications.

Use the current memory-side pointer to find the period boundary reached
since callbacks were last queued. Add every elapsed period to pending_tx
so the tasklet invokes one callback for each of them. Fall back to one
callback when the pointer cannot be sampled.

If the pointer has returned to the same period boundary, account for one
complete buffer lap. The hardware has no counter that could distinguish
multiple complete laps, but recovering one lap avoids silently losing all
callbacks represented by the observed terminal-count interrupt.

The preceding cyclic-residue fix ensures that every cyclic period fits in
one LLI, so each boundary corresponds to one client callback.

Fixes: 0c842b551063 ("dma40: cyclic xfer support")
Assisted-by: LLM
Signed-off-by: Linus Walleij <linusw@kernel.org>
---
 drivers/dma/ste_dma40.c | 44 +++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 43 insertions(+), 1 deletion(-)

diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c
index c9983e600daf..b992471e05f2 100644
--- a/drivers/dma/ste_dma40.c
+++ b/drivers/dma/ste_dma40.c
@@ -381,6 +381,8 @@ struct d40_lli_pool {
  * @cyclic_dma_addr: Start address of the cyclic buffer.
  * @cyclic_buf_len: Length of the cyclic buffer.
  * @cyclic_residue: Last valid cyclic residue sample.
+ * @cyclic_period_len: Length of one cyclic period.
+ * @cyclic_callback_pos: Position after the callbacks already queued.
  * @txd: DMA engine struct. Used for among other things for communication
  * during a transfer.
  * @node: List entry.
@@ -402,6 +404,8 @@ struct d40_desc {
 	dma_addr_t			 cyclic_dma_addr;
 	size_t				 cyclic_buf_len;
 	size_t				 cyclic_residue;
+	size_t				 cyclic_period_len;
+	size_t				 cyclic_callback_pos;
 
 	struct dma_async_tx_descriptor	 txd;
 	struct list_head		 node;
@@ -1484,6 +1488,40 @@ static bool d40_cyclic_offset(struct d40_chan *d40c, struct d40_desc *d40d,
 	return false;
 }
 
+static unsigned int d40_cyclic_periods_elapsed(struct d40_chan *d40c,
+					       struct d40_desc *d40d)
+{
+	size_t current_pos;
+	size_t offset;
+	unsigned int periods;
+
+	if (!d40d->cyclic_period_len ||
+	    !d40_cyclic_offset(d40c, d40d, &offset))
+		return 1;
+
+	current_pos = rounddown(offset, d40d->cyclic_period_len);
+	if (!d40_residue(d40c) && current_pos != offset)
+		current_pos += d40d->cyclic_period_len;
+	if (current_pos == d40d->cyclic_buf_len)
+		current_pos = 0;
+
+	if (current_pos > d40d->cyclic_callback_pos) {
+		periods = (current_pos - d40d->cyclic_callback_pos) /
+			d40d->cyclic_period_len;
+	} else if (current_pos < d40d->cyclic_callback_pos) {
+		periods = (d40d->cyclic_buf_len -
+			d40d->cyclic_callback_pos + current_pos) /
+			d40d->cyclic_period_len;
+	} else {
+		/* At least one interrupt occurred, so assume one buffer lap. */
+		periods = d40d->cyclic_buf_len / d40d->cyclic_period_len;
+	}
+
+	d40d->cyclic_callback_pos = current_pos;
+
+	return periods;
+}
+
 static bool d40_tx_is_linked(struct d40_chan *d40c)
 {
 	bool is_link;
@@ -1606,6 +1644,7 @@ static struct d40_desc *d40_queue_start(struct d40_chan *d40c)
 static void dma_tc_handle(struct d40_chan *d40c)
 {
 	struct d40_desc *d40d;
+	unsigned int callbacks = 1;
 
 	/* Get first active entry from list */
 	d40d = d40_first_active_get(d40c);
@@ -1631,6 +1670,7 @@ static void dma_tc_handle(struct d40_chan *d40c)
 				d40d->lli_current = 0;
 		}
 
+		callbacks = d40_cyclic_periods_elapsed(d40c, d40d);
 	} else {
 		d40_lcla_free_all(d40c, d40d);
 
@@ -1651,7 +1691,7 @@ static void dma_tc_handle(struct d40_chan *d40c)
 		d40_desc_done(d40c, d40d);
 	}
 
-	d40c->pending_tx++;
+	d40c->pending_tx += callbacks;
 	tasklet_schedule(&d40c->tasklet);
 
 }
@@ -2636,6 +2676,8 @@ dma40_prep_dma_cyclic(struct dma_chan *chan, dma_addr_t dma_addr,
 		desc->cyclic_dma_addr = buf_addr;
 		desc->cyclic_buf_len = buf_len;
 		desc->cyclic_residue = buf_len;
+		desc->cyclic_period_len = period_len;
+		desc->cyclic_callback_pos = 0;
 	}
 
 	kfree(sg);

-- 
2.55.0


  parent reply	other threads:[~2026-09-19 22:22 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-19 22:22 [PATCH v4 00/23] dmaengine: ste_dma40: Fix numerous accumulated bugs Linus Walleij
2026-09-19 22:22 ` [PATCH v4 01/23] dmaengine: ste_dma40: Fix physical cyclic capability Linus Walleij
2026-09-19 22:22 ` [PATCH v4 02/23] dmaengine: ste_dma40: Fix cyclic transfer residue Linus Walleij
2026-09-19 22:22 ` Linus Walleij [this message]
2026-09-19 22:37   ` [PATCH v4 03/23] dmaengine: ste_dma40: Recover coalesced cyclic callbacks sashiko-bot
2026-09-19 22:22 ` [PATCH v4 04/23] dmaengine: ste_dma40: Fix failed start cleanup Linus Walleij
2026-09-19 22:22 ` [PATCH v4 05/23] dmaengine: ste_dma40: Fix probe runtime PM disable Linus Walleij
2026-09-19 22:22 ` [PATCH v4 06/23] dmaengine: ste_dma40: Check runtime PM in IRQ Linus Walleij
2026-09-19 22:22 ` [PATCH v4 07/23] dmaengine: ste_dma40: Handle runtime PM resume errors Linus Walleij
2026-09-19 22:22 ` [PATCH v4 08/23] dmaengine: ste_dma40: Return IRQ_NONE without interrupt status Linus Walleij
2026-09-19 22:36   ` sashiko-bot
2026-09-19 22:22 ` [PATCH v4 09/23] dmaengine: ste_dma40: Init hardware before registration Linus Walleij
2026-09-19 22:22 ` [PATCH v4 10/23] dmaengine: ste_dma40: Fix probe IRQ leak Linus Walleij
2026-09-19 22:22 ` [PATCH v4 11/23] dmaengine: ste_dma40: Fix DMA registration unwind Linus Walleij
2026-09-19 22:22 ` [PATCH v4 12/23] dmaengine: ste_dma40: Fix LCLA allocation order Linus Walleij
2026-09-19 22:22 ` [PATCH v4 13/23] dmaengine: ste_dma40: Fix probe LCLA free Linus Walleij
2026-09-19 22:22 ` [PATCH v4 14/23] dmaengine: ste_dma40: Put the LCPA SRAM node Linus Walleij
2026-09-19 22:22 ` [PATCH v4 15/23] dmaengine: ste_dma40: Fix memcpy channel parsing Linus Walleij
2026-09-19 22:22 ` [PATCH v4 16/23] dmaengine: ste_dma40: Validate disabled channel indexes Linus Walleij
2026-09-19 22:22 ` [PATCH v4 17/23] dmaengine: ste_dma40: Validate DMA specifier length Linus Walleij
2026-09-19 22:22 ` [PATCH v4 18/23] dmaengine: ste_dma40: Reject direction changes after allocation Linus Walleij
2026-09-19 22:22 ` [PATCH v4 19/23] dmaengine: ste_dma40: Fix logical channel bounds check Linus Walleij
2026-09-19 22:22 ` [PATCH v4 20/23] dmaengine: ste_dma40: Fix event group bounds Linus Walleij
2026-09-19 22:22 ` [PATCH v4 21/23] dmaengine: ste_dma40: Search all blocks for fixed logical channels Linus Walleij
2026-09-19 22:22 ` [PATCH v4 22/23] dmaengine: ste_dma40: Validate fixed physical channel indexes Linus Walleij
2026-09-19 22:22 ` [PATCH v4 23/23] dmaengine: ste_dma40: Validate memcpy configuration Linus Walleij

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